1 /**
2 ******************************************************************************
3 * @file stm32wbxx_hal_tim_ex.c
4 * @author MCD Application Team
5 * @brief TIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Timer Extended peripheral:
8 * + Time Hall Sensor Interface Initialization
9 * + Time Hall Sensor Interface Start
10 * + Time Complementary signal break and dead time configuration
11 * + Time Master and Slave synchronization configuration
12 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
13 * + Time OCRef clear configuration
14 * + Timer remapping capabilities configuration
15 @verbatim
16 ==============================================================================
17 ##### TIMER Extended features #####
18 ==============================================================================
19 [..]
20 The Timer Extended features include:
21 (#) Complementary outputs with programmable dead-time for :
22 (++) Output Compare
23 (++) PWM generation (Edge and Center-aligned Mode)
24 (++) One-pulse mode output
25 (#) Synchronization circuit to control the timer with external signals and to
26 interconnect several timers together.
27 (#) Break input to put the timer output signals in reset state or in a known state.
28 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
29 positioning purposes
30
31 ##### How to use this driver #####
32 ==============================================================================
33 [..]
34 (#) Initialize the TIM low level resources by implementing the following functions
35 depending on the selected feature:
36 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
37
38 (#) Initialize the TIM low level resources :
39 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
40 (##) TIM pins configuration
41 (+++) Enable the clock for the TIM GPIOs using the following function:
42 __HAL_RCC_GPIOx_CLK_ENABLE();
43 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
44
45 (#) The external Clock can be configured, if needed (the default clock is the
46 internal clock from the APBx), using the following function:
47 HAL_TIM_ConfigClockSource, the clock configuration should be done before
48 any start function.
49
50 (#) Configure the TIM in the desired functioning mode using one of the
51 initialization function of this driver:
52 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
53 Timer Hall Sensor Interface and the commutation event with the corresponding
54 Interrupt and DMA request if needed (Note that One Timer is used to interface
55 with the Hall sensor Interface and another Timer should be used to use
56 the commutation event).
57
58 (#) Activate the TIM peripheral using one of the start functions:
59 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
60 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
61 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
62 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
63
64 @endverbatim
65 ******************************************************************************
66 * @attention
67 *
68 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
69 * All rights reserved.</center></h2>
70 *
71 * This software component is licensed by ST under BSD 3-Clause license,
72 * the "License"; You may not use this file except in compliance with the
73 * License. You may obtain a copy of the License at:
74 * opensource.org/licenses/BSD-3-Clause
75 *
76 ******************************************************************************
77 */
78
79 /* Includes ------------------------------------------------------------------*/
80 #include "stm32wbxx_hal.h"
81
82 /** @addtogroup STM32WBxx_HAL_Driver
83 * @{
84 */
85
86 /** @defgroup TIMEx TIMEx
87 * @brief TIM Extended HAL module driver
88 * @{
89 */
90
91 #ifdef HAL_TIM_MODULE_ENABLED
92
93 /* Private typedef -----------------------------------------------------------*/
94 /* Private define ------------------------------------------------------------*/
95 /* Private macro -------------------------------------------------------------*/
96 /** @addtogroup TIMEx_Private_Macros
97 * @{
98 */
99 #define TIM_GET_OR_MASK(__INSTANCE__) \
100 (((__INSTANCE__) == TIM1) ? (TIM1_OR_ETR_ADC1_RMP | TIM1_OR_TI1_RMP) : \
101 ((__INSTANCE__) == TIM2) ? (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP | TIM2_OR_ITR1_RMP) : \
102 ((__INSTANCE__) == TIM16) ? TIM16_OR_TI1_RMP : TIM17_OR_TI1_RMP)
103 /**
104 * @}
105 */
106
107 /* Private variables ---------------------------------------------------------*/
108 /* Private function prototypes -----------------------------------------------*/
109 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
110
111 /* Exported functions --------------------------------------------------------*/
112 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
113 * @{
114 */
115
116 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
117 * @brief Timer Hall Sensor functions
118 *
119 @verbatim
120 ==============================================================================
121 ##### Timer Hall Sensor functions #####
122 ==============================================================================
123 [..]
124 This section provides functions allowing to:
125 (+) Initialize and configure TIM HAL Sensor.
126 (+) De-initialize TIM HAL Sensor.
127 (+) Start the Hall Sensor Interface.
128 (+) Stop the Hall Sensor Interface.
129 (+) Start the Hall Sensor Interface and enable interrupts.
130 (+) Stop the Hall Sensor Interface and disable interrupts.
131 (+) Start the Hall Sensor Interface and enable DMA transfers.
132 (+) Stop the Hall Sensor Interface and disable DMA transfers.
133
134 @endverbatim
135 * @{
136 */
137 /**
138 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
139 * @param htim TIM Hall Sensor Interface handle
140 * @param sConfig TIM Hall Sensor configuration structure
141 * @retval HAL status
142 */
HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef * htim,TIM_HallSensor_InitTypeDef * sConfig)143 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
144 {
145 TIM_OC_InitTypeDef OC_Config;
146
147 /* Check the TIM handle allocation */
148 if (htim == NULL)
149 {
150 return HAL_ERROR;
151 }
152
153 /* Check the parameters */
154 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
155 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
156 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
157 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
158 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
159 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
160 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
161
162 if (htim->State == HAL_TIM_STATE_RESET)
163 {
164 /* Allocate lock resource and initialize it */
165 htim->Lock = HAL_UNLOCKED;
166
167 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
168 /* Reset interrupt callbacks to legacy week callbacks */
169 TIM_ResetCallback(htim);
170
171 if (htim->HallSensor_MspInitCallback == NULL)
172 {
173 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
174 }
175 /* Init the low level hardware : GPIO, CLOCK, NVIC */
176 htim->HallSensor_MspInitCallback(htim);
177 #else
178 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
179 HAL_TIMEx_HallSensor_MspInit(htim);
180 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
181 }
182
183 /* Set the TIM state */
184 htim->State = HAL_TIM_STATE_BUSY;
185
186 /* Configure the Time base in the Encoder Mode */
187 TIM_Base_SetConfig(htim->Instance, &htim->Init);
188
189 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
190 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
191
192 /* Reset the IC1PSC Bits */
193 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
194 /* Set the IC1PSC value */
195 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
196
197 /* Enable the Hall sensor interface (XOR function of the three inputs) */
198 htim->Instance->CR2 |= TIM_CR2_TI1S;
199
200 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
201 htim->Instance->SMCR &= ~TIM_SMCR_TS;
202 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
203
204 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
205 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
206 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
207
208 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
209 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
210 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
211 OC_Config.OCMode = TIM_OCMODE_PWM2;
212 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
213 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
214 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
215 OC_Config.Pulse = sConfig->Commutation_Delay;
216
217 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
218
219 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
220 register to 101 */
221 htim->Instance->CR2 &= ~TIM_CR2_MMS;
222 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
223
224 /* Initialize the TIM state*/
225 htim->State = HAL_TIM_STATE_READY;
226
227 return HAL_OK;
228 }
229
230 /**
231 * @brief DeInitializes the TIM Hall Sensor interface
232 * @param htim TIM Hall Sensor Interface handle
233 * @retval HAL status
234 */
HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef * htim)235 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
236 {
237 /* Check the parameters */
238 assert_param(IS_TIM_INSTANCE(htim->Instance));
239
240 htim->State = HAL_TIM_STATE_BUSY;
241
242 /* Disable the TIM Peripheral Clock */
243 __HAL_TIM_DISABLE(htim);
244
245 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
246 if (htim->HallSensor_MspDeInitCallback == NULL)
247 {
248 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
249 }
250 /* DeInit the low level hardware */
251 htim->HallSensor_MspDeInitCallback(htim);
252 #else
253 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
254 HAL_TIMEx_HallSensor_MspDeInit(htim);
255 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
256
257 /* Change TIM state */
258 htim->State = HAL_TIM_STATE_RESET;
259
260 /* Release Lock */
261 __HAL_UNLOCK(htim);
262
263 return HAL_OK;
264 }
265
266 /**
267 * @brief Initializes the TIM Hall Sensor MSP.
268 * @param htim TIM Hall Sensor Interface handle
269 * @retval None
270 */
HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef * htim)271 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
272 {
273 /* Prevent unused argument(s) compilation warning */
274 UNUSED(htim);
275
276 /* NOTE : This function should not be modified, when the callback is needed,
277 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
278 */
279 }
280
281 /**
282 * @brief DeInitializes TIM Hall Sensor MSP.
283 * @param htim TIM Hall Sensor Interface handle
284 * @retval None
285 */
HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef * htim)286 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
287 {
288 /* Prevent unused argument(s) compilation warning */
289 UNUSED(htim);
290
291 /* NOTE : This function should not be modified, when the callback is needed,
292 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
293 */
294 }
295
296 /**
297 * @brief Starts the TIM Hall Sensor Interface.
298 * @param htim TIM Hall Sensor Interface handle
299 * @retval HAL status
300 */
HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef * htim)301 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
302 {
303 uint32_t tmpsmcr;
304
305 /* Check the parameters */
306 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
307
308 /* Enable the Input Capture channel 1
309 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
310 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
311
312 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
313 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
314 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
315 {
316 __HAL_TIM_ENABLE(htim);
317 }
318
319 /* Return function status */
320 return HAL_OK;
321 }
322
323 /**
324 * @brief Stops the TIM Hall sensor Interface.
325 * @param htim TIM Hall Sensor Interface handle
326 * @retval HAL status
327 */
HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef * htim)328 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
329 {
330 /* Check the parameters */
331 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
332
333 /* Disable the Input Capture channels 1, 2 and 3
334 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
335 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
336
337 /* Disable the Peripheral */
338 __HAL_TIM_DISABLE(htim);
339
340 /* Return function status */
341 return HAL_OK;
342 }
343
344 /**
345 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
346 * @param htim TIM Hall Sensor Interface handle
347 * @retval HAL status
348 */
HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef * htim)349 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
350 {
351 uint32_t tmpsmcr;
352
353 /* Check the parameters */
354 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
355
356 /* Enable the capture compare Interrupts 1 event */
357 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
358
359 /* Enable the Input Capture channel 1
360 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
361 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
362
363 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
364 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
365 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
366 {
367 __HAL_TIM_ENABLE(htim);
368 }
369
370 /* Return function status */
371 return HAL_OK;
372 }
373
374 /**
375 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
376 * @param htim TIM Hall Sensor Interface handle
377 * @retval HAL status
378 */
HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef * htim)379 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
380 {
381 /* Check the parameters */
382 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
383
384 /* Disable the Input Capture channel 1
385 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
386 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
387
388 /* Disable the capture compare Interrupts event */
389 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
390
391 /* Disable the Peripheral */
392 __HAL_TIM_DISABLE(htim);
393
394 /* Return function status */
395 return HAL_OK;
396 }
397
398 /**
399 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
400 * @param htim TIM Hall Sensor Interface handle
401 * @param pData The destination Buffer address.
402 * @param Length The length of data to be transferred from TIM peripheral to memory.
403 * @retval HAL status
404 */
HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef * htim,uint32_t * pData,uint16_t Length)405 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
406 {
407 uint32_t tmpsmcr;
408
409 /* Check the parameters */
410 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
411
412 if (htim->State == HAL_TIM_STATE_BUSY)
413 {
414 return HAL_BUSY;
415 }
416 else if (htim->State == HAL_TIM_STATE_READY)
417 {
418 if (((uint32_t)pData == 0U) && (Length > 0U))
419 {
420 return HAL_ERROR;
421 }
422 else
423 {
424 htim->State = HAL_TIM_STATE_BUSY;
425 }
426 }
427 else
428 {
429 /* nothing to do */
430 }
431 /* Enable the Input Capture channel 1
432 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
433 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
434
435 /* Set the DMA Input Capture 1 Callbacks */
436 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
437 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
438 /* Set the DMA error callback */
439 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
440
441 /* Enable the DMA channel for Capture 1*/
442 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
443 {
444 return HAL_ERROR;
445 }
446 /* Enable the capture compare 1 Interrupt */
447 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
448
449 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
450 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
451 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
452 {
453 __HAL_TIM_ENABLE(htim);
454 }
455
456 /* Return function status */
457 return HAL_OK;
458 }
459
460 /**
461 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
462 * @param htim TIM Hall Sensor Interface handle
463 * @retval HAL status
464 */
HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef * htim)465 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
466 {
467 /* Check the parameters */
468 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
469
470 /* Disable the Input Capture channel 1
471 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
472 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
473
474
475 /* Disable the capture compare Interrupts 1 event */
476 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
477
478 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
479 /* Disable the Peripheral */
480 __HAL_TIM_DISABLE(htim);
481
482 /* Return function status */
483 return HAL_OK;
484 }
485
486 /**
487 * @}
488 */
489
490 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
491 * @brief Timer Complementary Output Compare functions
492 *
493 @verbatim
494 ==============================================================================
495 ##### Timer Complementary Output Compare functions #####
496 ==============================================================================
497 [..]
498 This section provides functions allowing to:
499 (+) Start the Complementary Output Compare/PWM.
500 (+) Stop the Complementary Output Compare/PWM.
501 (+) Start the Complementary Output Compare/PWM and enable interrupts.
502 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
503 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
504 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
505
506 @endverbatim
507 * @{
508 */
509
510 /**
511 * @brief Starts the TIM Output Compare signal generation on the complementary
512 * output.
513 * @param htim TIM Output Compare handle
514 * @param Channel TIM Channel to be enabled
515 * This parameter can be one of the following values:
516 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
517 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
518 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
519 * @retval HAL status
520 */
HAL_TIMEx_OCN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)521 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
522 {
523 uint32_t tmpsmcr;
524
525 /* Check the parameters */
526 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
527
528 /* Enable the Capture compare channel N */
529 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
530
531 /* Enable the Main Output */
532 __HAL_TIM_MOE_ENABLE(htim);
533
534 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
535 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
536 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
537 {
538 __HAL_TIM_ENABLE(htim);
539 }
540
541 /* Return function status */
542 return HAL_OK;
543 }
544
545 /**
546 * @brief Stops the TIM Output Compare signal generation on the complementary
547 * output.
548 * @param htim TIM handle
549 * @param Channel TIM Channel to be disabled
550 * This parameter can be one of the following values:
551 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
552 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
553 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
554 * @retval HAL status
555 */
HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)556 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
557 {
558 /* Check the parameters */
559 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
560
561 /* Disable the Capture compare channel N */
562 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
563
564 /* Disable the Main Output */
565 __HAL_TIM_MOE_DISABLE(htim);
566
567 /* Disable the Peripheral */
568 __HAL_TIM_DISABLE(htim);
569
570 /* Return function status */
571 return HAL_OK;
572 }
573
574 /**
575 * @brief Starts the TIM Output Compare signal generation in interrupt mode
576 * on the complementary output.
577 * @param htim TIM OC handle
578 * @param Channel TIM Channel to be enabled
579 * This parameter can be one of the following values:
580 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
581 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
582 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
583 * @retval HAL status
584 */
HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)585 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
586 {
587 uint32_t tmpsmcr;
588
589 /* Check the parameters */
590 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
591
592 switch (Channel)
593 {
594 case TIM_CHANNEL_1:
595 {
596 /* Enable the TIM Output Compare interrupt */
597 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
598 break;
599 }
600
601 case TIM_CHANNEL_2:
602 {
603 /* Enable the TIM Output Compare interrupt */
604 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
605 break;
606 }
607
608 case TIM_CHANNEL_3:
609 {
610 /* Enable the TIM Output Compare interrupt */
611 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
612 break;
613 }
614
615
616 default:
617 break;
618 }
619
620 /* Enable the TIM Break interrupt */
621 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
622
623 /* Enable the Capture compare channel N */
624 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
625
626 /* Enable the Main Output */
627 __HAL_TIM_MOE_ENABLE(htim);
628
629 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
630 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
631 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
632 {
633 __HAL_TIM_ENABLE(htim);
634 }
635
636 /* Return function status */
637 return HAL_OK;
638 }
639
640 /**
641 * @brief Stops the TIM Output Compare signal generation in interrupt mode
642 * on the complementary output.
643 * @param htim TIM Output Compare handle
644 * @param Channel TIM Channel to be disabled
645 * This parameter can be one of the following values:
646 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
647 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
648 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
649 * @retval HAL status
650 */
HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)651 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
652 {
653 uint32_t tmpccer;
654 /* Check the parameters */
655 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
656
657 switch (Channel)
658 {
659 case TIM_CHANNEL_1:
660 {
661 /* Disable the TIM Output Compare interrupt */
662 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
663 break;
664 }
665
666 case TIM_CHANNEL_2:
667 {
668 /* Disable the TIM Output Compare interrupt */
669 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
670 break;
671 }
672
673 case TIM_CHANNEL_3:
674 {
675 /* Disable the TIM Output Compare interrupt */
676 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
677 break;
678 }
679
680 default:
681 break;
682 }
683
684 /* Disable the Capture compare channel N */
685 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
686
687 /* Disable the TIM Break interrupt (only if no more channel is active) */
688 tmpccer = htim->Instance->CCER;
689 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
690 {
691 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
692 }
693
694 /* Disable the Main Output */
695 __HAL_TIM_MOE_DISABLE(htim);
696
697 /* Disable the Peripheral */
698 __HAL_TIM_DISABLE(htim);
699
700 /* Return function status */
701 return HAL_OK;
702 }
703
704 /**
705 * @brief Starts the TIM Output Compare signal generation in DMA mode
706 * on the complementary output.
707 * @param htim TIM Output Compare handle
708 * @param Channel TIM Channel to be enabled
709 * This parameter can be one of the following values:
710 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
711 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
712 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
713 * @param pData The source Buffer address.
714 * @param Length The length of data to be transferred from memory to TIM peripheral
715 * @retval HAL status
716 */
HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,uint32_t * pData,uint16_t Length)717 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
718 {
719 uint32_t tmpsmcr;
720
721 /* Check the parameters */
722 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
723
724 if (htim->State == HAL_TIM_STATE_BUSY)
725 {
726 return HAL_BUSY;
727 }
728 else if (htim->State == HAL_TIM_STATE_READY)
729 {
730 if (((uint32_t)pData == 0U) && (Length > 0U))
731 {
732 return HAL_ERROR;
733 }
734 else
735 {
736 htim->State = HAL_TIM_STATE_BUSY;
737 }
738 }
739 else
740 {
741 /* nothing to do */
742 }
743
744 switch (Channel)
745 {
746 case TIM_CHANNEL_1:
747 {
748 /* Set the DMA compare callbacks */
749 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
750 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
751
752 /* Set the DMA error callback */
753 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
754
755 /* Enable the DMA channel */
756 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
757 {
758 return HAL_ERROR;
759 }
760 /* Enable the TIM Output Compare DMA request */
761 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
762 break;
763 }
764
765 case TIM_CHANNEL_2:
766 {
767 /* Set the DMA compare callbacks */
768 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
769 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
770
771 /* Set the DMA error callback */
772 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
773
774 /* Enable the DMA channel */
775 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
776 {
777 return HAL_ERROR;
778 }
779 /* Enable the TIM Output Compare DMA request */
780 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
781 break;
782 }
783
784 case TIM_CHANNEL_3:
785 {
786 /* Set the DMA compare callbacks */
787 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
788 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
789
790 /* Set the DMA error callback */
791 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
792
793 /* Enable the DMA channel */
794 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
795 {
796 return HAL_ERROR;
797 }
798 /* Enable the TIM Output Compare DMA request */
799 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
800 break;
801 }
802
803 default:
804 break;
805 }
806
807 /* Enable the Capture compare channel N */
808 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
809
810 /* Enable the Main Output */
811 __HAL_TIM_MOE_ENABLE(htim);
812
813 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
814 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
815 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
816 {
817 __HAL_TIM_ENABLE(htim);
818 }
819
820 /* Return function status */
821 return HAL_OK;
822 }
823
824 /**
825 * @brief Stops the TIM Output Compare signal generation in DMA mode
826 * on the complementary output.
827 * @param htim TIM Output Compare handle
828 * @param Channel TIM Channel to be disabled
829 * This parameter can be one of the following values:
830 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
831 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
832 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
833 * @retval HAL status
834 */
HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)835 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
836 {
837 /* Check the parameters */
838 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
839
840 switch (Channel)
841 {
842 case TIM_CHANNEL_1:
843 {
844 /* Disable the TIM Output Compare DMA request */
845 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
846 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
847 break;
848 }
849
850 case TIM_CHANNEL_2:
851 {
852 /* Disable the TIM Output Compare DMA request */
853 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
854 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
855 break;
856 }
857
858 case TIM_CHANNEL_3:
859 {
860 /* Disable the TIM Output Compare DMA request */
861 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
862 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
863 break;
864 }
865
866 default:
867 break;
868 }
869
870 /* Disable the Capture compare channel N */
871 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
872
873 /* Disable the Main Output */
874 __HAL_TIM_MOE_DISABLE(htim);
875
876 /* Disable the Peripheral */
877 __HAL_TIM_DISABLE(htim);
878
879 /* Change the htim state */
880 htim->State = HAL_TIM_STATE_READY;
881
882 /* Return function status */
883 return HAL_OK;
884 }
885
886 /**
887 * @}
888 */
889
890 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
891 * @brief Timer Complementary PWM functions
892 *
893 @verbatim
894 ==============================================================================
895 ##### Timer Complementary PWM functions #####
896 ==============================================================================
897 [..]
898 This section provides functions allowing to:
899 (+) Start the Complementary PWM.
900 (+) Stop the Complementary PWM.
901 (+) Start the Complementary PWM and enable interrupts.
902 (+) Stop the Complementary PWM and disable interrupts.
903 (+) Start the Complementary PWM and enable DMA transfers.
904 (+) Stop the Complementary PWM and disable DMA transfers.
905 (+) Start the Complementary Input Capture measurement.
906 (+) Stop the Complementary Input Capture.
907 (+) Start the Complementary Input Capture and enable interrupts.
908 (+) Stop the Complementary Input Capture and disable interrupts.
909 (+) Start the Complementary Input Capture and enable DMA transfers.
910 (+) Stop the Complementary Input Capture and disable DMA transfers.
911 (+) Start the Complementary One Pulse generation.
912 (+) Stop the Complementary One Pulse.
913 (+) Start the Complementary One Pulse and enable interrupts.
914 (+) Stop the Complementary One Pulse and disable interrupts.
915
916 @endverbatim
917 * @{
918 */
919
920 /**
921 * @brief Starts the PWM signal generation on the complementary output.
922 * @param htim TIM handle
923 * @param Channel TIM Channel to be enabled
924 * This parameter can be one of the following values:
925 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
926 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
927 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
928 * @retval HAL status
929 */
HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)930 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
931 {
932 uint32_t tmpsmcr;
933
934 /* Check the parameters */
935 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
936
937 /* Enable the complementary PWM output */
938 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
939
940 /* Enable the Main Output */
941 __HAL_TIM_MOE_ENABLE(htim);
942
943 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
944 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
945 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
946 {
947 __HAL_TIM_ENABLE(htim);
948 }
949
950 /* Return function status */
951 return HAL_OK;
952 }
953
954 /**
955 * @brief Stops the PWM signal generation on the complementary output.
956 * @param htim TIM handle
957 * @param Channel TIM Channel to be disabled
958 * This parameter can be one of the following values:
959 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
960 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
961 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
962 * @retval HAL status
963 */
HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)964 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
965 {
966 /* Check the parameters */
967 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
968
969 /* Disable the complementary PWM output */
970 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
971
972 /* Disable the Main Output */
973 __HAL_TIM_MOE_DISABLE(htim);
974
975 /* Disable the Peripheral */
976 __HAL_TIM_DISABLE(htim);
977
978 /* Return function status */
979 return HAL_OK;
980 }
981
982 /**
983 * @brief Starts the PWM signal generation in interrupt mode on the
984 * complementary output.
985 * @param htim TIM handle
986 * @param Channel TIM Channel to be disabled
987 * This parameter can be one of the following values:
988 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
989 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
990 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
991 * @retval HAL status
992 */
HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)993 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
994 {
995 uint32_t tmpsmcr;
996
997 /* Check the parameters */
998 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
999
1000 switch (Channel)
1001 {
1002 case TIM_CHANNEL_1:
1003 {
1004 /* Enable the TIM Capture/Compare 1 interrupt */
1005 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1006 break;
1007 }
1008
1009 case TIM_CHANNEL_2:
1010 {
1011 /* Enable the TIM Capture/Compare 2 interrupt */
1012 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1013 break;
1014 }
1015
1016 case TIM_CHANNEL_3:
1017 {
1018 /* Enable the TIM Capture/Compare 3 interrupt */
1019 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
1020 break;
1021 }
1022
1023 default:
1024 break;
1025 }
1026
1027 /* Enable the TIM Break interrupt */
1028 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1029
1030 /* Enable the complementary PWM output */
1031 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1032
1033 /* Enable the Main Output */
1034 __HAL_TIM_MOE_ENABLE(htim);
1035
1036 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1037 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1038 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1039 {
1040 __HAL_TIM_ENABLE(htim);
1041 }
1042
1043 /* Return function status */
1044 return HAL_OK;
1045 }
1046
1047 /**
1048 * @brief Stops the PWM signal generation in interrupt mode on the
1049 * complementary output.
1050 * @param htim TIM handle
1051 * @param Channel TIM Channel to be disabled
1052 * This parameter can be one of the following values:
1053 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1054 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1055 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1056 * @retval HAL status
1057 */
HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1058 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1059 {
1060 uint32_t tmpccer;
1061
1062 /* Check the parameters */
1063 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1064
1065 switch (Channel)
1066 {
1067 case TIM_CHANNEL_1:
1068 {
1069 /* Disable the TIM Capture/Compare 1 interrupt */
1070 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1071 break;
1072 }
1073
1074 case TIM_CHANNEL_2:
1075 {
1076 /* Disable the TIM Capture/Compare 2 interrupt */
1077 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1078 break;
1079 }
1080
1081 case TIM_CHANNEL_3:
1082 {
1083 /* Disable the TIM Capture/Compare 3 interrupt */
1084 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1085 break;
1086 }
1087
1088 default:
1089 break;
1090 }
1091
1092 /* Disable the complementary PWM output */
1093 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1094
1095 /* Disable the TIM Break interrupt (only if no more channel is active) */
1096 tmpccer = htim->Instance->CCER;
1097 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1098 {
1099 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
1100 }
1101
1102 /* Disable the Main Output */
1103 __HAL_TIM_MOE_DISABLE(htim);
1104
1105 /* Disable the Peripheral */
1106 __HAL_TIM_DISABLE(htim);
1107
1108 /* Return function status */
1109 return HAL_OK;
1110 }
1111
1112 /**
1113 * @brief Starts the TIM PWM signal generation in DMA mode on the
1114 * complementary output
1115 * @param htim TIM handle
1116 * @param Channel TIM Channel to be enabled
1117 * This parameter can be one of the following values:
1118 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1119 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1120 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1121 * @param pData The source Buffer address.
1122 * @param Length The length of data to be transferred from memory to TIM peripheral
1123 * @retval HAL status
1124 */
HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,uint32_t * pData,uint16_t Length)1125 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
1126 {
1127 uint32_t tmpsmcr;
1128
1129 /* Check the parameters */
1130 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1131
1132 if (htim->State == HAL_TIM_STATE_BUSY)
1133 {
1134 return HAL_BUSY;
1135 }
1136 else if (htim->State == HAL_TIM_STATE_READY)
1137 {
1138 if (((uint32_t)pData == 0U) && (Length > 0U))
1139 {
1140 return HAL_ERROR;
1141 }
1142 else
1143 {
1144 htim->State = HAL_TIM_STATE_BUSY;
1145 }
1146 }
1147 else
1148 {
1149 /* nothing to do */
1150 }
1151 switch (Channel)
1152 {
1153 case TIM_CHANNEL_1:
1154 {
1155 /* Set the DMA compare callbacks */
1156 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
1157 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1158
1159 /* Set the DMA error callback */
1160 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
1161
1162 /* Enable the DMA channel */
1163 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
1164 {
1165 return HAL_ERROR;
1166 }
1167 /* Enable the TIM Capture/Compare 1 DMA request */
1168 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1169 break;
1170 }
1171
1172 case TIM_CHANNEL_2:
1173 {
1174 /* Set the DMA compare callbacks */
1175 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
1176 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1177
1178 /* Set the DMA error callback */
1179 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
1180
1181 /* Enable the DMA channel */
1182 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
1183 {
1184 return HAL_ERROR;
1185 }
1186 /* Enable the TIM Capture/Compare 2 DMA request */
1187 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1188 break;
1189 }
1190
1191 case TIM_CHANNEL_3:
1192 {
1193 /* Set the DMA compare callbacks */
1194 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
1195 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1196
1197 /* Set the DMA error callback */
1198 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
1199
1200 /* Enable the DMA channel */
1201 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
1202 {
1203 return HAL_ERROR;
1204 }
1205 /* Enable the TIM Capture/Compare 3 DMA request */
1206 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1207 break;
1208 }
1209
1210 default:
1211 break;
1212 }
1213
1214 /* Enable the complementary PWM output */
1215 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1216
1217 /* Enable the Main Output */
1218 __HAL_TIM_MOE_ENABLE(htim);
1219
1220 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1221 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1222 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1223 {
1224 __HAL_TIM_ENABLE(htim);
1225 }
1226
1227 /* Return function status */
1228 return HAL_OK;
1229 }
1230
1231 /**
1232 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1233 * output
1234 * @param htim TIM handle
1235 * @param Channel TIM Channel to be disabled
1236 * This parameter can be one of the following values:
1237 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1238 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1239 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1240 * @retval HAL status
1241 */
HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1242 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1243 {
1244 /* Check the parameters */
1245 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1246
1247 switch (Channel)
1248 {
1249 case TIM_CHANNEL_1:
1250 {
1251 /* Disable the TIM Capture/Compare 1 DMA request */
1252 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1253 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1254 break;
1255 }
1256
1257 case TIM_CHANNEL_2:
1258 {
1259 /* Disable the TIM Capture/Compare 2 DMA request */
1260 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1261 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1262 break;
1263 }
1264
1265 case TIM_CHANNEL_3:
1266 {
1267 /* Disable the TIM Capture/Compare 3 DMA request */
1268 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1269 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1270 break;
1271 }
1272
1273 default:
1274 break;
1275 }
1276
1277 /* Disable the complementary PWM output */
1278 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1279
1280 /* Disable the Main Output */
1281 __HAL_TIM_MOE_DISABLE(htim);
1282
1283 /* Disable the Peripheral */
1284 __HAL_TIM_DISABLE(htim);
1285
1286 /* Change the htim state */
1287 htim->State = HAL_TIM_STATE_READY;
1288
1289 /* Return function status */
1290 return HAL_OK;
1291 }
1292
1293 /**
1294 * @}
1295 */
1296
1297 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1298 * @brief Timer Complementary One Pulse functions
1299 *
1300 @verbatim
1301 ==============================================================================
1302 ##### Timer Complementary One Pulse functions #####
1303 ==============================================================================
1304 [..]
1305 This section provides functions allowing to:
1306 (+) Start the Complementary One Pulse generation.
1307 (+) Stop the Complementary One Pulse.
1308 (+) Start the Complementary One Pulse and enable interrupts.
1309 (+) Stop the Complementary One Pulse and disable interrupts.
1310
1311 @endverbatim
1312 * @{
1313 */
1314
1315 /**
1316 * @brief Starts the TIM One Pulse signal generation on the complementary
1317 * output.
1318 * @param htim TIM One Pulse handle
1319 * @param OutputChannel TIM Channel to be enabled
1320 * This parameter can be one of the following values:
1321 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1322 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1323 * @retval HAL status
1324 */
HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1325 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1326 {
1327 /* Check the parameters */
1328 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1329
1330 /* Enable the complementary One Pulse output */
1331 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1332
1333 /* Enable the Main Output */
1334 __HAL_TIM_MOE_ENABLE(htim);
1335
1336 /* Return function status */
1337 return HAL_OK;
1338 }
1339
1340 /**
1341 * @brief Stops the TIM One Pulse signal generation on the complementary
1342 * output.
1343 * @param htim TIM One Pulse handle
1344 * @param OutputChannel TIM Channel to be disabled
1345 * This parameter can be one of the following values:
1346 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1347 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1348 * @retval HAL status
1349 */
HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1350 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1351 {
1352
1353 /* Check the parameters */
1354 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1355
1356 /* Disable the complementary One Pulse output */
1357 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1358
1359 /* Disable the Main Output */
1360 __HAL_TIM_MOE_DISABLE(htim);
1361
1362 /* Disable the Peripheral */
1363 __HAL_TIM_DISABLE(htim);
1364
1365 /* Return function status */
1366 return HAL_OK;
1367 }
1368
1369 /**
1370 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1371 * complementary channel.
1372 * @param htim TIM One Pulse handle
1373 * @param OutputChannel TIM Channel to be enabled
1374 * This parameter can be one of the following values:
1375 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1376 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1377 * @retval HAL status
1378 */
HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1379 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1380 {
1381 /* Check the parameters */
1382 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1383
1384 /* Enable the TIM Capture/Compare 1 interrupt */
1385 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1386
1387 /* Enable the TIM Capture/Compare 2 interrupt */
1388 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1389
1390 /* Enable the complementary One Pulse output */
1391 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1392
1393 /* Enable the Main Output */
1394 __HAL_TIM_MOE_ENABLE(htim);
1395
1396 /* Return function status */
1397 return HAL_OK;
1398 }
1399
1400 /**
1401 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1402 * complementary channel.
1403 * @param htim TIM One Pulse handle
1404 * @param OutputChannel TIM Channel to be disabled
1405 * This parameter can be one of the following values:
1406 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1407 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1408 * @retval HAL status
1409 */
HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1410 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1411 {
1412 /* Check the parameters */
1413 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1414
1415 /* Disable the TIM Capture/Compare 1 interrupt */
1416 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1417
1418 /* Disable the TIM Capture/Compare 2 interrupt */
1419 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1420
1421 /* Disable the complementary One Pulse output */
1422 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1423
1424 /* Disable the Main Output */
1425 __HAL_TIM_MOE_DISABLE(htim);
1426
1427 /* Disable the Peripheral */
1428 __HAL_TIM_DISABLE(htim);
1429
1430 /* Return function status */
1431 return HAL_OK;
1432 }
1433
1434 /**
1435 * @}
1436 */
1437
1438 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1439 * @brief Peripheral Control functions
1440 *
1441 @verbatim
1442 ==============================================================================
1443 ##### Peripheral Control functions #####
1444 ==============================================================================
1445 [..]
1446 This section provides functions allowing to:
1447 (+) Configure the commutation event in case of use of the Hall sensor interface.
1448 (+) Configure Output channels for OC and PWM mode.
1449
1450 (+) Configure Complementary channels, break features and dead time.
1451 (+) Configure Master synchronization.
1452 (+) Configure timer remapping capabilities.
1453 (+) Enable or disable channel grouping.
1454
1455 @endverbatim
1456 * @{
1457 */
1458
1459 /**
1460 * @brief Configure the TIM commutation event sequence.
1461 * @note This function is mandatory to use the commutation event in order to
1462 * update the configuration at each commutation detection on the TRGI input of the Timer,
1463 * the typical use of this feature is with the use of another Timer(interface Timer)
1464 * configured in Hall sensor interface, this interface Timer will generate the
1465 * commutation at its TRGO output (connected to Timer used in this function) each time
1466 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1467 * @param htim TIM handle
1468 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1469 * This parameter can be one of the following values:
1470 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1471 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1472 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1473 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1474 * @arg TIM_TS_NONE: No trigger is needed
1475 * @param CommutationSource the Commutation Event source
1476 * This parameter can be one of the following values:
1477 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1478 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1479 * @retval HAL status
1480 */
HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1481 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1482 uint32_t CommutationSource)
1483 {
1484 /* Check the parameters */
1485 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1486 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1487
1488 __HAL_LOCK(htim);
1489
1490 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1491 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1492 {
1493 /* Select the Input trigger */
1494 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1495 htim->Instance->SMCR |= InputTrigger;
1496 }
1497
1498 /* Select the Capture Compare preload feature */
1499 htim->Instance->CR2 |= TIM_CR2_CCPC;
1500 /* Select the Commutation event source */
1501 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1502 htim->Instance->CR2 |= CommutationSource;
1503
1504 /* Disable Commutation Interrupt */
1505 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1506
1507 /* Disable Commutation DMA request */
1508 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1509
1510 __HAL_UNLOCK(htim);
1511
1512 return HAL_OK;
1513 }
1514
1515 /**
1516 * @brief Configure the TIM commutation event sequence with interrupt.
1517 * @note This function is mandatory to use the commutation event in order to
1518 * update the configuration at each commutation detection on the TRGI input of the Timer,
1519 * the typical use of this feature is with the use of another Timer(interface Timer)
1520 * configured in Hall sensor interface, this interface Timer will generate the
1521 * commutation at its TRGO output (connected to Timer used in this function) each time
1522 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1523 * @param htim TIM handle
1524 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1525 * This parameter can be one of the following values:
1526 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1527 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1528 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1529 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1530 * @arg TIM_TS_NONE: No trigger is needed
1531 * @param CommutationSource the Commutation Event source
1532 * This parameter can be one of the following values:
1533 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1534 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1535 * @retval HAL status
1536 */
HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1537 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1538 uint32_t CommutationSource)
1539 {
1540 /* Check the parameters */
1541 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1542 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1543
1544 __HAL_LOCK(htim);
1545
1546 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1547 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1548 {
1549 /* Select the Input trigger */
1550 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1551 htim->Instance->SMCR |= InputTrigger;
1552 }
1553
1554 /* Select the Capture Compare preload feature */
1555 htim->Instance->CR2 |= TIM_CR2_CCPC;
1556 /* Select the Commutation event source */
1557 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1558 htim->Instance->CR2 |= CommutationSource;
1559
1560 /* Disable Commutation DMA request */
1561 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1562
1563 /* Enable the Commutation Interrupt */
1564 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1565
1566 __HAL_UNLOCK(htim);
1567
1568 return HAL_OK;
1569 }
1570
1571 /**
1572 * @brief Configure the TIM commutation event sequence with DMA.
1573 * @note This function is mandatory to use the commutation event in order to
1574 * update the configuration at each commutation detection on the TRGI input of the Timer,
1575 * the typical use of this feature is with the use of another Timer(interface Timer)
1576 * configured in Hall sensor interface, this interface Timer will generate the
1577 * commutation at its TRGO output (connected to Timer used in this function) each time
1578 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1579 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1580 * @param htim TIM handle
1581 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1582 * This parameter can be one of the following values:
1583 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1584 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1585 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1586 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1587 * @arg TIM_TS_NONE: No trigger is needed
1588 * @param CommutationSource the Commutation Event source
1589 * This parameter can be one of the following values:
1590 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1591 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1592 * @retval HAL status
1593 */
HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1594 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1595 uint32_t CommutationSource)
1596 {
1597 /* Check the parameters */
1598 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1599 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1600
1601 __HAL_LOCK(htim);
1602
1603 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1604 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1605 {
1606 /* Select the Input trigger */
1607 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1608 htim->Instance->SMCR |= InputTrigger;
1609 }
1610
1611 /* Select the Capture Compare preload feature */
1612 htim->Instance->CR2 |= TIM_CR2_CCPC;
1613 /* Select the Commutation event source */
1614 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1615 htim->Instance->CR2 |= CommutationSource;
1616
1617 /* Enable the Commutation DMA Request */
1618 /* Set the DMA Commutation Callback */
1619 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1620 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1621 /* Set the DMA error callback */
1622 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1623
1624 /* Disable Commutation Interrupt */
1625 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1626
1627 /* Enable the Commutation DMA Request */
1628 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1629
1630 __HAL_UNLOCK(htim);
1631
1632 return HAL_OK;
1633 }
1634
1635 /**
1636 * @brief Configures the TIM in master mode.
1637 * @param htim TIM handle.
1638 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1639 * contains the selected trigger output (TRGO) and the Master/Slave
1640 * mode.
1641 * @retval HAL status
1642 */
HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef * htim,TIM_MasterConfigTypeDef * sMasterConfig)1643 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
1644 TIM_MasterConfigTypeDef *sMasterConfig)
1645 {
1646 uint32_t tmpcr2;
1647 uint32_t tmpsmcr;
1648
1649 /* Check the parameters */
1650 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
1651 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
1652 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1653
1654 /* Check input state */
1655 __HAL_LOCK(htim);
1656
1657 /* Change the handler state */
1658 htim->State = HAL_TIM_STATE_BUSY;
1659
1660 /* Get the TIMx CR2 register value */
1661 tmpcr2 = htim->Instance->CR2;
1662
1663 /* Get the TIMx SMCR register value */
1664 tmpsmcr = htim->Instance->SMCR;
1665
1666 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
1667 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
1668 {
1669 /* Check the parameters */
1670 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
1671
1672 /* Clear the MMS2 bits */
1673 tmpcr2 &= ~TIM_CR2_MMS2;
1674 /* Select the TRGO2 source*/
1675 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
1676 }
1677
1678 /* Reset the MMS Bits */
1679 tmpcr2 &= ~TIM_CR2_MMS;
1680 /* Select the TRGO source */
1681 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
1682
1683 /* Update TIMx CR2 */
1684 htim->Instance->CR2 = tmpcr2;
1685
1686 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1687 {
1688 /* Reset the MSM Bit */
1689 tmpsmcr &= ~TIM_SMCR_MSM;
1690 /* Set master mode */
1691 tmpsmcr |= sMasterConfig->MasterSlaveMode;
1692
1693 /* Update TIMx SMCR */
1694 htim->Instance->SMCR = tmpsmcr;
1695 }
1696
1697 /* Change the htim state */
1698 htim->State = HAL_TIM_STATE_READY;
1699
1700 __HAL_UNLOCK(htim);
1701
1702 return HAL_OK;
1703 }
1704
1705 /**
1706 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
1707 * and the AOE(automatic output enable).
1708 * @param htim TIM handle
1709 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
1710 * contains the BDTR Register configuration information for the TIM peripheral.
1711 * @note Interrupts can be generated when an active level is detected on the
1712 * break input, the break 2 input or the system break input. Break
1713 * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
1714 * @retval HAL status
1715 */
HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef * htim,TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)1716 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
1717 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
1718 {
1719 /* Keep this variable initialized to 0 as it is used to configure BDTR register */
1720 uint32_t tmpbdtr = 0U;
1721
1722 /* Check the parameters */
1723 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1724 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
1725 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
1726 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
1727 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
1728 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
1729 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
1730 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
1731 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
1732
1733 /* Check input state */
1734 __HAL_LOCK(htim);
1735
1736 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
1737 the OSSI State, the dead time value and the Automatic Output Enable Bit */
1738
1739 /* Set the BDTR bits */
1740 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
1741 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
1742 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
1743 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
1744 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
1745 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
1746 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
1747 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
1748
1749 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
1750 {
1751 /* Check the parameters */
1752 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
1753 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
1754 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
1755
1756 /* Set the BREAK2 input related BDTR bits */
1757 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
1758 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
1759 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
1760 }
1761
1762 /* Set TIMx_BDTR */
1763 htim->Instance->BDTR = tmpbdtr;
1764
1765 __HAL_UNLOCK(htim);
1766
1767 return HAL_OK;
1768 }
1769
1770 /**
1771 * @brief Configures the break input source.
1772 * @param htim TIM handle.
1773 * @param BreakInput Break input to configure
1774 * This parameter can be one of the following values:
1775 * @arg TIM_BREAKINPUT_BRK: Timer break input
1776 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
1777 * @param sBreakInputConfig Break input source configuration
1778 * @retval HAL status
1779 */
HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput,TIMEx_BreakInputConfigTypeDef * sBreakInputConfig)1780 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
1781 uint32_t BreakInput,
1782 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
1783
1784 {
1785 uint32_t tmporx;
1786 uint32_t bkin_enable_mask;
1787 uint32_t bkin_polarity_mask;
1788 uint32_t bkin_enable_bitpos;
1789 uint32_t bkin_polarity_bitpos;
1790
1791 /* Check the parameters */
1792 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1793 assert_param(IS_TIM_BREAKINPUT(BreakInput));
1794 assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
1795 assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
1796 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
1797
1798 /* Check input state */
1799 __HAL_LOCK(htim);
1800
1801 switch (sBreakInputConfig->Source)
1802 {
1803 case TIM_BREAKINPUTSOURCE_BKIN:
1804 {
1805 bkin_enable_mask = TIM1_AF1_BKINE;
1806 bkin_enable_bitpos = TIM1_AF1_BKINE_Pos;
1807 bkin_polarity_mask = TIM1_AF1_BKINP;
1808 bkin_polarity_bitpos = TIM1_AF1_BKINP_Pos;
1809 break;
1810 }
1811 #if defined(COMP1) && defined(COMP2)
1812 case TIM_BREAKINPUTSOURCE_COMP1:
1813 {
1814 bkin_enable_mask = TIM1_AF1_BKCMP1E;
1815 bkin_enable_bitpos = TIM1_AF1_BKCMP1E_Pos;
1816 bkin_polarity_mask = TIM1_AF1_BKCMP1P;
1817 bkin_polarity_bitpos = TIM1_AF1_BKCMP1P_Pos;
1818 break;
1819 }
1820 case TIM_BREAKINPUTSOURCE_COMP2:
1821 {
1822 bkin_enable_mask = TIM1_AF1_BKCMP2E;
1823 bkin_enable_bitpos = TIM1_AF1_BKCMP2E_Pos;
1824 bkin_polarity_mask = TIM1_AF1_BKCMP2P;
1825 bkin_polarity_bitpos = TIM1_AF1_BKCMP2P_Pos;
1826 break;
1827 }
1828 #endif /* COMP1 && COMP2 */
1829
1830 default:
1831 {
1832 bkin_enable_mask = 0U;
1833 bkin_polarity_mask = 0U;
1834 bkin_enable_bitpos = 0U;
1835 bkin_polarity_bitpos = 0U;
1836 break;
1837 }
1838 }
1839
1840 switch (BreakInput)
1841 {
1842 case TIM_BREAKINPUT_BRK:
1843 {
1844 /* Get the TIMx_AF1 register value */
1845 tmporx = htim->Instance->AF1;
1846
1847 /* Enable the break input */
1848 tmporx &= ~bkin_enable_mask;
1849 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1850
1851 /* Set the break input polarity */
1852 tmporx &= ~bkin_polarity_mask;
1853 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1854
1855 /* Set TIMx_AF1 */
1856 htim->Instance->AF1 = tmporx;
1857 break;
1858 }
1859 case TIM_BREAKINPUT_BRK2:
1860 {
1861 /* Get the TIMx_AF2 register value */
1862 tmporx = htim->Instance->AF2;
1863
1864 /* Enable the break input */
1865 tmporx &= ~bkin_enable_mask;
1866 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1867
1868 /* Set the break input polarity */
1869 tmporx &= ~bkin_polarity_mask;
1870 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1871
1872 /* Set TIMx_AF2 */
1873 htim->Instance->AF2 = tmporx;
1874 break;
1875 }
1876 default:
1877 break;
1878 }
1879
1880 __HAL_UNLOCK(htim);
1881
1882 return HAL_OK;
1883 }
1884
1885 /**
1886 * @brief Configures the TIMx Remapping input capabilities.
1887 * @param htim TIM handle.
1888 * @param Remap specifies the TIM remapping source.
1889 * For TIM1, the parameter is a combination of 2 fields (field1 | field2):
1890 *
1891 * field1 can have the following values:
1892 * @arg TIM_TIM1_ETR_ADC1_GPIO: TIM1_ETR is connected to I/O
1893 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
1894 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
1895 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
1896 * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output (*)
1897 * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output (*)
1898 * field2 can have the following values:
1899 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to I/O
1900 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output (*)
1901 *
1902 * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3):
1903 *
1904 * field1 can have the following values:
1905 * @arg TIM_TIM2_ITR1_NONE: No internal trigger on TIM2_ITR1
1906 * @arg TIM_TIM2_ITR1_USB: TIM2_ITR1 is connected to USB SOF (*)
1907 *
1908 * field2 can have the following values:
1909 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to I/O
1910 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
1911 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output (*)
1912 * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output (*)
1913 *
1914 * field3 can have the following values:
1915 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to I/O
1916 * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output (*)
1917 * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output (*)
1918 * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output (*)
1919 *
1920 * For TIM16, the parameter can have the following values:
1921 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to I/O
1922 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
1923 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
1924 * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
1925 *
1926 * For TIM17, the parameter can have the following values:
1927 * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to I/O
1928 * @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI (constraint: MSI clock < 1/4 TIM APB clock)
1929 * @arg TIM_TIM17_TI1_HSE: TIM17 TI1 is connected to HSE div 32
1930 * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO
1931 *
1932 * (*) Value not defined in all devices.
1933 *
1934 * @retval HAL status
1935 */
HAL_TIMEx_RemapConfig(TIM_HandleTypeDef * htim,uint32_t Remap)1936 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
1937 {
1938 uint32_t tmpor;
1939 uint32_t tmpaf1;
1940
1941 /* Check parameters */
1942 assert_param(IS_TIM_REMAP(htim->Instance, Remap));
1943
1944 __HAL_LOCK(htim);
1945
1946 /* Read TIMx_OR */
1947 tmpor = READ_REG(htim->Instance->OR);
1948
1949 /* Read TIMx_AF1 */
1950 tmpaf1 = READ_REG(htim->Instance->AF1);
1951
1952 /* Set ETR_SEL bit field (if required) */
1953 if (IS_TIM_ETRSEL_INSTANCE(htim->Instance))
1954 {
1955 if ((Remap & TIM1_AF1_ETRSEL) != (uint32_t)RESET)
1956 {
1957 /* COMP1 output or COMP2 output connected to ETR input */
1958 MODIFY_REG(tmpaf1, TIM1_AF1_ETRSEL, (Remap & TIM1_AF1_ETRSEL));
1959 }
1960 else
1961 {
1962 /* ETR legacy mode */
1963 MODIFY_REG(tmpaf1, TIM1_AF1_ETRSEL, 0U);
1964 }
1965
1966 /* Set TIMx_AF1 */
1967 WRITE_REG(htim->Instance->AF1, tmpaf1);
1968 }
1969
1970 /* Set other remapping capabilities */
1971 MODIFY_REG(tmpor, TIM_GET_OR_MASK(htim->Instance), (Remap & (~TIM1_AF1_ETRSEL)));
1972
1973 /* Set TIMx_OR */
1974 WRITE_REG(htim->Instance->OR, tmpor);
1975
1976 __HAL_UNLOCK(htim);
1977
1978 return HAL_OK;
1979 }
1980
1981 /**
1982 * @brief Group channel 5 and channel 1, 2 or 3
1983 * @param htim TIM handle.
1984 * @param Channels specifies the reference signal(s) the OC5REF is combined with.
1985 * This parameter can be any combination of the following values:
1986 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
1987 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
1988 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
1989 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
1990 * @retval HAL status
1991 */
HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef * htim,uint32_t Channels)1992 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
1993 {
1994 /* Check parameters */
1995 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
1996 assert_param(IS_TIM_GROUPCH5(Channels));
1997
1998 /* Process Locked */
1999 __HAL_LOCK(htim);
2000
2001 htim->State = HAL_TIM_STATE_BUSY;
2002
2003 /* Clear GC5Cx bit fields */
2004 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
2005
2006 /* Set GC5Cx bit fields */
2007 htim->Instance->CCR5 |= Channels;
2008
2009 /* Change the htim state */
2010 htim->State = HAL_TIM_STATE_READY;
2011
2012 __HAL_UNLOCK(htim);
2013
2014 return HAL_OK;
2015 }
2016
2017 /**
2018 * @}
2019 */
2020
2021 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2022 * @brief Extended Callbacks functions
2023 *
2024 @verbatim
2025 ==============================================================================
2026 ##### Extended Callbacks functions #####
2027 ==============================================================================
2028 [..]
2029 This section provides Extended TIM callback functions:
2030 (+) Timer Commutation callback
2031 (+) Timer Break callback
2032
2033 @endverbatim
2034 * @{
2035 */
2036
2037 /**
2038 * @brief Hall commutation changed callback in non-blocking mode
2039 * @param htim TIM handle
2040 * @retval None
2041 */
HAL_TIMEx_CommutCallback(TIM_HandleTypeDef * htim)2042 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
2043 {
2044 /* Prevent unused argument(s) compilation warning */
2045 UNUSED(htim);
2046
2047 /* NOTE : This function should not be modified, when the callback is needed,
2048 the HAL_TIMEx_CommutCallback could be implemented in the user file
2049 */
2050 }
2051 /**
2052 * @brief Hall commutation changed half complete callback in non-blocking mode
2053 * @param htim TIM handle
2054 * @retval None
2055 */
HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef * htim)2056 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
2057 {
2058 /* Prevent unused argument(s) compilation warning */
2059 UNUSED(htim);
2060
2061 /* NOTE : This function should not be modified, when the callback is needed,
2062 the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
2063 */
2064 }
2065
2066 /**
2067 * @brief Hall Break detection callback in non-blocking mode
2068 * @param htim TIM handle
2069 * @retval None
2070 */
HAL_TIMEx_BreakCallback(TIM_HandleTypeDef * htim)2071 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2072 {
2073 /* Prevent unused argument(s) compilation warning */
2074 UNUSED(htim);
2075
2076 /* NOTE : This function should not be modified, when the callback is needed,
2077 the HAL_TIMEx_BreakCallback could be implemented in the user file
2078 */
2079 }
2080
2081 /**
2082 * @brief Hall Break2 detection callback in non blocking mode
2083 * @param htim: TIM handle
2084 * @retval None
2085 */
HAL_TIMEx_Break2Callback(TIM_HandleTypeDef * htim)2086 __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
2087 {
2088 /* Prevent unused argument(s) compilation warning */
2089 UNUSED(htim);
2090
2091 /* NOTE : This function Should not be modified, when the callback is needed,
2092 the HAL_TIMEx_Break2Callback could be implemented in the user file
2093 */
2094 }
2095 /**
2096 * @}
2097 */
2098
2099 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2100 * @brief Extended Peripheral State functions
2101 *
2102 @verbatim
2103 ==============================================================================
2104 ##### Extended Peripheral State functions #####
2105 ==============================================================================
2106 [..]
2107 This subsection permits to get in run-time the status of the peripheral
2108 and the data flow.
2109
2110 @endverbatim
2111 * @{
2112 */
2113
2114 /**
2115 * @brief Return the TIM Hall Sensor interface handle state.
2116 * @param htim TIM Hall Sensor handle
2117 * @retval HAL state
2118 */
HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef * htim)2119 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
2120 {
2121 return htim->State;
2122 }
2123
2124 /**
2125 * @}
2126 */
2127
2128 /**
2129 * @}
2130 */
2131
2132 /* Private functions ---------------------------------------------------------*/
2133 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
2134 * @{
2135 */
2136
2137 /**
2138 * @brief TIM DMA Commutation callback.
2139 * @param hdma pointer to DMA handle.
2140 * @retval None
2141 */
TIMEx_DMACommutationCplt(DMA_HandleTypeDef * hdma)2142 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2143 {
2144 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2145
2146 /* Change the htim state */
2147 htim->State = HAL_TIM_STATE_READY;
2148
2149 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2150 htim->CommutationCallback(htim);
2151 #else
2152 HAL_TIMEx_CommutCallback(htim);
2153 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2154 }
2155
2156 /**
2157 * @brief TIM DMA Commutation half complete callback.
2158 * @param hdma pointer to DMA handle.
2159 * @retval None
2160 */
TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef * hdma)2161 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
2162 {
2163 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2164
2165 /* Change the htim state */
2166 htim->State = HAL_TIM_STATE_READY;
2167
2168 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2169 htim->CommutationHalfCpltCallback(htim);
2170 #else
2171 HAL_TIMEx_CommutHalfCpltCallback(htim);
2172 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2173 }
2174
2175
2176 /**
2177 * @brief Enables or disables the TIM Capture Compare Channel xN.
2178 * @param TIMx to select the TIM peripheral
2179 * @param Channel specifies the TIM Channel
2180 * This parameter can be one of the following values:
2181 * @arg TIM_CHANNEL_1: TIM Channel 1
2182 * @arg TIM_CHANNEL_2: TIM Channel 2
2183 * @arg TIM_CHANNEL_3: TIM Channel 3
2184 * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2185 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2186 * @retval None
2187 */
TIM_CCxNChannelCmd(TIM_TypeDef * TIMx,uint32_t Channel,uint32_t ChannelNState)2188 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2189 {
2190 uint32_t tmp;
2191
2192 tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2193
2194 /* Reset the CCxNE Bit */
2195 TIMx->CCER &= ~tmp;
2196
2197 /* Set or reset the CCxNE Bit */
2198 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2199 }
2200 /**
2201 * @}
2202 */
2203
2204 #endif /* HAL_TIM_MODULE_ENABLED */
2205 /**
2206 * @}
2207 */
2208
2209 /**
2210 * @}
2211 */
2212
2213 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2214