1 // 2 // Copyright (C) 2009-2021 Intel Corporation 3 // 4 // SPDX-License-Identifier: MIT 5 // 6 // 7 8 //******************************************************************************************** 9 // WARNING!!!!! 10 // 11 // This file is shared by OpenCL and C++ source code and must be a pure C header 12 // There should only be C structure definitions and trivial inline functions here 13 // 14 //******************************************************************************************** 15 16 #pragma once 17 18 #include "GRLOCLCompatibility.h" 19 20 GRL_NAMESPACE_BEGIN(GRL) 21 22 typedef uint32_t dword; 23 typedef uint64_t qword; 24 typedef qword gpuva_t; 25 26 enum_uint8(InstanceFlags)27 enum_uint8( InstanceFlags ) 28 { 29 INSTANCE_FLAG_TRIANGLE_CULL_DISABLE = 0x1, 30 INSTANCE_FLAG_TRIANGLE_FRONT_COUNTERCLOCKWISE = 0x2, 31 INSTANCE_FLAG_FORCE_OPAQUE = 0x4, 32 INSTANCE_FLAG_FORCE_NON_OPAQUE = 0x8, 33 }; 34 enum_uint8(GeometryFlags)35 enum_uint8( GeometryFlags ) 36 { 37 GEOMETRY_FLAG_NONE = 0x0, 38 GEOMETRY_FLAG_OPAQUE = 0x1, 39 GEOMETRY_FLAG_NO_DUPLICATE_ANYHIT_INVOCATION = 0x2, 40 }; 41 enum_uint8(GeometryType)42 enum_uint8( GeometryType ) 43 { 44 GEOMETRY_TYPE_TRIANGLES = 0, 45 GEOMETRY_TYPE_PROCEDURAL = 1, 46 NUM_GEOMETRY_TYPES = 2 47 }; 48 49 // NOTE: Does NOT match DXR enum_uint8(IndexFormat)50 enum_uint8( IndexFormat ) 51 { 52 INDEX_FORMAT_NONE = 0, // INDEX_FORMAT_NONE Indicates non-indexed geometry 53 INDEX_FORMAT_R16_UINT = 2, 54 INDEX_FORMAT_R32_UINT = 4, 55 INDEX_FORMAT_END = INDEX_FORMAT_R32_UINT + 1 56 }; 57 58 // NOTE: Does NOT match DXR enum_uint8(VertexFormat)59 enum_uint8( VertexFormat ) 60 { 61 VERTEX_FORMAT_R32G32_FLOAT = 0, 62 VERTEX_FORMAT_R32G32B32_FLOAT = 1, 63 VERTEX_FORMAT_R16G16_FLOAT = 2, 64 VERTEX_FORMAT_R16G16B16A16_FLOAT = 3, 65 VERTEX_FORMAT_R16G16_SNORM = 4, 66 VERTEX_FORMAT_R16G16B16A16_SNORM = 5, 67 VERTEX_FORMAT_R16G16B16A16_UNORM = 6, 68 VERTEX_FORMAT_R16G16_UNORM = 7, 69 VERTEX_FORMAT_R10G10B10A2_UNORM = 8, 70 VERTEX_FORMAT_R8G8B8A8_UNORM = 9, 71 VERTEX_FORMAT_R8G8_UNORM = 10, 72 VERTEX_FORMAT_R8G8B8A8_SNORM = 11, 73 VERTEX_FORMAT_R8G8_SNORM = 12, 74 VERTEX_FORMAT_END = VERTEX_FORMAT_R8G8_SNORM + 1 75 }; 76 77 78 enum_uint32(RTASFlags)79 enum_uint32(RTASFlags) 80 { 81 // These flags match DXR 82 BUILD_FLAG_ALLOW_UPDATE = 1<<0, 83 BUILD_FLAG_ALLOW_COMPACTION = 1<<1, 84 BUILD_FLAG_PREFER_FAST_TRACE = 1<<2, 85 BUILD_FLAG_PREFER_FAST_BUILD = 1<<3, 86 BUILD_FLAG_MINIMIZE_MEMORY = 1<<4, 87 BUILD_FLAG_PERFORM_UPDATE = 1<<5, 88 89 // internal flags start here 90 BUILD_FLAG_DISALLOW_REBRAID = 1<<16, 91 92 BUILD_FLAG_ALL = 0x0001003f 93 }; 94 enum_uint8(BVHType)95 enum_uint8(BVHType) 96 { 97 BVH_TYPE_NONE, // This is a sentinel for drivers to use when compiling out GRL on non-RT devices 98 BVH_TYPE_GEN12, 99 }; 100 enum_uint8(PostBuildInfoType)101 enum_uint8(PostBuildInfoType) 102 { 103 PBI_CURRENT_SIZE, 104 PBI_COMPACTED_SIZE, 105 PBI_DXR_TOOLS_VISUALIZATION_DESC, 106 PBI_DXR_SERIALIZATION_DESC, 107 }; 108 enum_uint32(HazardTypes)109 enum_uint32(HazardTypes) 110 { 111 HAZARD_RTAS_READ = 1 << 0, 112 HAZARD_RTAS_WRITE = 1 << 1, 113 HAZARD_READ = 1 << 2, 114 HAZARD_WRITE = 1 << 3, 115 HAZARD_ALL = 0xf 116 }; 117 enum_uint32(RaytracingAccelerationStructureType)118 enum_uint32(RaytracingAccelerationStructureType) 119 { 120 TOP_LEVEL = 0x0, 121 BOTTOM_LEVEL = 0x1, 122 }; 123 124 typedef struct PostbuildInfoCurrentSize 125 { 126 uint64_t CurrentSizeInBytes; 127 } PostbuildInfoCurrentSize; 128 129 typedef struct PostbuildInfoCompactedSize 130 { 131 uint64_t CompactedSizeInBytes; 132 } PostbuildInfoCompactedSize; 133 134 typedef struct PostbuildInfoToolsVisualizationDesc 135 { 136 uint64_t DecodedSizeInBytes; 137 } PostbuildInfoToolsVisualizationDesc; 138 139 typedef struct PostbuildInfoSerializationDesc 140 { 141 uint64_t SerializedSizeInBytes; 142 uint64_t NumBottomLevelAccelerationStructurePointers; 143 } PostbuildInfoSerializationDesc; 144 145 typedef struct DecodeHeader 146 { 147 RaytracingAccelerationStructureType Type; 148 uint32_t NumDesc; 149 } DecodeHeader; 150 151 152 GRL_NAMESPACE_END(GRL)