1 /*============================================================================== 2 Copyright(c) 2024 Intel Corporation 3 Permission is hereby granted, free of charge, to any person obtaining a 4 copy of this software and associated documentation files(the "Software"), 5 to deal in the Software without restriction, including without limitation 6 the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 and / or sell copies of the Software, and to permit persons to whom the 8 Software is furnished to do so, subject to the following conditions: 9 10 The above copyright notice and this permission notice shall be included 11 in all copies or substantial portions of the Software. 12 13 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 14 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 OTHER DEALINGS IN THE SOFTWARE. 20 ============================================================================*/ 21 #include "GmmCachePolicyConditionals.h" 22 23 #define _SN 0x1 24 #define _IA_GPU_SN 0x2 25 #define _WT 0x2 26 #define _L1_WB 0x2 27 #define dGPU SKU(FtrDiscrete) 28 29 #if (_DEBUG || _RELEASE_INTERNAL) 30 #define _WA_WB_Emu (WA(Wa_EmuMufasaSupportOnBmg)) 31 #else 32 #define _WA_WB_Emu 0 33 #endif 34 35 // GmmLib can apply 2Way WA to GMM_RESOURCE_USAGE_HW_CONTEXT. 36 #define _WA_2W (WA(Wa_14018976079) || WA(Wa_14018984349)) ? 2 : 0 37 #define _L3_P ((_WA_2W == 2) ? 1 : 0) // L3 Promotion to WB if 2Way Coh WA is set 38 39 // clang-format off 40 //typedef enum GMM_CACHING_POLICY_REC 41 //{ 42 // GMM_UC = 0x0, //uncached 43 // GMM_WB = 0x1, // Write back 44 // GMM_WT = 0x2, // write-through 45 // GMM_WBTD = 0x3, // WB_T_Display 46 // GMM_WBTA = 0x4, // WB_T_App 47 // GMM_WBP = 0x5, // write bypass mode 48 // GMM_WS = 0x6, // Write-Streaming 49 //} GMM_CACHING_POLICY; 50 // 51 // typedef enum GMM_COHERENCY_TYPE_REC 52 //{ 53 //GMM_NON_COHERENT_NO_SNOOP = 0x0, 54 //GMM_COHERENT_ONE_WAY_IA_SNOOP = 0x1, 55 //GMM_COHERENT_TWO_WAY_IA_GPU_SNOOP = 0x2 56 //} GMM_COHERENCY_TYPE; 57 // Cache Policy Definition 58 // L3_CLOS : L3 class of service (0,1,2,3) 59 // IgPAT : Ignore PAT 1 = Override by MOCS, 0 = Defer to PAT 60 //Macros for segment-preference 61 #define NoP 0x0 62 //Wa_14018443005 63 #define COMPRESSED_PAT_WITH_L4WB_L3UC_0 PAT10 64 #define COMPRESSED_PAT_WITH_L4WB_L3WB_0 PAT14 65 #define COMPRESSED_PAT_WITH_L4UC_L3UC_0 PAT12 66 #define COMPRESSED_PAT_WITH_L4UC_L3WB_0 PAT9 67 68 #define ISWA_1401844305USAGE(usage) ((Usage == GMM_RESOURCE_USAGE_BLT_SOURCE) || \ 69 (Usage == GMM_RESOURCE_USAGE_BLT_DESTINATION) || \ 70 (Usage == GMM_RESOURCE_USAGE_COPY_SOURCE) || \ 71 (Usage == GMM_RESOURCE_USAGE_COPY_DEST)) 72 //******************************************************************************************************************************************************************/ 73 // USAGE TYPE L3_CC, L3_CLOS, L1CC, L2CC, L4CC, Coherency, IgPAT, SegOv) 74 /*******************************************************************************************************************************************************************/ 75 // KMD Usages 76 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BATCH_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 77 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMP_FRAME_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 78 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SWITCH_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 79 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CURSOR , 3, 0, 0, 0 , 0 , 0 , 0, NoP); 80 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAY_STATIC_IMG_FOR_SMOOTH_ROTATION_BUFFER , 3, 0, 0, 0 , 0 , 0 , 0, NoP); 81 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DUMMY_PAGE , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 82 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GDI_SURFACE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 83 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GENERIC_KMD_RESOURCE , 1, 0, 0, 0 , 0 , _WA_2W, 1, NoP); 84 // GMM_RESOURCE_USAGE_GFX_RING is only used if WaEnableRingHostMapping is enabled . 85 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GFX_RING , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 86 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GTT_TRANSFER_REGION , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 87 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HW_CONTEXT , 1, 0, 0, 0 , 0 , _WA_2W, 1, NoP); 88 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATE_MANAGER_KERNEL_STATE , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 89 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_STAGING_SURFACE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 90 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MBM_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 91 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_NNDI_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 92 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OVERLAY_MBM , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 93 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRIMARY_SURFACE , 3, 0, 0, 0 , 0 , 0 , 0, NoP); 94 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SCREEN_PROTECTION_INTERMEDIATE_SURFACE , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 95 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADOW_SURFACE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 96 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SM_SCRATCH_STATE , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 97 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATUS_PAGE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 98 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TIMER_PERF_QUEUE , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 99 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNKNOWN , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 100 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNMAP_PAGING_RESERVED_GTT_DMA_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 101 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VSC_BATCH_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 102 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WA_BATCH_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 103 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_OCA_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 104 105 // 106 // 3D Usages 107 // 108 // USAGE TYPE L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency , IgPAT) 109 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_DEPTH_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 110 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_HIZ , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 111 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UMD_BATCH_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 112 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BINDING_TABLE_POOL , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 113 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CCS , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 114 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONSTANT_BUFFER_POOL , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 115 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEPTH_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 116 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAYABLE_RENDER_TARGET , 3, 0, 0, 0 , 0 , 0 , 0, NoP); 117 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GATHER_POOL , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 118 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_SURFACE_STATE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 119 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_DYNAMIC_STATE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 120 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 121 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE_UC , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 122 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_STATELESS_DATA_PORT , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 123 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_STATELESS_DATA_PORT_L1_CACHED , 1, 0, 1, 0 , 0 , 0 , 1, NoP); 124 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INDIRECT_OBJECT , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 125 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INSTRUCTION , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 126 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HIZ , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 127 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 128 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER_L3_COHERENT_UC , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 129 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER_L3_CACHED , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 130 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MCS , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 131 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PUSH_CONSTANT_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 132 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PULL_CONSTANT_BUFFER , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 133 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_QUERY , _WA_WB_Emu, 0, 0, 0 , 0 , 1 , 1, NoP); 134 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 135 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADER_RESOURCE , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 136 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STAGING , _WA_WB_Emu, 0, 0, 0 , 0 , 1 , 1, NoP); 137 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STENCIL_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 138 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STREAM_OUTPUT_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 139 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_POOL , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 140 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADER_RESOURCE_LLC_BYPASS , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 141 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MOCS_62 , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 142 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_L3_EVICTION , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 143 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_L3_EVICTION_SPECIAL , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 144 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UMD_OCA_BUFFER , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 145 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PROCEDURAL_TEXTURE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 146 147 // Tiled Resource 148 // 149 // USAGE TYPE L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency, IgPAT) 150 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_DEPTH_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 151 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_HIZ , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 152 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_MCS , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 153 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_CCS , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 154 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 155 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET_AND_SHADER_RESOURCE , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 156 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_SHADER_RESOURCE , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 157 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_UAV , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 158 159 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UAV , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 160 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 161 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER_L3_COHERENT_UC , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 162 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER_L3_CACHED , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 163 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OGL_WSTN_VERTEX_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 164 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_POSH_VERTEX_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 165 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET_AND_SHADER_RESOURCE , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 166 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WDDM_HISTORY_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 167 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SAVE_RESTORE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 168 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PTBR_PAGE_POOL , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 169 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PTBR_BATCH_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 170 171 // 172 // CM USAGES 173 // 174 // USAGE TYPE L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency, IgPAT) 175 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_SurfaceState, 1, 0, 0, 0 , 1 , 0 , 1, NoP); 176 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_L1_Enabled_SurfaceState, 1, 0, 1, 0 , 1 , 0 , 1, NoP); 177 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_StateHeap, 1, 0, 0, 0 , 1 , 0 , 1, NoP); 178 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_L3_SurfaceState, 0, 0, 0, 0 , 1 , 0 , 1, NoP); 179 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_CACHE_SurfaceState, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 180 181 // 182 // MP USAGES 183 // 184 // USAGE TYPE L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency, IgPAT ) 185 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_BEGIN, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 186 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 187 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT_FF, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 188 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT_RCS, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 189 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState, 1, 0, 0, 0 , 1 , 0 , 1, NoP); 190 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState_FF, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 191 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState_RCS, 1, 0, 0, 0 , 1 , 0 , 1, NoP); 192 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_END, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 193 194 // MHW - SFC 195 // USAGE TYPE , L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency, IgPAT) 196 DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_CurrentOutputSurface, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 197 DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_AvsLineBufferSurface, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 198 DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_IefLineBufferSurface, 0, 0, 0, 0 , 0 , 0 , 1, NoP); 199 200 201 202 /**********************************************************************************/ 203 204 // 205 // OCL Usages 206 // 207 // USAGE TYPE L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency , IgPAT) 208 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 209 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 210 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CSR_UC , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 211 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 212 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_IMAGE , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 213 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 214 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST_HDC , 1, 0, 5, 0 , 0 , 0 , 1, NoP); 215 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SCRATCH , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 216 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRIVATE_MEM , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 217 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRINTF_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 218 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_STATE_HEAP_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 219 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER , 1, 0, 0, 0 , 0 , 1 , 1, NoP); 220 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER_CACHELINE_MISALIGNED , 0, 0, 0, 0 , 0 , 0 , 1, NoP); 221 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_ISH_HEAP_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 222 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TAG_MEMORY_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 223 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TEXTURE_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 224 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SELF_SNOOP_BUFFER , 1, 0, 0, 0 , 0 , 0 , 1, NoP); 225 /**********************************************************************************/ 226 227 // Cross Adapter 228 // USAGE TYPE ,L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency , IgPAT) 229 DEFINE_CACHE_ELEMENT( GMM_RESOURCE_USAGE_XADAPTER_SHARED_RESOURCE , 0, 0, 1, 0 , 0 , 0 , 1, NoP); 230 /**********************************************************************************/ 231 232 // BCS 233 // USAGE TYPE L3_CC, L3_CLOS, L1CC, L2CC, L4CC, Coherency, IgPAT) 234 DEFINE_CACHE_ELEMENT( GMM_RESOURCE_USAGE_BLT_SOURCE , 0, 0, 0, 0, 0, 0, 1, NoP); 235 DEFINE_CACHE_ELEMENT( GMM_RESOURCE_USAGE_BLT_DESTINATION , 0, 0, 0, 0, 0, 0, 1, NoP); 236 237 /**********************************************************************************/ 238 // 239 // MEDIA USAGES 240 // USAGE TYPE L3_CC, L3_CLOS,L1CC, L2CC, L4CC, Coherency, IgPAT ) 241 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MEDIA_BATCH_BUFFERS , 0, 0, 0, 0, 0, 0 , 1, NoP ); 242 // DECODE 243 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_INPUT_BITSTREAM , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 244 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_INPUT_REFERENCE , dGPU, 0, 0, 1, 1, 0 , 1, NoP ); 245 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_INTERNAL_READ , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 246 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_INTERNAL_WRITE , 0, 0, 0, 0, 0, 0 , 1, NoP ); 247 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_INTERNAL_READ_WRITE_CACHE , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 248 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_INTERNAL_READ_WRITE_NOCACHE , 0, 0, 0, 0, 0, 0 , 1, NoP ); 249 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_OUTPUT_PICTURE , 3, 0, 0, 0, 2, 0 , 0, NoP ); 250 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_OUTPUT_STATISTICS_WRITE , 0, 0, 0, 0, 0, 1 , 1, NoP ); 251 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DECODE_OUTPUT_STATISTICS_READ_WRITE , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 252 // ENCODE 253 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_INPUT_RAW , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 254 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_INPUT_RECON , dGPU, 0, 0, 1, 1, 0 , 1, NoP ); 255 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_INTERNAL_READ , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 256 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_INTERNAL_WRITE , 0, 0, 0, 0, 0, 0 , 1, NoP ); 257 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_INTERNAL_READ_WRITE_CACHE , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 258 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_INTERNAL_READ_WRITE_NOCACHE , 0, 0, 0, 0, 0, 0 , 1, NoP ); 259 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_EXTERNAL_READ , 0, 0, 0, 0, 0, 0 , 1, NoP ); 260 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_OUTPUT_PICTURE , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 261 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_OUTPUT_BITSTREAM , 0, 0, 0, 0, 0, 1 , 1, NoP ); 262 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_OUTPUT_STATISTICS_WRITE , 0, 0, 0, 0, 0, 1 , 1, NoP ); 263 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ENCODE_OUTPUT_STATISTICS_READ_WRITE , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 264 // VP 265 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INPUT_PICTURE_FF , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 266 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INPUT_REFERENCE_FF , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 267 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INTERNAL_READ_FF , 0, 0, 0, 0, 1, 0 , 1, NoP ); 268 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INTERNAL_WRITE_FF , 0, 0, 0, 0, 1, 0 , 1, NoP ); 269 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_FF , dGPU, 0, 0, 0, 1, 0 , 1, NoP ); 270 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_OUTPUT_PICTURE_FF , 3, 0, 0, 0, 2, 0 , 0, NoP ); 271 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INPUT_PICTURE_RENDER , 1, 0, 0, 0, 0, 0 , 1, NoP ); 272 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INPUT_REFERENCE_RENDER , 1, 0, 0, 0, 0, 0 , 1, NoP ); 273 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INTERNAL_READ_RENDER , 0, 0, 0, 0, 0, 0 , 1, NoP ); 274 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INTERNAL_WRITE_RENDER , 0, 0, 0, 0, 0, 0 , 1, NoP ); 275 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_RENDER , 1, 0, 0, 0, 0, 0 , 1, NoP ); 276 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP_OUTPUT_PICTURE_RENDER , 3, 0, 0, 0, 0, 0 , 0, NoP ); 277 // CP 278 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CP_EXTERNAL_READ , 0, 0, 0, 0, 0, 0 , 1, NoP ); 279 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CP_INTERNAL_WRITE , 0, 0, 0, 0, 0, 0 , 1, NoP ); 280 281 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GSC_KMD_RESOURCE , 0, 0, 0, 0, 0, 0 , 1, NoP ); 282 283 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_NULL_CONTEXT_BB , 0, 0, 0, 0 , 0, 0 , 1, NoP ); 284 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMMAND_STREAMER , 0, 0, 0, 0 , 0, 0 , 1, NoP ); 285 286 // USAGE TYPE , L3_CC, L3_CLOS, L1CC, L2CC, L4CC, Coherency, IgPAT) 287 // Uncacheable copies 288 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_SOURCE , 0, 0, 0 , 0, 0, 0, 1, NoP); 289 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_DEST , 0, 0, 0 , 0, 0, 0, 1, NoP); 290 291 // clang-format on 292 293 #undef _WT 294 #include "GmmCachePolicyUndefineConditionals.h" 295 296