1 /*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #pragma once
26
27 #ifdef __aarch64__
28
29 namespace {
30
a64_transpose_interleave_16_1x4(uint8_t * out,const uint8_t * in,size_t width,size_t in_stride,size_t height)31 void a64_transpose_interleave_16_1x4(uint8_t *out, const uint8_t *in, size_t width, size_t in_stride, size_t height)
32 {
33 uint8_t *pad_row = reinterpret_cast<uint8_t *>(alloca(width * sizeof(uint8_t)));
34
35 if (height % 4) {
36 memset(pad_row, 0, width * sizeof(uint8_t));
37 }
38
39 size_t out_stride = 16 * roundup<size_t>(height, 4) * sizeof(uint8_t);
40
41 __asm__ __volatile__(
42 "cmp %x[height], #0x10\n"
43 "blt 8f\n"
44 "1:" // Main row loop: Head
45 "mov x16, %x[in]\n"
46 "mov x15, %x[out]\n"
47 "add x14, x16, %x[in_stride]\n"
48 "add x13, x14, %x[in_stride]\n"
49 "add x12, x13, %x[in_stride]\n"
50 "add x11, x12, %x[in_stride]\n"
51 "add x10, x11, %x[in_stride]\n"
52 "add x9, x10, %x[in_stride]\n"
53 "add x28, x9, %x[in_stride]\n"
54 "add x27, x28, %x[in_stride]\n"
55 "add x26, x27, %x[in_stride]\n"
56 "add x25, x26, %x[in_stride]\n"
57 "add x24, x25, %x[in_stride]\n"
58 "add x23, x24, %x[in_stride]\n"
59 "add x22, x23, %x[in_stride]\n"
60 "add x21, x22, %x[in_stride]\n"
61 "add x20, x21, %x[in_stride]\n"
62 "add %x[in], x20, %x[in_stride]\n"
63 "sub %x[height], %x[height], #0x10\n"
64 "mov x19, %x[width]\n"
65 "cmp x19, #0x10\n"
66 "blt 3f\n"
67 "2:" // Main row loop: Column loop
68 "ldr q18, [x16], #0x10\n"
69 "sub x19, x19, #0x10\n"
70 "ldr q20, [x14], #0x10\n"
71 "cmp x19, #0x10\n"
72 "ldr q17, [x13], #0x10\n"
73 "zip1 v19.16b, v18.16b, v17.16b\n"
74 "ldr q16, [x12], #0x10\n"
75 "zip2 v18.16b, v18.16b, v17.16b\n"
76 "ldr q3, [x11], #0x10\n"
77 "ldr q2, [x10], #0x10\n"
78 "zip1 v17.16b, v20.16b, v16.16b\n"
79 "ldr q1, [x9], #0x10\n"
80 "zip2 v16.16b, v20.16b, v16.16b\n"
81 "ldr q0, [x28], #0x10\n"
82 "zip1 v31.16b, v19.16b, v17.16b\n"
83 "ldr q30, [x27], #0x10\n"
84 "zip2 v20.16b, v19.16b, v17.16b\n"
85 "ldr q29, [x26], #0x10\n"
86 "zip1 v19.16b, v18.16b, v16.16b\n"
87 "ldr q28, [x25], #0x10\n"
88 "zip2 v18.16b, v18.16b, v16.16b\n"
89 "ldr q27, [x24], #0x10\n"
90 "zip1 v17.16b, v3.16b, v1.16b\n"
91 "ldr q26, [x23], #0x10\n"
92 "zip1 v16.16b, v2.16b, v0.16b\n"
93 "ldr q25, [x22], #0x10\n"
94 "zip1 v24.16b, v17.16b, v16.16b\n"
95 "ldr q23, [x21], #0x10\n"
96 "zip2 v22.16b, v17.16b, v16.16b\n"
97 "ldr q21, [x20], #0x10\n"
98 "zip2 v17.16b, v3.16b, v1.16b\n"
99 "str q31, [x15, #0x0]\n"
100 "zip2 v16.16b, v2.16b, v0.16b\n"
101 "str q20, [x15, #0x10]\n"
102 "zip1 v20.16b, v17.16b, v16.16b\n"
103 "str q19, [x15, #0x20]\n"
104 "zip2 v19.16b, v17.16b, v16.16b\n"
105 "str q18, [x15, #0x30]\n"
106 "zip1 v18.16b, v30.16b, v28.16b\n"
107 "str q24, [x15, #0x40]\n"
108 "zip1 v16.16b, v29.16b, v27.16b\n"
109 "str q22, [x15, #0x50]\n"
110 "zip1 v17.16b, v18.16b, v16.16b\n"
111 "str q20, [x15, #0x60]\n"
112 "zip2 v16.16b, v18.16b, v16.16b\n"
113 "str q19, [x15, #0x70]\n"
114 "zip2 v18.16b, v30.16b, v28.16b\n"
115 "str q17, [x15, #0x80]\n"
116 "zip2 v17.16b, v29.16b, v27.16b\n"
117 "str q16, [x15, #0x90]\n"
118 "zip1 v16.16b, v18.16b, v17.16b\n"
119 "str q16, [x15, #0xa0]\n"
120 "zip2 v16.16b, v18.16b, v17.16b\n"
121 "str q16, [x15, #0xb0]\n"
122 "zip1 v18.16b, v26.16b, v23.16b\n"
123 "zip1 v17.16b, v25.16b, v21.16b\n"
124 "zip1 v16.16b, v18.16b, v17.16b\n"
125 "str q16, [x15, #0xc0]\n"
126 "zip2 v16.16b, v18.16b, v17.16b\n"
127 "str q16, [x15, #0xd0]\n"
128 "zip2 v18.16b, v26.16b, v23.16b\n"
129 "zip2 v17.16b, v25.16b, v21.16b\n"
130 "zip1 v16.16b, v18.16b, v17.16b\n"
131 "str q16, [x15, #0xe0]\n"
132 "zip2 v16.16b, v18.16b, v17.16b\n"
133 "str q16, [x15, #0xf0]\n"
134 "add x15, x15, %x[out_stride]\n"
135 "bge 2b\n"
136 "3:" // Main row loop: Column loop skip
137 "cmp x19, #0x4\n"
138 "blt 5f\n"
139 "4:" // Main row loop: width 4 loop: loop
140 "ldr s18, [x16], #0x4\n"
141 "sub x19, x19, #0x4\n"
142 "ldr s17, [x14], #0x4\n"
143 "cmp x19, #0x4\n"
144 "ldr s16, [x13], #0x4\n"
145 "zip1 v19.16b, v18.16b, v16.16b\n"
146 "ldr s16, [x12], #0x4\n"
147 "ldr s18, [x11], #0x4\n"
148 "zip1 v16.16b, v17.16b, v16.16b\n"
149 "ldr s20, [x10], #0x4\n"
150 "ldr s17, [x9], #0x4\n"
151 "zip1 v23.16b, v19.16b, v16.16b\n"
152 "ldr s16, [x28], #0x4\n"
153 "zip1 v19.16b, v18.16b, v17.16b\n"
154 "ldr s18, [x27], #0x4\n"
155 "ldr s22, [x26], #0x4\n"
156 "zip1 v16.16b, v20.16b, v16.16b\n"
157 "ldr s17, [x25], #0x4\n"
158 "zip1 v21.16b, v19.16b, v16.16b\n"
159 "ldr s16, [x24], #0x4\n"
160 "zip1 v18.16b, v18.16b, v17.16b\n"
161 "ldr s20, [x23], #0x4\n"
162 "ldr s19, [x22], #0x4\n"
163 "zip1 v16.16b, v22.16b, v16.16b\n"
164 "ldr s17, [x21], #0x4\n"
165 "zip1 v18.16b, v18.16b, v16.16b\n"
166 "ldr s16, [x20], #0x4\n"
167 "zip1 v17.16b, v20.16b, v17.16b\n"
168 "str q23, [x15, #0x0]\n"
169 "str q21, [x15, #0x40]\n"
170 "zip1 v16.16b, v19.16b, v16.16b\n"
171 "str q18, [x15, #0x80]\n"
172 "zip1 v16.16b, v17.16b, v16.16b\n"
173 "str q16, [x15, #0xc0]\n"
174 "add x15, x15, #0x10\n"
175 "bge 4b\n"
176 "5:" // Main row loop: width 4 loop: skip
177 "cmp x19, #0x1\n"
178 "blt 7f\n"
179 "6:" // Main row loop: width 1 loop: loop
180 "ldr b18, [x16], #0x1\n"
181 "sub x19, x19, #0x1\n"
182 "ldr b17, [x14], #0x1\n"
183 "cmp x19, #0x1\n"
184 "ldr b16, [x13], #0x1\n"
185 "zip1 v19.16b, v18.16b, v16.16b\n"
186 "ldr b16, [x12], #0x1\n"
187 "ldr b18, [x11], #0x1\n"
188 "zip1 v16.16b, v17.16b, v16.16b\n"
189 "ldr b20, [x10], #0x1\n"
190 "ldr b17, [x9], #0x1\n"
191 "zip1 v23.16b, v19.16b, v16.16b\n"
192 "ldr b16, [x28], #0x1\n"
193 "zip1 v19.16b, v18.16b, v17.16b\n"
194 "ldr b18, [x27], #0x1\n"
195 "ldr b22, [x26], #0x1\n"
196 "zip1 v16.16b, v20.16b, v16.16b\n"
197 "ldr b17, [x25], #0x1\n"
198 "zip1 v21.16b, v19.16b, v16.16b\n"
199 "ldr b16, [x24], #0x1\n"
200 "zip1 v18.16b, v18.16b, v17.16b\n"
201 "ldr b20, [x23], #0x1\n"
202 "ldr b19, [x22], #0x1\n"
203 "zip1 v16.16b, v22.16b, v16.16b\n"
204 "ldr b17, [x21], #0x1\n"
205 "zip1 v18.16b, v18.16b, v16.16b\n"
206 "ldr b16, [x20], #0x1\n"
207 "zip1 v17.16b, v20.16b, v17.16b\n"
208 "str s23, [x15, #0x0]\n"
209 "str s21, [x15, #0x40]\n"
210 "zip1 v16.16b, v19.16b, v16.16b\n"
211 "str s18, [x15, #0x80]\n"
212 "zip1 v16.16b, v17.16b, v16.16b\n"
213 "str s16, [x15, #0xc0]\n"
214 "add x15, x15, #0x4\n"
215 "bge 6b\n"
216 "7:" // Main row loop: width 1 loop: skip
217 "add %x[out], %x[out], #0x100\n"
218 "cmp %x[height], #0x10\n"
219 "bge 1b\n"
220 "cbz %x[height], 16f\n"
221 "8:" // Main loop skip
222
223 "9:" // Tail row loop: Head
224 "mov x16, %x[in]\n"
225 "mov x15, %x[out]\n"
226 "add x14, x16, %x[in_stride]\n"
227 "add x13, x14, %x[in_stride]\n"
228 "add x12, x13, %x[in_stride]\n"
229 "add %x[in], x12, %x[in_stride]\n"
230 "cmp %x[height], #0x3\n"
231 "csel x12, x12, %x[pad_row], GT\n"
232 "csel x13, x13, %x[pad_row], GE\n"
233 "cmp %x[height], #0x1\n"
234 "csel x14, x14, %x[pad_row], GT\n"
235 "sub %x[height], %x[height], #0x4\n"
236 "mov x19, %x[width]\n"
237 "cmp x19, #0x10\n"
238 "blt 11f\n"
239 "10:" // Tail row loop: Column loop
240 "ldr q18, [x16], #0x10\n"
241 "sub x19, x19, #0x10\n"
242 "ldr q21, [x14], #0x10\n"
243 "cmp x19, #0x10\n"
244 "ldr q17, [x13], #0x10\n"
245 "zip1 v20.16b, v18.16b, v17.16b\n"
246 "ldr q16, [x12], #0x10\n"
247 "zip2 v19.16b, v18.16b, v17.16b\n"
248 "zip1 v18.16b, v21.16b, v16.16b\n"
249 "zip2 v17.16b, v21.16b, v16.16b\n"
250 "zip1 v16.16b, v20.16b, v18.16b\n"
251 "str q16, [x15, #0x0]\n"
252 "zip2 v16.16b, v20.16b, v18.16b\n"
253 "str q16, [x15, #0x10]\n"
254 "zip1 v16.16b, v19.16b, v17.16b\n"
255 "str q16, [x15, #0x20]\n"
256 "zip2 v16.16b, v19.16b, v17.16b\n"
257 "str q16, [x15, #0x30]\n"
258 "add x15, x15, %x[out_stride]\n"
259 "bge 10b\n"
260 "11:" // Tail row loop: Column loop skip
261 "cmp x19, #0x4\n"
262 "blt 13f\n"
263 "12:" // Tail row loop: width 4 loop: loop
264 "ldr s17, [x16], #0x4\n"
265 "sub x19, x19, #0x4\n"
266 "ldr s18, [x14], #0x4\n"
267 "cmp x19, #0x4\n"
268 "ldr s16, [x13], #0x4\n"
269 "zip1 v17.16b, v17.16b, v16.16b\n"
270 "ldr s16, [x12], #0x4\n"
271 "zip1 v16.16b, v18.16b, v16.16b\n"
272 "zip1 v16.16b, v17.16b, v16.16b\n"
273 "str q16, [x15, #0x0]\n"
274 "add x15, x15, #0x10\n"
275 "bge 12b\n"
276 "13:" // Tail row loop: width 4 loop: skip
277 "cmp x19, #0x1\n"
278 "blt 15f\n"
279 "14:" // Tail row loop: width 1 loop: loop
280 "ldr b17, [x16], #0x1\n"
281 "sub x19, x19, #0x1\n"
282 "ldr b18, [x14], #0x1\n"
283 "cmp x19, #0x1\n"
284 "ldr b16, [x13], #0x1\n"
285 "zip1 v17.16b, v17.16b, v16.16b\n"
286 "ldr b16, [x12], #0x1\n"
287 "zip1 v16.16b, v18.16b, v16.16b\n"
288 "zip1 v16.16b, v17.16b, v16.16b\n"
289 "str s16, [x15, #0x0]\n"
290 "add x15, x15, #0x4\n"
291 "bge 14b\n"
292 "15:" // Tail row loop: width 1 loop: skip
293 "add %x[out], %x[out], #0x40\n"
294 "cmp %x[height], #0x1\n"
295 "bge 9b\n"
296 "16:" // Done
297
298 : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out)
299 : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [pad_row] "r" (pad_row), [width] "r" (width)
300 : "cc", "memory", "v0", "v1", "v2", "v3", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
301 );
302 }
303
304 } // anonymous namespace
305
306 template<>
Transform(uint8_t * out,const uint8_t * in,int stride,int x0,int xmax,int k0,int kmax)307 void Transform<16, 4, true, VLType::None>(
308 uint8_t *out, const uint8_t *in, int stride, int x0, int xmax, int k0, int kmax)
309 {
310 a64_transpose_interleave_16_1x4(
311 reinterpret_cast<uint8_t *>(out),
312 reinterpret_cast<const uint8_t *>(in + k0 * stride + x0),
313 (xmax-x0) * sizeof(uint8_t) / 1,
314 stride * sizeof(uint8_t),
315 (kmax-k0)
316 );
317 }
318
319 template<>
Transform(int8_t * out,const int8_t * in,int stride,int x0,int xmax,int k0,int kmax)320 void Transform<16, 4, true, VLType::None>(
321 int8_t *out, const int8_t *in, int stride, int x0, int xmax, int k0, int kmax)
322 {
323 a64_transpose_interleave_16_1x4(
324 reinterpret_cast<uint8_t *>(out),
325 reinterpret_cast<const uint8_t *>(in + k0 * stride + x0),
326 (xmax-x0) * sizeof(int8_t) / 1,
327 stride * sizeof(int8_t),
328 (kmax-k0)
329 );
330 }
331
332 #endif
333