1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * SPDX-License-Identifier: MIT 5 */ 6 7 #ifndef AC_DEBUG_H 8 #define AC_DEBUG_H 9 10 #include "amd_family.h" 11 #include "ac_gpu_info.h" 12 13 #include <stdbool.h> 14 #include <stdint.h> 15 #include <stdio.h> 16 17 #define AC_ENCODE_TRACE_POINT(id) (0xcafe0000 | ((id)&0xffff)) 18 #define AC_IS_TRACE_POINT(x) (((x)&0xcafe0000) == 0xcafe0000) 19 #define AC_GET_TRACE_POINT_ID(x) ((x)&0xffff) 20 21 #define AC_MAX_WAVES_PER_CHIP (64 * 40) 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 struct si_reg; 28 29 struct ac_wave_info { 30 unsigned se; /* shader engine */ 31 unsigned sh; /* shader array */ 32 unsigned cu; /* compute unit */ 33 unsigned simd; 34 unsigned wave; 35 uint32_t status; 36 union { 37 uint64_t pc; /* program counter */ 38 struct { 39 uint32_t pc_lo; 40 uint32_t pc_hi; 41 }; 42 }; 43 uint32_t inst_dw0; 44 uint32_t inst_dw1; 45 union { 46 uint64_t exec; 47 struct { 48 uint32_t exec_lo; 49 uint32_t exec_hi; 50 }; 51 }; 52 bool matched; /* whether the wave is used by a currently-bound shader */ 53 }; 54 55 struct ac_addr_info { 56 void *cpu_addr; 57 bool valid; 58 bool use_after_free; 59 }; 60 61 typedef void (*ac_debug_addr_callback)(void *data, uint64_t addr, struct ac_addr_info *info); 62 63 /* ac_debug.c */ 64 const struct si_reg *ac_find_register(enum amd_gfx_level gfx_level, enum radeon_family family, 65 unsigned offset); 66 const char *ac_get_register_name(enum amd_gfx_level gfx_level, enum radeon_family family, 67 unsigned offset); 68 bool ac_register_exists(enum amd_gfx_level gfx_level, enum radeon_family family, 69 unsigned offset); 70 bool ac_vm_fault_occurred(enum amd_gfx_level gfx_level, uint64_t *old_dmesg_timestamp, 71 uint64_t *out_addr); 72 char *ac_get_umr_waves(const struct radeon_info *info, enum amd_ip_type ring); 73 unsigned ac_get_wave_info(enum amd_gfx_level gfx_level, const struct radeon_info *info, 74 const char *wave_dump, 75 struct ac_wave_info waves[AC_MAX_WAVES_PER_CHIP]); 76 void ac_print_gpuvm_fault_status(FILE *output, enum amd_gfx_level gfx_level, 77 uint32_t status); 78 79 /* ac_gather_context_rolls.c */ 80 struct hash_table; 81 void ac_gather_context_rolls(FILE *f, uint32_t **ibs, uint32_t *ib_dw_sizes, unsigned num_ibs, 82 struct hash_table *annotations, const struct radeon_info *info); 83 84 /* ac_parse_ib.c */ 85 86 struct ac_ib_parser { 87 /* Arguments to ac_parse_ib.* */ 88 FILE *f; 89 uint32_t *ib; 90 unsigned num_dw; 91 const int *trace_ids; 92 unsigned trace_id_count; 93 enum amd_gfx_level gfx_level; 94 enum radeon_family family; 95 enum amd_ip_type ip_type; 96 ac_debug_addr_callback addr_callback; 97 void *addr_callback_data; 98 struct hash_table *annotations; 99 100 /* Internal */ 101 unsigned cur_dw; 102 }; 103 104 void ac_dump_reg(FILE *file, enum amd_gfx_level gfx_level, enum radeon_family family, 105 unsigned offset, uint32_t value, uint32_t field_mask); 106 void ac_parse_ib_chunk(struct ac_ib_parser *ib); 107 void ac_parse_ib(struct ac_ib_parser *ib, const char *name); 108 109 #ifdef __cplusplus 110 } 111 #endif 112 113 #endif 114