1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <[email protected]>
5 */
6
7 #ifndef AMD_IOMMU_H
8 #define AMD_IOMMU_H
9
10 #include <linux/iommu.h>
11
12 #include "amd_iommu_types.h"
13
14 irqreturn_t amd_iommu_int_thread(int irq, void *data);
15 irqreturn_t amd_iommu_int_thread_evtlog(int irq, void *data);
16 irqreturn_t amd_iommu_int_thread_pprlog(int irq, void *data);
17 irqreturn_t amd_iommu_int_thread_galog(int irq, void *data);
18 irqreturn_t amd_iommu_int_handler(int irq, void *data);
19 void amd_iommu_restart_log(struct amd_iommu *iommu, const char *evt_type,
20 u8 cntrl_intr, u8 cntrl_log,
21 u32 status_run_mask, u32 status_overflow_mask);
22 void amd_iommu_restart_event_logging(struct amd_iommu *iommu);
23 void amd_iommu_restart_ga_log(struct amd_iommu *iommu);
24 void amd_iommu_restart_ppr_log(struct amd_iommu *iommu);
25 void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
26 void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
27 void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
28 gfp_t gfp, size_t size);
29
30 #ifdef CONFIG_AMD_IOMMU_DEBUGFS
31 void amd_iommu_debugfs_setup(struct amd_iommu *iommu);
32 #else
amd_iommu_debugfs_setup(struct amd_iommu * iommu)33 static inline void amd_iommu_debugfs_setup(struct amd_iommu *iommu) {}
34 #endif
35
36 /* Needed for interrupt remapping */
37 int amd_iommu_prepare(void);
38 int amd_iommu_enable(void);
39 void amd_iommu_disable(void);
40 int amd_iommu_reenable(int mode);
41 int amd_iommu_enable_faulting(unsigned int cpu);
42 extern int amd_iommu_guest_ir;
43 extern enum protection_domain_mode amd_iommu_pgtable;
44 extern int amd_iommu_gpt_level;
45 extern unsigned long amd_iommu_pgsize_bitmap;
46
47 /* Protection domain ops */
48 void amd_iommu_init_identity_domain(void);
49 struct protection_domain *protection_domain_alloc(void);
50 void protection_domain_free(struct protection_domain *domain);
51 struct iommu_domain *amd_iommu_domain_alloc_sva(struct device *dev,
52 struct mm_struct *mm);
53 void amd_iommu_domain_free(struct iommu_domain *dom);
54 int iommu_sva_set_dev_pasid(struct iommu_domain *domain,
55 struct device *dev, ioasid_t pasid,
56 struct iommu_domain *old);
57 void amd_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid,
58 struct iommu_domain *domain);
59
60 /* SVA/PASID */
61 bool amd_iommu_pasid_supported(void);
62
63 /* IOPF */
64 int amd_iommu_iopf_init(struct amd_iommu *iommu);
65 void amd_iommu_iopf_uninit(struct amd_iommu *iommu);
66 void amd_iommu_page_response(struct device *dev, struct iopf_fault *evt,
67 struct iommu_page_response *resp);
68 int amd_iommu_iopf_add_device(struct amd_iommu *iommu,
69 struct iommu_dev_data *dev_data);
70 void amd_iommu_iopf_remove_device(struct amd_iommu *iommu,
71 struct iommu_dev_data *dev_data);
72
73 /* GCR3 setup */
74 int amd_iommu_set_gcr3(struct iommu_dev_data *dev_data,
75 ioasid_t pasid, unsigned long gcr3);
76 int amd_iommu_clear_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid);
77
78 /* PPR */
79 int __init amd_iommu_alloc_ppr_log(struct amd_iommu *iommu);
80 void __init amd_iommu_free_ppr_log(struct amd_iommu *iommu);
81 void amd_iommu_enable_ppr_log(struct amd_iommu *iommu);
82 void amd_iommu_poll_ppr_log(struct amd_iommu *iommu);
83 int amd_iommu_complete_ppr(struct device *dev, u32 pasid, int status, int tag);
84
85 /*
86 * This function flushes all internal caches of
87 * the IOMMU used by this driver.
88 */
89 void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
90 void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
91 void amd_iommu_domain_flush_pages(struct protection_domain *domain,
92 u64 address, size_t size);
93 void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
94 ioasid_t pasid, u64 address, size_t size);
95
96 #ifdef CONFIG_IRQ_REMAP
97 int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
98 #else
amd_iommu_create_irq_domain(struct amd_iommu * iommu)99 static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
100 {
101 return 0;
102 }
103 #endif
104
is_rd890_iommu(struct pci_dev * pdev)105 static inline bool is_rd890_iommu(struct pci_dev *pdev)
106 {
107 return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
108 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
109 }
110
check_feature(u64 mask)111 static inline bool check_feature(u64 mask)
112 {
113 return (amd_iommu_efr & mask);
114 }
115
check_feature2(u64 mask)116 static inline bool check_feature2(u64 mask)
117 {
118 return (amd_iommu_efr2 & mask);
119 }
120
amd_iommu_v2_pgtbl_supported(void)121 static inline bool amd_iommu_v2_pgtbl_supported(void)
122 {
123 return (check_feature(FEATURE_GIOSUP) && check_feature(FEATURE_GT));
124 }
125
amd_iommu_gt_ppr_supported(void)126 static inline bool amd_iommu_gt_ppr_supported(void)
127 {
128 return (amd_iommu_v2_pgtbl_supported() &&
129 check_feature(FEATURE_PPR) &&
130 check_feature(FEATURE_EPHSUP));
131 }
132
iommu_virt_to_phys(void * vaddr)133 static inline u64 iommu_virt_to_phys(void *vaddr)
134 {
135 return (u64)__sme_set(virt_to_phys(vaddr));
136 }
137
iommu_phys_to_virt(unsigned long paddr)138 static inline void *iommu_phys_to_virt(unsigned long paddr)
139 {
140 return phys_to_virt(__sme_clr(paddr));
141 }
142
get_pci_sbdf_id(struct pci_dev * pdev)143 static inline int get_pci_sbdf_id(struct pci_dev *pdev)
144 {
145 int seg = pci_domain_nr(pdev->bus);
146 u16 devid = pci_dev_id(pdev);
147
148 return PCI_SEG_DEVID_TO_SBDF(seg, devid);
149 }
150
151 /*
152 * This must be called after device probe completes. During probe
153 * use rlookup_amd_iommu() get the iommu.
154 */
get_amd_iommu_from_dev(struct device * dev)155 static inline struct amd_iommu *get_amd_iommu_from_dev(struct device *dev)
156 {
157 return iommu_get_iommu_dev(dev, struct amd_iommu, iommu);
158 }
159
160 /* This must be called after device probe completes. */
get_amd_iommu_from_dev_data(struct iommu_dev_data * dev_data)161 static inline struct amd_iommu *get_amd_iommu_from_dev_data(struct iommu_dev_data *dev_data)
162 {
163 return iommu_get_iommu_dev(dev_data->dev, struct amd_iommu, iommu);
164 }
165
to_pdomain(struct iommu_domain * dom)166 static inline struct protection_domain *to_pdomain(struct iommu_domain *dom)
167 {
168 return container_of(dom, struct protection_domain, domain);
169 }
170
171 bool translation_pre_enabled(struct amd_iommu *iommu);
172 int __init add_special_device(u8 type, u8 id, u32 *devid, bool cmd_line);
173
174 #ifdef CONFIG_DMI
175 void amd_iommu_apply_ivrs_quirks(void);
176 #else
amd_iommu_apply_ivrs_quirks(void)177 static inline void amd_iommu_apply_ivrs_quirks(void) { }
178 #endif
179 struct dev_table_entry *amd_iommu_get_ivhd_dte_flags(u16 segid, u16 devid);
180
181 void amd_iommu_domain_set_pgtable(struct protection_domain *domain,
182 u64 *root, int mode);
183 struct dev_table_entry *get_dev_table(struct amd_iommu *iommu);
184 struct iommu_dev_data *search_dev_data(struct amd_iommu *iommu, u16 devid);
185
186 #endif /* AMD_IOMMU_H */
187