xref: /aosp_15_r20/external/coreboot/src/cpu/amd/mtrr/amd_mtrr.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <amdblocks/biosram.h>
4 #include <console/console.h>
5 #include <device/device.h>
6 #include <cpu/amd/mtrr.h>
7 
add_uma_resource_below_tolm(struct device * nb,int idx)8 void add_uma_resource_below_tolm(struct device *nb, int idx)
9 {
10 	uint32_t topmem = get_top_of_mem_below_4gb();
11 	uint32_t top_of_cacheable = restore_top_of_low_cacheable();
12 
13 	if (top_of_cacheable == topmem)
14 		return;
15 
16 	uint32_t uma_base = top_of_cacheable;
17 	uint32_t uma_size = topmem - top_of_cacheable;
18 
19 	printk(BIOS_INFO, "%s: uma size 0x%08x, memory start 0x%08x\n", __func__, uma_size,
20 	       uma_base);
21 
22 	mmio_range(nb, idx, uma_base, uma_size);
23 }
24