xref: /aosp_15_r20/art/runtime/arch/arm64/entrypoints_init_arm64.cc (revision 795d594fd825385562da6b089ea9b2033f3abf5a)
1 /*
2  * Copyright (C) 2014 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include <math.h>
18 #include <string.h>
19 
20 #include "arch/arm64/asm_support_arm64.h"
21 #include "base/bit_utils.h"
22 #include "com_android_art_flags.h"
23 #include "entrypoints/entrypoint_utils.h"
24 #include "entrypoints/jni/jni_entrypoints.h"
25 #include "entrypoints/quick/quick_alloc_entrypoints.h"
26 #include "entrypoints/quick/quick_default_externs.h"
27 #include "entrypoints/quick/quick_default_init_entrypoints.h"
28 #include "entrypoints/quick/quick_entrypoints.h"
29 #include "entrypoints/quick/runtime_entrypoints_list.h"
30 #include "entrypoints/runtime_asm_entrypoints.h"
31 #include "interpreter/interpreter.h"
32 
33 namespace art_flags = com::android::art::flags;
34 
35 namespace art HIDDEN {
36 
37 // Read barrier entrypoints.
38 // art_quick_read_barrier_mark_regX uses an non-standard calling
39 // convention: it expects its input in register X and returns its
40 // result in that same register, and saves and restores all
41 // caller-save registers.
42 extern "C" mirror::Object* art_quick_read_barrier_mark_reg00(mirror::Object*);
43 extern "C" mirror::Object* art_quick_read_barrier_mark_reg01(mirror::Object*);
44 extern "C" mirror::Object* art_quick_read_barrier_mark_reg02(mirror::Object*);
45 extern "C" mirror::Object* art_quick_read_barrier_mark_reg03(mirror::Object*);
46 extern "C" mirror::Object* art_quick_read_barrier_mark_reg04(mirror::Object*);
47 extern "C" mirror::Object* art_quick_read_barrier_mark_reg05(mirror::Object*);
48 extern "C" mirror::Object* art_quick_read_barrier_mark_reg06(mirror::Object*);
49 extern "C" mirror::Object* art_quick_read_barrier_mark_reg07(mirror::Object*);
50 extern "C" mirror::Object* art_quick_read_barrier_mark_reg08(mirror::Object*);
51 extern "C" mirror::Object* art_quick_read_barrier_mark_reg09(mirror::Object*);
52 extern "C" mirror::Object* art_quick_read_barrier_mark_reg10(mirror::Object*);
53 extern "C" mirror::Object* art_quick_read_barrier_mark_reg11(mirror::Object*);
54 extern "C" mirror::Object* art_quick_read_barrier_mark_reg12(mirror::Object*);
55 extern "C" mirror::Object* art_quick_read_barrier_mark_reg12(mirror::Object*);
56 extern "C" mirror::Object* art_quick_read_barrier_mark_reg13(mirror::Object*);
57 extern "C" mirror::Object* art_quick_read_barrier_mark_reg14(mirror::Object*);
58 extern "C" mirror::Object* art_quick_read_barrier_mark_reg15(mirror::Object*);
59 extern "C" mirror::Object* art_quick_read_barrier_mark_reg16(mirror::Object*);
60 extern "C" mirror::Object* art_quick_read_barrier_mark_reg17(mirror::Object*);
61 extern "C" mirror::Object* art_quick_read_barrier_mark_reg18(mirror::Object*);
62 extern "C" mirror::Object* art_quick_read_barrier_mark_reg19(mirror::Object*);
63 extern "C" mirror::Object* art_quick_read_barrier_mark_reg20(mirror::Object*);
64 extern "C" mirror::Object* art_quick_read_barrier_mark_reg21(mirror::Object*);
65 extern "C" mirror::Object* art_quick_read_barrier_mark_reg22(mirror::Object*);
66 extern "C" mirror::Object* art_quick_read_barrier_mark_reg22(mirror::Object*);
67 extern "C" mirror::Object* art_quick_read_barrier_mark_reg23(mirror::Object*);
68 extern "C" mirror::Object* art_quick_read_barrier_mark_reg24(mirror::Object*);
69 extern "C" mirror::Object* art_quick_read_barrier_mark_reg25(mirror::Object*);
70 extern "C" mirror::Object* art_quick_read_barrier_mark_reg26(mirror::Object*);
71 extern "C" mirror::Object* art_quick_read_barrier_mark_reg27(mirror::Object*);
72 extern "C" mirror::Object* art_quick_read_barrier_mark_reg28(mirror::Object*);
73 extern "C" mirror::Object* art_quick_read_barrier_mark_reg29(mirror::Object*);
74 
75 extern "C" mirror::Object* art_quick_read_barrier_mark_introspection(mirror::Object*);
76 extern "C" mirror::Object* art_quick_read_barrier_mark_introspection_arrays(mirror::Object*);
77 extern "C" mirror::Object* art_quick_read_barrier_mark_introspection_gc_roots(mirror::Object*);
78 
79 extern "C" void art_quick_record_entry_trace_event();
80 extern "C" void art_quick_record_exit_trace_event();
81 
art_quick_nop_record_entry_trace_event()82 extern "C" void art_quick_nop_record_entry_trace_event() {
83   return;
84 }
85 
art_quick_nop_record_exit_trace_event()86 extern "C" void art_quick_nop_record_exit_trace_event() {
87   return;
88 }
89 
UpdateReadBarrierEntrypoints(QuickEntryPoints * qpoints,bool is_active)90 void UpdateReadBarrierEntrypoints(QuickEntryPoints* qpoints, bool is_active) {
91   // ARM64 is the architecture with the largest number of core
92   // registers (32) that supports the read barrier configuration.
93   // Because registers 30 (LR) and 31 (SP/XZR) cannot be used to pass
94   // arguments, only define ReadBarrierMarkRegX entrypoints for the
95   // first 30 registers.  This limitation is not a problem on other
96   // supported architectures (ARM, x86 and x86-64) either, as they
97   // have less core registers (resp. 16, 8 and 16).
98   // TODO: ARM/ARM64 now use introspection entrypoints. Consider
99   // reducing the number of entrypoints to those needed by x86-64.
100   qpoints->SetReadBarrierMarkReg00(is_active ? art_quick_read_barrier_mark_reg00 : nullptr);
101   qpoints->SetReadBarrierMarkReg01(is_active ? art_quick_read_barrier_mark_reg01 : nullptr);
102   qpoints->SetReadBarrierMarkReg02(is_active ? art_quick_read_barrier_mark_reg02 : nullptr);
103   qpoints->SetReadBarrierMarkReg03(is_active ? art_quick_read_barrier_mark_reg03 : nullptr);
104   qpoints->SetReadBarrierMarkReg04(is_active ? art_quick_read_barrier_mark_reg04 : nullptr);
105   qpoints->SetReadBarrierMarkReg05(is_active ? art_quick_read_barrier_mark_reg05 : nullptr);
106   qpoints->SetReadBarrierMarkReg06(is_active ? art_quick_read_barrier_mark_reg06 : nullptr);
107   qpoints->SetReadBarrierMarkReg07(is_active ? art_quick_read_barrier_mark_reg07 : nullptr);
108   qpoints->SetReadBarrierMarkReg08(is_active ? art_quick_read_barrier_mark_reg08 : nullptr);
109   qpoints->SetReadBarrierMarkReg09(is_active ? art_quick_read_barrier_mark_reg09 : nullptr);
110   qpoints->SetReadBarrierMarkReg10(is_active ? art_quick_read_barrier_mark_reg10 : nullptr);
111   qpoints->SetReadBarrierMarkReg11(is_active ? art_quick_read_barrier_mark_reg11 : nullptr);
112   qpoints->SetReadBarrierMarkReg12(is_active ? art_quick_read_barrier_mark_reg12 : nullptr);
113   qpoints->SetReadBarrierMarkReg13(is_active ? art_quick_read_barrier_mark_reg13 : nullptr);
114   qpoints->SetReadBarrierMarkReg14(is_active ? art_quick_read_barrier_mark_reg14 : nullptr);
115   qpoints->SetReadBarrierMarkReg15(is_active ? art_quick_read_barrier_mark_reg15 : nullptr);
116   qpoints->SetReadBarrierMarkReg17(is_active ? art_quick_read_barrier_mark_reg17 : nullptr);
117   qpoints->SetReadBarrierMarkReg19(is_active ? art_quick_read_barrier_mark_reg19 : nullptr);
118   qpoints->SetReadBarrierMarkReg20(is_active ? art_quick_read_barrier_mark_reg20 : nullptr);
119   qpoints->SetReadBarrierMarkReg21(is_active ? art_quick_read_barrier_mark_reg21 : nullptr);
120   qpoints->SetReadBarrierMarkReg22(is_active ? art_quick_read_barrier_mark_reg22 : nullptr);
121   qpoints->SetReadBarrierMarkReg23(is_active ? art_quick_read_barrier_mark_reg23 : nullptr);
122   qpoints->SetReadBarrierMarkReg24(is_active ? art_quick_read_barrier_mark_reg24 : nullptr);
123   qpoints->SetReadBarrierMarkReg25(is_active ? art_quick_read_barrier_mark_reg25 : nullptr);
124   qpoints->SetReadBarrierMarkReg26(is_active ? art_quick_read_barrier_mark_reg26 : nullptr);
125   qpoints->SetReadBarrierMarkReg27(is_active ? art_quick_read_barrier_mark_reg27 : nullptr);
126   qpoints->SetReadBarrierMarkReg28(is_active ? art_quick_read_barrier_mark_reg28 : nullptr);
127   qpoints->SetReadBarrierMarkReg29(is_active ? art_quick_read_barrier_mark_reg29 : nullptr);
128 
129   // Check that array switch cases are at appropriate offsets from the introspection entrypoint.
130   DCHECK_ALIGNED(art_quick_read_barrier_mark_introspection, 512u);
131   intptr_t array_diff =
132       reinterpret_cast<intptr_t>(art_quick_read_barrier_mark_introspection_arrays) -
133       reinterpret_cast<intptr_t>(art_quick_read_barrier_mark_introspection);
134   DCHECK_EQ(BAKER_MARK_INTROSPECTION_ARRAY_SWITCH_OFFSET, array_diff);
135   // Check that the GC root entrypoint is at appropriate offset from the introspection entrypoint.
136   intptr_t gc_roots_diff =
137       reinterpret_cast<intptr_t>(art_quick_read_barrier_mark_introspection_gc_roots) -
138       reinterpret_cast<intptr_t>(art_quick_read_barrier_mark_introspection);
139   DCHECK_EQ(BAKER_MARK_INTROSPECTION_GC_ROOT_ENTRYPOINT_OFFSET, gc_roots_diff);
140   // The register 16, i.e. IP0, is reserved, so there is no art_quick_read_barrier_mark_reg16.
141   // We're using the entry to hold a pointer to the introspection entrypoint instead.
142   qpoints->SetReadBarrierMarkReg16(is_active ? art_quick_read_barrier_mark_introspection : nullptr);
143 }
144 
InitEntryPoints(JniEntryPoints * jpoints,QuickEntryPoints * qpoints,bool monitor_jni_entry_exit)145 void InitEntryPoints(JniEntryPoints* jpoints,
146                      QuickEntryPoints* qpoints,
147                      bool monitor_jni_entry_exit) {
148   DefaultInitEntryPoints(jpoints, qpoints, monitor_jni_entry_exit);
149 
150   // Cast
151   qpoints->SetInstanceofNonTrivial(artInstanceOfFromCode);
152   qpoints->SetCheckInstanceOf(art_quick_check_instance_of);
153 
154   // Math
155   // TODO null entrypoints not needed for ARM64 - generate inline.
156   qpoints->SetCmpgDouble(nullptr);
157   qpoints->SetCmpgFloat(nullptr);
158   qpoints->SetCmplDouble(nullptr);
159   qpoints->SetCmplFloat(nullptr);
160   qpoints->SetFmod(fmod);
161   qpoints->SetL2d(nullptr);
162   qpoints->SetFmodf(fmodf);
163   qpoints->SetL2f(nullptr);
164   qpoints->SetD2iz(nullptr);
165   qpoints->SetF2iz(nullptr);
166   qpoints->SetIdivmod(nullptr);
167   qpoints->SetD2l(nullptr);
168   qpoints->SetF2l(nullptr);
169   qpoints->SetLdiv(nullptr);
170   qpoints->SetLmod(nullptr);
171   qpoints->SetLmul(nullptr);
172   qpoints->SetShlLong(nullptr);
173   qpoints->SetShrLong(nullptr);
174   qpoints->SetUshrLong(nullptr);
175 
176   // More math.
177   qpoints->SetCos(cos);
178   qpoints->SetSin(sin);
179   qpoints->SetAcos(acos);
180   qpoints->SetAsin(asin);
181   qpoints->SetAtan(atan);
182   qpoints->SetAtan2(atan2);
183   qpoints->SetPow(pow);
184   qpoints->SetCbrt(cbrt);
185   qpoints->SetCosh(cosh);
186   qpoints->SetExp(exp);
187   qpoints->SetExpm1(expm1);
188   qpoints->SetHypot(hypot);
189   qpoints->SetLog(log);
190   qpoints->SetLog10(log10);
191   qpoints->SetNextAfter(nextafter);
192   qpoints->SetSinh(sinh);
193   qpoints->SetTan(tan);
194   qpoints->SetTanh(tanh);
195 
196   // Intrinsics
197   qpoints->SetIndexOf(art_quick_indexof);
198 
199   // Invoke.
200   qpoints->SetInvokePolymorphicWithHiddenReceiver(
201       art_quick_invoke_polymorphic_with_hidden_receiver);
202 
203   // The ARM64 StringCompareTo intrinsic does not call the runtime.
204   qpoints->SetStringCompareTo(nullptr);
205   qpoints->SetMemcpy(memcpy);
206 
207   // Read barrier.
208   qpoints->SetReadBarrierMarkReg16(nullptr);  // IP0 is used as a temp by the asm stub.
209   UpdateReadBarrierEntrypoints(qpoints, /*is_active=*/ false);
210   qpoints->SetReadBarrierSlow(artReadBarrierSlow);
211   qpoints->SetReadBarrierForRootSlow(artReadBarrierForRootSlow);
212 
213   if (art_flags::always_enable_profile_code()) {
214     // These are used for always-on-tracing, currently only supported on arm64
215     // devices.
216     qpoints->SetRecordEntryTraceEvent(art_quick_record_entry_trace_event);
217     qpoints->SetRecordExitTraceEvent(art_quick_record_exit_trace_event);
218   }
219 }
220 
UpdateLowOverheadTraceEntrypoints(QuickEntryPoints * qpoints,bool enable)221 void UpdateLowOverheadTraceEntrypoints(QuickEntryPoints* qpoints, bool enable) {
222   if (enable) {
223     qpoints->SetRecordEntryTraceEvent(art_quick_record_entry_trace_event);
224     qpoints->SetRecordExitTraceEvent(art_quick_record_exit_trace_event);
225   } else {
226     qpoints->SetRecordEntryTraceEvent(art_quick_nop_record_entry_trace_event);
227     qpoints->SetRecordExitTraceEvent(art_quick_nop_record_exit_trace_event);
228   }
229 }
230 
231 }  // namespace art
232