1 /* 2 * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef _cl_fermi_compute_a_h_ 24 #define _cl_fermi_compute_a_h_ 25 26 /* AUTO GENERATED FILE -- DO NOT EDIT */ 27 /* Command: ../../class/bin/sw_header.pl fermi_compute_a */ 28 29 #include "nvtypes.h" 30 31 #define FERMI_COMPUTE_A 0x90C0 32 33 #define NV90C0_SET_OBJECT 0x0000 34 #define NV90C0_SET_OBJECT_CLASS_ID 15:0 35 #define NV90C0_SET_OBJECT_ENGINE_ID 20:16 36 37 #define NV90C0_NO_OPERATION 0x0100 38 #define NV90C0_NO_OPERATION_V 31:0 39 40 #define NV90C0_SET_NOTIFY_A 0x0104 41 #define NV90C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 42 43 #define NV90C0_SET_NOTIFY_B 0x0108 44 #define NV90C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 45 46 #define NV90C0_NOTIFY 0x010c 47 #define NV90C0_NOTIFY_TYPE 31:0 48 #define NV90C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 49 #define NV90C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 50 51 #define NV90C0_WAIT_FOR_IDLE 0x0110 52 #define NV90C0_WAIT_FOR_IDLE_V 31:0 53 54 #define NV90C0_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 55 #define NV90C0_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 56 57 #define NV90C0_LOAD_MME_INSTRUCTION_RAM 0x0118 58 #define NV90C0_LOAD_MME_INSTRUCTION_RAM_V 31:0 59 60 #define NV90C0_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c 61 #define NV90C0_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 62 63 #define NV90C0_LOAD_MME_START_ADDRESS_RAM 0x0120 64 #define NV90C0_LOAD_MME_START_ADDRESS_RAM_V 31:0 65 66 #define NV90C0_SET_MME_SHADOW_RAM_CONTROL 0x0124 67 #define NV90C0_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 68 #define NV90C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 69 #define NV90C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 70 #define NV90C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 71 #define NV90C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 72 73 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 74 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 75 76 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 77 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 78 79 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 80 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 81 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 82 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 83 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 84 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 85 #define NV90C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 86 87 #define NV90C0_SEND_GO_IDLE 0x013c 88 #define NV90C0_SEND_GO_IDLE_V 31:0 89 90 #define NV90C0_PM_TRIGGER 0x0140 91 #define NV90C0_PM_TRIGGER_V 31:0 92 93 #define NV90C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 94 #define NV90C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 95 96 #define NV90C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 97 #define NV90C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 98 99 #define NV90C0_SET_SHADER_LOCAL_MEMORY_LOW_SIZE 0x0204 100 #define NV90C0_SET_SHADER_LOCAL_MEMORY_LOW_SIZE_V 23:0 101 102 #define NV90C0_SET_SHADER_LOCAL_MEMORY_HIGH_SIZE 0x0208 103 #define NV90C0_SET_SHADER_LOCAL_MEMORY_HIGH_SIZE_V 23:0 104 105 #define NV90C0_SET_SHADER_LOCAL_MEMORY_CRS_SIZE 0x020c 106 #define NV90C0_SET_SHADER_LOCAL_MEMORY_CRS_SIZE_V 20:0 107 108 #define NV90C0_SET_BINDING_CONTROL_TEXTURE 0x0210 109 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS 3:0 110 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__1 0x00000000 111 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__2 0x00000001 112 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__4 0x00000002 113 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__8 0x00000003 114 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__16 0x00000004 115 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS 7:4 116 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__1 0x00000000 117 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__2 0x00000001 118 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__4 0x00000002 119 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__8 0x00000003 120 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__16 0x00000004 121 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__32 0x00000005 122 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__64 0x00000006 123 #define NV90C0_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__128 0x00000007 124 125 #define NV90C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 126 #define NV90C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 127 128 #define NV90C0_INVALIDATE_SHADER_CACHES 0x021c 129 #define NV90C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 130 #define NV90C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 131 #define NV90C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 132 #define NV90C0_INVALIDATE_SHADER_CACHES_DATA 4:4 133 #define NV90C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 134 #define NV90C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 135 #define NV90C0_INVALIDATE_SHADER_CACHES_UNIFORM 8:8 136 #define NV90C0_INVALIDATE_SHADER_CACHES_UNIFORM_FALSE 0x00000000 137 #define NV90C0_INVALIDATE_SHADER_CACHES_UNIFORM_TRUE 0x00000001 138 #define NV90C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 139 #define NV90C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 140 #define NV90C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 141 #define NV90C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 142 #define NV90C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 143 #define NV90C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 144 #define NV90C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 145 #define NV90C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 146 #define NV90C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 147 148 #define NV90C0_BIND_TEXTURE_SAMPLER 0x0228 149 #define NV90C0_BIND_TEXTURE_SAMPLER_VALID 0:0 150 #define NV90C0_BIND_TEXTURE_SAMPLER_VALID_FALSE 0x00000000 151 #define NV90C0_BIND_TEXTURE_SAMPLER_VALID_TRUE 0x00000001 152 #define NV90C0_BIND_TEXTURE_SAMPLER_SAMPLER_SLOT 11:4 153 #define NV90C0_BIND_TEXTURE_SAMPLER_INDEX 24:12 154 155 #define NV90C0_BIND_TEXTURE_HEADER 0x022c 156 #define NV90C0_BIND_TEXTURE_HEADER_VALID 0:0 157 #define NV90C0_BIND_TEXTURE_HEADER_VALID_FALSE 0x00000000 158 #define NV90C0_BIND_TEXTURE_HEADER_VALID_TRUE 0x00000001 159 #define NV90C0_BIND_TEXTURE_HEADER_TEXTURE_SLOT 8:1 160 #define NV90C0_BIND_TEXTURE_HEADER_INDEX 30:9 161 162 #define NV90C0_BIND_EXTRA_TEXTURE_SAMPLER 0x0230 163 #define NV90C0_BIND_EXTRA_TEXTURE_SAMPLER_VALID 0:0 164 #define NV90C0_BIND_EXTRA_TEXTURE_SAMPLER_VALID_FALSE 0x00000000 165 #define NV90C0_BIND_EXTRA_TEXTURE_SAMPLER_VALID_TRUE 0x00000001 166 #define NV90C0_BIND_EXTRA_TEXTURE_SAMPLER_SAMPLER_SLOT 11:4 167 #define NV90C0_BIND_EXTRA_TEXTURE_SAMPLER_INDEX 24:12 168 169 #define NV90C0_BIND_EXTRA_TEXTURE_HEADER 0x0234 170 #define NV90C0_BIND_EXTRA_TEXTURE_HEADER_VALID 0:0 171 #define NV90C0_BIND_EXTRA_TEXTURE_HEADER_VALID_FALSE 0x00000000 172 #define NV90C0_BIND_EXTRA_TEXTURE_HEADER_VALID_TRUE 0x00000001 173 #define NV90C0_BIND_EXTRA_TEXTURE_HEADER_TEXTURE_SLOT 8:1 174 #define NV90C0_BIND_EXTRA_TEXTURE_HEADER_INDEX 30:9 175 176 #define NV90C0_SET_CTA_RASTER_SIZE_A 0x0238 177 #define NV90C0_SET_CTA_RASTER_SIZE_A_WIDTH 15:0 178 #define NV90C0_SET_CTA_RASTER_SIZE_A_HEIGHT 31:16 179 180 #define NV90C0_SET_CTA_RASTER_SIZE_B 0x023c 181 #define NV90C0_SET_CTA_RASTER_SIZE_B_DEPTH 15:0 182 183 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 184 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 185 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 186 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 187 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 188 189 #define NV90C0_SET_SHADER_SHARED_MEMORY_SIZE 0x024c 190 #define NV90C0_SET_SHADER_SHARED_MEMORY_SIZE_V 17:0 191 192 #define NV90C0_SET_CTA_THREAD_COUNT 0x0250 193 #define NV90C0_SET_CTA_THREAD_COUNT_V 15:0 194 195 #define NV90C0_SET_CTA_BARRIER_COUNT 0x0254 196 #define NV90C0_SET_CTA_BARRIER_COUNT_V 7:0 197 198 #define NV90C0_TEST_FOR_COMPUTE 0x028c 199 #define NV90C0_TEST_FOR_COMPUTE_V 31:0 200 201 #define NV90C0_BEGIN_GRID 0x029c 202 #define NV90C0_BEGIN_GRID_V 0:0 203 204 #define NV90C0_SET_WORK_DISTRIBUTION 0x02a0 205 #define NV90C0_SET_WORK_DISTRIBUTION_MAX_BATCH_SIZE 16:13 206 #define NV90C0_SET_WORK_DISTRIBUTION_FIXED_MODE 4:4 207 #define NV90C0_SET_WORK_DISTRIBUTION_FIXED_MODE_FALSE 0x00000000 208 #define NV90C0_SET_WORK_DISTRIBUTION_FIXED_MODE_TRUE 0x00000001 209 #define NV90C0_SET_WORK_DISTRIBUTION_MAX_STANDBY_CTAS 12:5 210 211 #define NV90C0_SET_CTA_REGISTER_COUNT 0x02c0 212 #define NV90C0_SET_CTA_REGISTER_COUNT_V 7:0 213 214 #define NV90C0_SET_GA_TO_VA_MAPPING_MODE 0x02c4 215 #define NV90C0_SET_GA_TO_VA_MAPPING_MODE_V 0:0 216 #define NV90C0_SET_GA_TO_VA_MAPPING_MODE_V_DISABLE 0x00000000 217 #define NV90C0_SET_GA_TO_VA_MAPPING_MODE_V_ENABLE 0x00000001 218 219 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY 0x02c8 220 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_VIRTUAL_ADDRESS_UPPER 7:0 221 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_GENERIC_ADDRESS_UPPER 23:16 222 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_READ_ENABLE 30:30 223 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_READ_ENABLE_FALSE 0x00000000 224 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_READ_ENABLE_TRUE 0x00000001 225 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_WRITE_ENABLE 31:31 226 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_WRITE_ENABLE_FALSE 0x00000000 227 #define NV90C0_LOAD_GA_TO_VA_MAPPING_ENTRY_WRITE_ENABLE_TRUE 0x00000001 228 229 #define NV90C0_SET_L1_CONFIGURATION 0x0308 230 #define NV90C0_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 231 #define NV90C0_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 232 #define NV90C0_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 233 234 #define NV90C0_SET_RENDER_ENABLE_CONTROL 0x030c 235 #define NV90C0_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 236 #define NV90C0_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 237 #define NV90C0_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 238 239 #define NV90C0_WAIT_REF_COUNT 0x0360 240 #define NV90C0_WAIT_REF_COUNT_REF_CNT 9:8 241 #define NV90C0_WAIT_REF_COUNT_FLUSH_SYS_MEM 0:0 242 #define NV90C0_WAIT_REF_COUNT_FLUSH_SYS_MEM_FALSE 0x00000000 243 #define NV90C0_WAIT_REF_COUNT_FLUSH_SYS_MEM_TRUE 0x00000001 244 245 #define NV90C0_LAUNCH 0x0368 246 #define NV90C0_LAUNCHCTA_PARAM 31:0 247 248 #define NV90C0_SET_LAUNCH_ID 0x036c 249 #define NV90C0_SET_LAUNCH_ID_REF_CNT 1:0 250 251 #define NV90C0_SET_CTA_THREAD_DIMENSION_A 0x03ac 252 #define NV90C0_SET_CTA_THREAD_DIMENSION_A_D0 15:0 253 #define NV90C0_SET_CTA_THREAD_DIMENSION_A_D1 31:16 254 255 #define NV90C0_SET_CTA_THREAD_DIMENSION_B 0x03b0 256 #define NV90C0_SET_CTA_THREAD_DIMENSION_B_D2 15:0 257 258 #define NV90C0_SET_CTA_PROGRAM_START 0x03b4 259 #define NV90C0_SET_CTA_PROGRAM_START_OFFSET 31:0 260 261 #define NV90C0_SET_FALCON00 0x0500 262 #define NV90C0_SET_FALCON00_V 31:0 263 264 #define NV90C0_SET_FALCON01 0x0504 265 #define NV90C0_SET_FALCON01_V 31:0 266 267 #define NV90C0_SET_FALCON02 0x0508 268 #define NV90C0_SET_FALCON02_V 31:0 269 270 #define NV90C0_SET_FALCON03 0x050c 271 #define NV90C0_SET_FALCON03_V 31:0 272 273 #define NV90C0_SET_FALCON04 0x0510 274 #define NV90C0_SET_FALCON04_V 31:0 275 276 #define NV90C0_SET_FALCON05 0x0514 277 #define NV90C0_SET_FALCON05_V 31:0 278 279 #define NV90C0_SET_FALCON06 0x0518 280 #define NV90C0_SET_FALCON06_V 31:0 281 282 #define NV90C0_SET_FALCON07 0x051c 283 #define NV90C0_SET_FALCON07_V 31:0 284 285 #define NV90C0_SET_FALCON08 0x0520 286 #define NV90C0_SET_FALCON08_V 31:0 287 288 #define NV90C0_SET_FALCON09 0x0524 289 #define NV90C0_SET_FALCON09_V 31:0 290 291 #define NV90C0_SET_FALCON10 0x0528 292 #define NV90C0_SET_FALCON10_V 31:0 293 294 #define NV90C0_SET_FALCON11 0x052c 295 #define NV90C0_SET_FALCON11_V 31:0 296 297 #define NV90C0_SET_FALCON12 0x0530 298 #define NV90C0_SET_FALCON12_V 31:0 299 300 #define NV90C0_SET_FALCON13 0x0534 301 #define NV90C0_SET_FALCON13_V 31:0 302 303 #define NV90C0_SET_FALCON14 0x0538 304 #define NV90C0_SET_FALCON14_V 31:0 305 306 #define NV90C0_SET_FALCON15 0x053c 307 #define NV90C0_SET_FALCON15_V 31:0 308 309 #define NV90C0_SET_FALCON16 0x0540 310 #define NV90C0_SET_FALCON16_V 31:0 311 312 #define NV90C0_SET_FALCON17 0x0544 313 #define NV90C0_SET_FALCON17_V 31:0 314 315 #define NV90C0_SET_FALCON18 0x0548 316 #define NV90C0_SET_FALCON18_V 31:0 317 318 #define NV90C0_SET_FALCON19 0x054c 319 #define NV90C0_SET_FALCON19_V 31:0 320 321 #define NV90C0_SET_FALCON20 0x0550 322 #define NV90C0_SET_FALCON20_V 31:0 323 324 #define NV90C0_SET_FALCON21 0x0554 325 #define NV90C0_SET_FALCON21_V 31:0 326 327 #define NV90C0_SET_FALCON22 0x0558 328 #define NV90C0_SET_FALCON22_V 31:0 329 330 #define NV90C0_SET_FALCON23 0x055c 331 #define NV90C0_SET_FALCON23_V 31:0 332 333 #define NV90C0_SET_FALCON24 0x0560 334 #define NV90C0_SET_FALCON24_V 31:0 335 336 #define NV90C0_SET_FALCON25 0x0564 337 #define NV90C0_SET_FALCON25_V 31:0 338 339 #define NV90C0_SET_FALCON26 0x0568 340 #define NV90C0_SET_FALCON26_V 31:0 341 342 #define NV90C0_SET_FALCON27 0x056c 343 #define NV90C0_SET_FALCON27_V 31:0 344 345 #define NV90C0_SET_FALCON28 0x0570 346 #define NV90C0_SET_FALCON28_V 31:0 347 348 #define NV90C0_SET_FALCON29 0x0574 349 #define NV90C0_SET_FALCON29_V 31:0 350 351 #define NV90C0_SET_FALCON30 0x0578 352 #define NV90C0_SET_FALCON30_V 31:0 353 354 #define NV90C0_SET_FALCON31 0x057c 355 #define NV90C0_SET_FALCON31_V 31:0 356 357 #define NV90C0_SET_MAX_SM_COUNT 0x0758 358 #define NV90C0_SET_MAX_SM_COUNT_V 8:0 359 360 #define NV90C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c 361 #define NV90C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 362 363 #define NV90C0_SET_GRID_PARAM 0x0780 364 #define NV90C0_SET_GRID_PARAM_V 31:0 365 366 #define NV90C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 367 #define NV90C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 368 369 #define NV90C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 370 #define NV90C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 371 372 #define NV90C0_SET_SHADER_LOCAL_MEMORY_C 0x0798 373 #define NV90C0_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 374 375 #define NV90C0_SET_SHADER_LOCAL_MEMORY_D 0x079c 376 #define NV90C0_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 377 378 #define NV90C0_SET_SHADER_LOCAL_MEMORY_E 0x07a0 379 #define NV90C0_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 380 381 #define NV90C0_END_GRID 0x0a04 382 #define NV90C0_END_GRID_V 0:0 383 384 #define NV90C0_SET_LAUNCH_SIZE 0x0a08 385 #define NV90C0_SET_LAUNCH_SIZE_V 31:0 386 387 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT 0x0d64 388 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA 3:0 389 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__0 0x00000000 390 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__1 0x00000001 391 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__2 0x00000002 392 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__4 0x00000003 393 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__8 0x00000004 394 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__16 0x00000005 395 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__32 0x00000006 396 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__64 0x00000007 397 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA__128 0x00000008 398 #define NV90C0_SET_API_VISIBLE_CALL_LIMIT_CTA_NO_CHECK 0x0000000F 399 400 #define NV90C0_SET_SHADER_CACHE_CONTROL 0x0d94 401 #define NV90C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 402 #define NV90C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 403 #define NV90C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 404 405 #define NV90C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 406 #define NV90C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 407 408 #define NV90C0_SET_SPARE_NOOP12 0x0f44 409 #define NV90C0_SET_SPARE_NOOP12_V 31:0 410 411 #define NV90C0_SET_SPARE_NOOP13 0x0f48 412 #define NV90C0_SET_SPARE_NOOP13_V 31:0 413 414 #define NV90C0_SET_SPARE_NOOP14 0x0f4c 415 #define NV90C0_SET_SPARE_NOOP14_V 31:0 416 417 #define NV90C0_SET_SPARE_NOOP15 0x0f50 418 #define NV90C0_SET_SPARE_NOOP15_V 31:0 419 420 #define NV90C0_SET_FORCE_ONE_TEXTURE_UNIT 0x1004 421 #define NV90C0_SET_FORCE_ONE_TEXTURE_UNIT_ENABLE 0:0 422 #define NV90C0_SET_FORCE_ONE_TEXTURE_UNIT_ENABLE_FALSE 0x00000000 423 #define NV90C0_SET_FORCE_ONE_TEXTURE_UNIT_ENABLE_TRUE 0x00000001 424 425 #define NV90C0_SET_SPARE_NOOP00 0x1040 426 #define NV90C0_SET_SPARE_NOOP00_V 31:0 427 428 #define NV90C0_SET_SPARE_NOOP01 0x1044 429 #define NV90C0_SET_SPARE_NOOP01_V 31:0 430 431 #define NV90C0_SET_SPARE_NOOP02 0x1048 432 #define NV90C0_SET_SPARE_NOOP02_V 31:0 433 434 #define NV90C0_SET_SPARE_NOOP03 0x104c 435 #define NV90C0_SET_SPARE_NOOP03_V 31:0 436 437 #define NV90C0_SET_SPARE_NOOP04 0x1050 438 #define NV90C0_SET_SPARE_NOOP04_V 31:0 439 440 #define NV90C0_SET_SPARE_NOOP05 0x1054 441 #define NV90C0_SET_SPARE_NOOP05_V 31:0 442 443 #define NV90C0_SET_SPARE_NOOP06 0x1058 444 #define NV90C0_SET_SPARE_NOOP06_V 31:0 445 446 #define NV90C0_SET_SPARE_NOOP07 0x105c 447 #define NV90C0_SET_SPARE_NOOP07_V 31:0 448 449 #define NV90C0_SET_SPARE_NOOP08 0x1060 450 #define NV90C0_SET_SPARE_NOOP08_V 31:0 451 452 #define NV90C0_SET_SPARE_NOOP09 0x1064 453 #define NV90C0_SET_SPARE_NOOP09_V 31:0 454 455 #define NV90C0_SET_SPARE_NOOP10 0x1068 456 #define NV90C0_SET_SPARE_NOOP10_V 31:0 457 458 #define NV90C0_SET_SPARE_NOOP11 0x106c 459 #define NV90C0_SET_SPARE_NOOP11_V 31:0 460 461 #define NV90C0_UNBIND_ALL 0x10f4 462 #define NV90C0_UNBIND_ALL_TEXTURE_HEADERS 0:0 463 #define NV90C0_UNBIND_ALL_TEXTURE_HEADERS_FALSE 0x00000000 464 #define NV90C0_UNBIND_ALL_TEXTURE_HEADERS_TRUE 0x00000001 465 #define NV90C0_UNBIND_ALL_TEXTURE_SAMPLERS 4:4 466 #define NV90C0_UNBIND_ALL_TEXTURE_SAMPLERS_FALSE 0x00000000 467 #define NV90C0_UNBIND_ALL_TEXTURE_SAMPLERS_TRUE 0x00000001 468 #define NV90C0_UNBIND_ALL_CONSTANT_BUFFERS 8:8 469 #define NV90C0_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 470 #define NV90C0_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 471 472 #define NV90C0_SET_SAMPLER_BINDING 0x1234 473 #define NV90C0_SET_SAMPLER_BINDING_V 0:0 474 #define NV90C0_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 475 #define NV90C0_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 476 477 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 478 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 479 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 480 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 481 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 482 483 #define NV90C0_SET_SHADER_SCHEDULING 0x12ac 484 #define NV90C0_SET_SHADER_SCHEDULING_MODE 0:0 485 #define NV90C0_SET_SHADER_SCHEDULING_MODE_OLDEST_THREAD_FIRST 0x00000000 486 #define NV90C0_SET_SHADER_SCHEDULING_MODE_ROUND_ROBIN 0x00000001 487 488 #define NV90C0_INVALIDATE_SAMPLER_CACHE 0x1330 489 #define NV90C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 490 #define NV90C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 491 #define NV90C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 492 #define NV90C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 493 494 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 495 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 496 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 497 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 498 #define NV90C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 499 500 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 501 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 502 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 503 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 504 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 505 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS 2:1 506 #define NV90C0_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS_L1_ONLY 0x00000000 507 508 #define NV90C0_SET_GLOBAL_COLOR_KEY 0x1354 509 #define NV90C0_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 510 #define NV90C0_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 511 #define NV90C0_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 512 513 #define NV90C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 514 #define NV90C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 515 #define NV90C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 516 #define NV90C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 517 #define NV90C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 518 519 #define NV90C0_PERFMON_TRANSFER 0x1524 520 #define NV90C0_PERFMON_TRANSFER_V 31:0 521 522 #define NV90C0_SET_SHADER_EXCEPTIONS 0x1528 523 #define NV90C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 524 #define NV90C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 525 #define NV90C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 526 527 #define NV90C0_SET_RENDER_ENABLE_A 0x1550 528 #define NV90C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 529 530 #define NV90C0_SET_RENDER_ENABLE_B 0x1554 531 #define NV90C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 532 533 #define NV90C0_SET_RENDER_ENABLE_C 0x1558 534 #define NV90C0_SET_RENDER_ENABLE_C_MODE 2:0 535 #define NV90C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 536 #define NV90C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 537 #define NV90C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 538 #define NV90C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 539 #define NV90C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 540 541 #define NV90C0_SET_TEX_SAMPLER_POOL_A 0x155c 542 #define NV90C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 543 544 #define NV90C0_SET_TEX_SAMPLER_POOL_B 0x1560 545 #define NV90C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 546 547 #define NV90C0_SET_TEX_SAMPLER_POOL_C 0x1564 548 #define NV90C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 549 550 #define NV90C0_SET_TEX_HEADER_POOL_A 0x1574 551 #define NV90C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 552 553 #define NV90C0_SET_TEX_HEADER_POOL_B 0x1578 554 #define NV90C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 555 556 #define NV90C0_SET_TEX_HEADER_POOL_C 0x157c 557 #define NV90C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 558 559 #define NV90C0_SET_PROGRAM_REGION_A 0x1608 560 #define NV90C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 561 562 #define NV90C0_SET_PROGRAM_REGION_B 0x160c 563 #define NV90C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 564 565 #define NV90C0_SET_CUBEMAP_INTER_FACE_FILTERING 0x1664 566 #define NV90C0_SET_CUBEMAP_INTER_FACE_FILTERING_MODE 1:0 567 #define NV90C0_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_USE_WRAP 0x00000000 568 #define NV90C0_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_OVERRIDE_WRAP 0x00000001 569 #define NV90C0_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_AUTO_SPAN_SEAM 0x00000002 570 #define NV90C0_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_AUTO_CROSS_SEAM 0x00000003 571 572 #define NV90C0_SET_SHADER_CONTROL 0x1690 573 #define NV90C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 574 #define NV90C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 575 #define NV90C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 576 #define NV90C0_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO 16:16 577 #define NV90C0_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 578 #define NV90C0_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 579 580 #define NV90C0_BIND_CONSTANT_BUFFER 0x1694 581 #define NV90C0_BIND_CONSTANT_BUFFER_VALID 0:0 582 #define NV90C0_BIND_CONSTANT_BUFFER_VALID_FALSE 0x00000000 583 #define NV90C0_BIND_CONSTANT_BUFFER_VALID_TRUE 0x00000001 584 #define NV90C0_BIND_CONSTANT_BUFFER_SHADER_SLOT 12:8 585 586 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 587 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 588 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 589 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 590 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 591 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 592 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 593 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_UNIFORM 8:8 594 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_UNIFORM_FALSE 0x00000000 595 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_UNIFORM_TRUE 0x00000001 596 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 597 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 598 #define NV90C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 599 600 #define NV90C0_INVALIDATE_CONSTANT_BUFFER_CACHE 0x1930 601 #define NV90C0_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2 0:0 602 #define NV90C0_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_FALSE 0x00000000 603 #define NV90C0_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_TRUE 0x00000001 604 605 #define NV90C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 606 #define NV90C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 607 #define NV90C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 608 #define NV90C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 609 #define NV90C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 610 611 #define NV90C0_PIPE_NOP 0x1a2c 612 #define NV90C0_PIPE_NOP_V 31:0 613 614 #define NV90C0_SET_SPARE00 0x1a30 615 #define NV90C0_SET_SPARE00_V 31:0 616 617 #define NV90C0_SET_SPARE01 0x1a34 618 #define NV90C0_SET_SPARE01_V 31:0 619 620 #define NV90C0_SET_SPARE02 0x1a38 621 #define NV90C0_SET_SPARE02_V 31:0 622 623 #define NV90C0_SET_SPARE03 0x1a3c 624 #define NV90C0_SET_SPARE03_V 31:0 625 626 #define NV90C0_SET_REPORT_SEMAPHORE_A 0x1b00 627 #define NV90C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 628 629 #define NV90C0_SET_REPORT_SEMAPHORE_B 0x1b04 630 #define NV90C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 631 632 #define NV90C0_SET_REPORT_SEMAPHORE_C 0x1b08 633 #define NV90C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 634 635 #define NV90C0_SET_REPORT_SEMAPHORE_D 0x1b0c 636 #define NV90C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 637 #define NV90C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 638 #define NV90C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 639 #define NV90C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 640 #define NV90C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 641 #define NV90C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 642 #define NV90C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 643 #define NV90C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 644 #define NV90C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 645 #define NV90C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 646 #define NV90C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 647 #define NV90C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 648 649 #define NV90C0_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 650 #define NV90C0_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 651 652 #define NV90C0_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 653 #define NV90C0_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 654 655 #define NV90C0_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 656 #define NV90C0_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 657 658 #define NV90C0_LOAD_CONSTANT_BUFFER_OFFSET 0x238c 659 #define NV90C0_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 660 661 #define NV90C0_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) 662 #define NV90C0_LOAD_CONSTANT_BUFFER_V 31:0 663 664 #define NV90C0_SET_SU_LD_ST_TARGET_A(j) (0x2700+(j)*32) 665 #define NV90C0_SET_SU_LD_ST_TARGET_A_OFFSET_UPPER 7:0 666 667 #define NV90C0_SET_SU_LD_ST_TARGET_B(j) (0x2704+(j)*32) 668 #define NV90C0_SET_SU_LD_ST_TARGET_B_OFFSET_LOWER 31:0 669 670 #define NV90C0_SET_SU_LD_ST_TARGET_C(j) (0x2708+(j)*32) 671 #define NV90C0_SET_SU_LD_ST_TARGET_C_WIDTH 31:0 672 673 #define NV90C0_SET_SU_LD_ST_TARGET_D(j) (0x270c+(j)*32) 674 #define NV90C0_SET_SU_LD_ST_TARGET_D_HEIGHT 16:0 675 #define NV90C0_SET_SU_LD_ST_TARGET_D_LAYOUT_IN_MEMORY 20:20 676 #define NV90C0_SET_SU_LD_ST_TARGET_D_LAYOUT_IN_MEMORY_BLOCKLINEAR 0x00000000 677 #define NV90C0_SET_SU_LD_ST_TARGET_D_LAYOUT_IN_MEMORY_PITCH 0x00000001 678 679 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT(j) (0x2710+(j)*32) 680 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_TYPE 0:0 681 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_TYPE_COLOR 0x00000000 682 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_TYPE_ZETA 0x00000001 683 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR 11:4 684 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_DISABLED 0x00000000 685 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_GF32_BF32_AF32 0x000000C0 686 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32_GS32_BS32_AS32 0x000000C1 687 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32_GU32_BU32_AU32 0x000000C2 688 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_GF32_BF32_X32 0x000000C3 689 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32_GS32_BS32_X32 0x000000C4 690 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32_GU32_BU32_X32 0x000000C5 691 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16_G16_B16_A16 0x000000C6 692 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN16_GN16_BN16_AN16 0x000000C7 693 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS16_GS16_BS16_AS16 0x000000C8 694 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU16_GU16_BU16_AU16 0x000000C9 695 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_GF16_BF16_AF16 0x000000CA 696 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_GF32 0x000000CB 697 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32_GS32 0x000000CC 698 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32_GU32 0x000000CD 699 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_GF16_BF16_X16 0x000000CE 700 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8R8G8B8 0x000000CF 701 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8RL8GL8BL8 0x000000D0 702 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A2B10G10R10 0x000000D1 703 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AU2BU10GU10RU10 0x000000D2 704 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8B8G8R8 0x000000D5 705 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8BL8GL8RL8 0x000000D6 706 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AN8BN8GN8RN8 0x000000D7 707 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AS8BS8GS8RS8 0x000000D8 708 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AU8BU8GU8RU8 0x000000D9 709 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16_G16 0x000000DA 710 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN16_GN16 0x000000DB 711 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS16_GS16 0x000000DC 712 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU16_GU16 0x000000DD 713 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_GF16 0x000000DE 714 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A2R10G10B10 0x000000DF 715 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_BF10GF11RF11 0x000000E0 716 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32 0x000000E3 717 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32 0x000000E4 718 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32 0x000000E5 719 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8R8G8B8 0x000000E6 720 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8RL8GL8BL8 0x000000E7 721 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R5G6B5 0x000000E8 722 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A1R5G5B5 0x000000E9 723 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_G8R8 0x000000EA 724 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_GN8RN8 0x000000EB 725 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_GS8RS8 0x000000EC 726 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_GU8RU8 0x000000ED 727 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16 0x000000EE 728 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN16 0x000000EF 729 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS16 0x000000F0 730 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU16 0x000000F1 731 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16 0x000000F2 732 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R8 0x000000F3 733 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN8 0x000000F4 734 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS8 0x000000F5 735 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU8 0x000000F6 736 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8 0x000000F7 737 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X1R5G5B5 0x000000F8 738 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8B8G8R8 0x000000F9 739 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8BL8GL8RL8 0x000000FA 740 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_Z1R5G5B5 0x000000FB 741 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_O1R5G5B5 0x000000FC 742 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_Z8R8G8B8 0x000000FD 743 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_O8R8G8B8 0x000000FE 744 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R32 0x000000FF 745 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A16 0x00000040 746 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AF16 0x00000041 747 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AF32 0x00000042 748 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8R8 0x00000043 749 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16_A16 0x00000044 750 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_AF16 0x00000045 751 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_AF32 0x00000046 752 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA 16:12 753 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_Z16 0x00000013 754 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_Z24S8 0x00000014 755 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_X8Z24 0x00000015 756 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_S8Z24 0x00000016 757 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_V8Z24 0x00000018 758 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32 0x0000000A 759 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32_X24S8 0x00000019 760 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_X8Z24_X16V8S8 0x0000001D 761 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32_X16V8X8 0x0000001E 762 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32_X16V8S8 0x0000001F 763 #define NV90C0_SET_SU_LD_ST_TARGET_FORMAT_SUQ_PIXFMT 25:17 764 765 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE(j) (0x2714+(j)*32) 766 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_WIDTH 3:0 767 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 768 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT 7:4 769 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 770 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 771 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 772 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 773 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 774 #define NV90C0_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 775 776 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) 777 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 778 779 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) 780 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 781 782 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) 783 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 2:0 784 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 6:4 785 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 10:8 786 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 14:12 787 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 18:16 788 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 22:20 789 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 26:24 790 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 30:28 791 792 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) 793 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 794 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 795 796 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc 797 #define NV90C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 798 799 #define NV90C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) 800 #define NV90C0_SET_MME_SHADOW_SCRATCH_V 31:0 801 802 #define NV90C0_CALL_MME_MACRO(j) (0x3800+(j)*8) 803 #define NV90C0_CALL_MME_MACRO_V 31:0 804 805 #define NV90C0_CALL_MME_DATA(j) (0x3804+(j)*8) 806 #define NV90C0_CALL_MME_DATA_V 31:0 807 808 #endif /* _cl_fermi_compute_a_h_ */ 809