1 /* 2 * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef _cl_kepler_compute_b_h_ 24 #define _cl_kepler_compute_b_h_ 25 26 /* AUTO GENERATED FILE -- DO NOT EDIT */ 27 /* Command: ../../class/bin/sw_header.pl kepler_compute_b */ 28 29 #include "nvtypes.h" 30 31 #define KEPLER_COMPUTE_B 0xA1C0 32 33 #define NVA1C0_SET_OBJECT 0x0000 34 #define NVA1C0_SET_OBJECT_CLASS_ID 15:0 35 #define NVA1C0_SET_OBJECT_ENGINE_ID 20:16 36 37 #define NVA1C0_NO_OPERATION 0x0100 38 #define NVA1C0_NO_OPERATION_V 31:0 39 40 #define NVA1C0_SET_NOTIFY_A 0x0104 41 #define NVA1C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 42 43 #define NVA1C0_SET_NOTIFY_B 0x0108 44 #define NVA1C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 45 46 #define NVA1C0_NOTIFY 0x010c 47 #define NVA1C0_NOTIFY_TYPE 31:0 48 #define NVA1C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 49 #define NVA1C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 50 51 #define NVA1C0_WAIT_FOR_IDLE 0x0110 52 #define NVA1C0_WAIT_FOR_IDLE_V 31:0 53 54 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 55 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 56 57 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 58 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 59 60 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 61 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 62 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 63 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 64 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 65 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 66 #define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 67 68 #define NVA1C0_SEND_GO_IDLE 0x013c 69 #define NVA1C0_SEND_GO_IDLE_V 31:0 70 71 #define NVA1C0_PM_TRIGGER 0x0140 72 #define NVA1C0_PM_TRIGGER_V 31:0 73 74 #define NVA1C0_PM_TRIGGER_WFI 0x0144 75 #define NVA1C0_PM_TRIGGER_WFI_V 31:0 76 77 #define NVA1C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 78 #define NVA1C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 79 80 #define NVA1C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 81 #define NVA1C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 82 83 #define NVA1C0_LINE_LENGTH_IN 0x0180 84 #define NVA1C0_LINE_LENGTH_IN_VALUE 31:0 85 86 #define NVA1C0_LINE_COUNT 0x0184 87 #define NVA1C0_LINE_COUNT_VALUE 31:0 88 89 #define NVA1C0_OFFSET_OUT_UPPER 0x0188 90 #define NVA1C0_OFFSET_OUT_UPPER_VALUE 7:0 91 92 #define NVA1C0_OFFSET_OUT 0x018c 93 #define NVA1C0_OFFSET_OUT_VALUE 31:0 94 95 #define NVA1C0_PITCH_OUT 0x0190 96 #define NVA1C0_PITCH_OUT_VALUE 31:0 97 98 #define NVA1C0_SET_DST_BLOCK_SIZE 0x0194 99 #define NVA1C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 100 #define NVA1C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 101 #define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 102 #define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 103 #define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 104 #define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 105 #define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 106 #define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 107 #define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 108 #define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 109 #define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 110 #define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 111 #define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 112 #define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 113 #define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 114 #define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 115 116 #define NVA1C0_SET_DST_WIDTH 0x0198 117 #define NVA1C0_SET_DST_WIDTH_V 31:0 118 119 #define NVA1C0_SET_DST_HEIGHT 0x019c 120 #define NVA1C0_SET_DST_HEIGHT_V 31:0 121 122 #define NVA1C0_SET_DST_DEPTH 0x01a0 123 #define NVA1C0_SET_DST_DEPTH_V 31:0 124 125 #define NVA1C0_SET_DST_LAYER 0x01a4 126 #define NVA1C0_SET_DST_LAYER_V 31:0 127 128 #define NVA1C0_SET_DST_ORIGIN_BYTES_X 0x01a8 129 #define NVA1C0_SET_DST_ORIGIN_BYTES_X_V 19:0 130 131 #define NVA1C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac 132 #define NVA1C0_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 133 134 #define NVA1C0_LAUNCH_DMA 0x01b0 135 #define NVA1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 136 #define NVA1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 137 #define NVA1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 138 #define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 139 #define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 140 #define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 141 #define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 142 #define NVA1C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 143 #define NVA1C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 144 #define NVA1C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 145 #define NVA1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 146 #define NVA1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 147 #define NVA1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 148 #define NVA1C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 149 #define NVA1C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 150 #define NVA1C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 151 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP 15:13 152 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 153 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 154 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 155 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 156 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 157 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 158 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 159 #define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 160 #define NVA1C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 161 #define NVA1C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 162 #define NVA1C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 163 #define NVA1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 164 #define NVA1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 165 #define NVA1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 166 167 #define NVA1C0_LOAD_INLINE_DATA 0x01b4 168 #define NVA1C0_LOAD_INLINE_DATA_V 31:0 169 170 #define NVA1C0_SET_I2M_SEMAPHORE_A 0x01dc 171 #define NVA1C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 172 173 #define NVA1C0_SET_I2M_SEMAPHORE_B 0x01e0 174 #define NVA1C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 175 176 #define NVA1C0_SET_I2M_SEMAPHORE_C 0x01e4 177 #define NVA1C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 178 179 #define NVA1C0_SET_I2M_SPARE_NOOP00 0x01f0 180 #define NVA1C0_SET_I2M_SPARE_NOOP00_V 31:0 181 182 #define NVA1C0_SET_I2M_SPARE_NOOP01 0x01f4 183 #define NVA1C0_SET_I2M_SPARE_NOOP01_V 31:0 184 185 #define NVA1C0_SET_I2M_SPARE_NOOP02 0x01f8 186 #define NVA1C0_SET_I2M_SPARE_NOOP02_V 31:0 187 188 #define NVA1C0_SET_I2M_SPARE_NOOP03 0x01fc 189 #define NVA1C0_SET_I2M_SPARE_NOOP03_V 31:0 190 191 #define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 192 #define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 193 194 #define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 195 #define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 196 197 #define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 198 #define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 199 200 #define NVA1C0_SET_COALESCE_WAITING_PERIOD_UNIT 0x020c 201 #define NVA1C0_SET_COALESCE_WAITING_PERIOD_UNIT_CLOCKS 31:0 202 203 #define NVA1C0_PERFMON_TRANSFER 0x0210 204 #define NVA1C0_PERFMON_TRANSFER_V 31:0 205 206 #define NVA1C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 207 #define NVA1C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 208 209 #define NVA1C0_INVALIDATE_SHADER_CACHES 0x021c 210 #define NVA1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 211 #define NVA1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 212 #define NVA1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 213 #define NVA1C0_INVALIDATE_SHADER_CACHES_DATA 4:4 214 #define NVA1C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 215 #define NVA1C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 216 #define NVA1C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 217 #define NVA1C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 218 #define NVA1C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 219 #define NVA1C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 220 #define NVA1C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 221 #define NVA1C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 222 #define NVA1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 223 #define NVA1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 224 #define NVA1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 225 226 #define NVA1C0_SET_CWD_CONTROL 0x0240 227 #define NVA1C0_SET_CWD_CONTROL_SM_SELECTION 0:0 228 #define NVA1C0_SET_CWD_CONTROL_SM_SELECTION_LOAD_BALANCED 0x00000000 229 #define NVA1C0_SET_CWD_CONTROL_SM_SELECTION_ROUND_ROBIN 0x00000001 230 231 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 232 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 233 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 234 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 235 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 236 237 #define NVA1C0_SET_CWD_REF_COUNTER 0x0248 238 #define NVA1C0_SET_CWD_REF_COUNTER_SELECT 5:0 239 #define NVA1C0_SET_CWD_REF_COUNTER_VALUE 23:8 240 241 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A 0x0274 242 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A_ADDRESS_UPPER 7:0 243 244 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B 0x0278 245 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B_ADDRESS_LOWER 31:0 246 247 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C 0x027c 248 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_BYTE_COUNT 16:0 249 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2 31:31 250 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_FALSE 0x00000000 251 #define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_TRUE 0x00000001 252 253 #define NVA1C0_SET_COMPUTE_CLASS_VERSION 0x0280 254 #define NVA1C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 255 #define NVA1C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 256 257 #define NVA1C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 258 #define NVA1C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 259 #define NVA1C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 260 261 #define NVA1C0_SET_QMD_VERSION 0x0288 262 #define NVA1C0_SET_QMD_VERSION_CURRENT 15:0 263 #define NVA1C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 264 265 #define NVA1C0_CHECK_QMD_VERSION 0x0290 266 #define NVA1C0_CHECK_QMD_VERSION_CURRENT 15:0 267 #define NVA1C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 268 269 #define NVA1C0_SET_CWD_SLOT_COUNT 0x02b0 270 #define NVA1C0_SET_CWD_SLOT_COUNT_V 7:0 271 272 #define NVA1C0_SEND_PCAS_A 0x02b4 273 #define NVA1C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 274 275 #define NVA1C0_SEND_PCAS_B 0x02b8 276 #define NVA1C0_SEND_PCAS_B_FROM 23:0 277 #define NVA1C0_SEND_PCAS_B_DELTA 31:24 278 279 #define NVA1C0_SEND_SIGNALING_PCAS_B 0x02bc 280 #define NVA1C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 281 #define NVA1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 282 #define NVA1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 283 #define NVA1C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 284 #define NVA1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 285 #define NVA1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 286 287 #define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE 0x02c4 288 #define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE 0:0 289 #define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE_FALSE 0x00000000 290 #define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE_TRUE 0x00000001 291 #define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_HEADER_INDEX 23:4 292 293 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 294 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 295 296 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 297 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 298 299 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec 300 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 301 302 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A 0x02f0 303 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A_SIZE_UPPER 7:0 304 305 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B 0x02f4 306 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B_SIZE_LOWER 31:0 307 308 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C 0x02f8 309 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C_MAX_SM_COUNT 8:0 310 311 #define NVA1C0_SET_SPA_VERSION 0x0310 312 #define NVA1C0_SET_SPA_VERSION_MINOR 7:0 313 #define NVA1C0_SET_SPA_VERSION_MAJOR 15:8 314 315 #define NVA1C0_SET_FALCON00 0x0500 316 #define NVA1C0_SET_FALCON00_V 31:0 317 318 #define NVA1C0_SET_FALCON01 0x0504 319 #define NVA1C0_SET_FALCON01_V 31:0 320 321 #define NVA1C0_SET_FALCON02 0x0508 322 #define NVA1C0_SET_FALCON02_V 31:0 323 324 #define NVA1C0_SET_FALCON03 0x050c 325 #define NVA1C0_SET_FALCON03_V 31:0 326 327 #define NVA1C0_SET_FALCON04 0x0510 328 #define NVA1C0_SET_FALCON04_V 31:0 329 330 #define NVA1C0_SET_FALCON05 0x0514 331 #define NVA1C0_SET_FALCON05_V 31:0 332 333 #define NVA1C0_SET_FALCON06 0x0518 334 #define NVA1C0_SET_FALCON06_V 31:0 335 336 #define NVA1C0_SET_FALCON07 0x051c 337 #define NVA1C0_SET_FALCON07_V 31:0 338 339 #define NVA1C0_SET_FALCON08 0x0520 340 #define NVA1C0_SET_FALCON08_V 31:0 341 342 #define NVA1C0_SET_FALCON09 0x0524 343 #define NVA1C0_SET_FALCON09_V 31:0 344 345 #define NVA1C0_SET_FALCON10 0x0528 346 #define NVA1C0_SET_FALCON10_V 31:0 347 348 #define NVA1C0_SET_FALCON11 0x052c 349 #define NVA1C0_SET_FALCON11_V 31:0 350 351 #define NVA1C0_SET_FALCON12 0x0530 352 #define NVA1C0_SET_FALCON12_V 31:0 353 354 #define NVA1C0_SET_FALCON13 0x0534 355 #define NVA1C0_SET_FALCON13_V 31:0 356 357 #define NVA1C0_SET_FALCON14 0x0538 358 #define NVA1C0_SET_FALCON14_V 31:0 359 360 #define NVA1C0_SET_FALCON15 0x053c 361 #define NVA1C0_SET_FALCON15_V 31:0 362 363 #define NVA1C0_SET_FALCON16 0x0540 364 #define NVA1C0_SET_FALCON16_V 31:0 365 366 #define NVA1C0_SET_FALCON17 0x0544 367 #define NVA1C0_SET_FALCON17_V 31:0 368 369 #define NVA1C0_SET_FALCON18 0x0548 370 #define NVA1C0_SET_FALCON18_V 31:0 371 372 #define NVA1C0_SET_FALCON19 0x054c 373 #define NVA1C0_SET_FALCON19_V 31:0 374 375 #define NVA1C0_SET_FALCON20 0x0550 376 #define NVA1C0_SET_FALCON20_V 31:0 377 378 #define NVA1C0_SET_FALCON21 0x0554 379 #define NVA1C0_SET_FALCON21_V 31:0 380 381 #define NVA1C0_SET_FALCON22 0x0558 382 #define NVA1C0_SET_FALCON22_V 31:0 383 384 #define NVA1C0_SET_FALCON23 0x055c 385 #define NVA1C0_SET_FALCON23_V 31:0 386 387 #define NVA1C0_SET_FALCON24 0x0560 388 #define NVA1C0_SET_FALCON24_V 31:0 389 390 #define NVA1C0_SET_FALCON25 0x0564 391 #define NVA1C0_SET_FALCON25_V 31:0 392 393 #define NVA1C0_SET_FALCON26 0x0568 394 #define NVA1C0_SET_FALCON26_V 31:0 395 396 #define NVA1C0_SET_FALCON27 0x056c 397 #define NVA1C0_SET_FALCON27_V 31:0 398 399 #define NVA1C0_SET_FALCON28 0x0570 400 #define NVA1C0_SET_FALCON28_V 31:0 401 402 #define NVA1C0_SET_FALCON29 0x0574 403 #define NVA1C0_SET_FALCON29_V 31:0 404 405 #define NVA1C0_SET_FALCON30 0x0578 406 #define NVA1C0_SET_FALCON30_V 31:0 407 408 #define NVA1C0_SET_FALCON31 0x057c 409 #define NVA1C0_SET_FALCON31_V 31:0 410 411 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c 412 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 413 414 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 415 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 416 417 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 418 #define NVA1C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 419 420 #define NVA1C0_SET_SHADER_CACHE_CONTROL 0x0d94 421 #define NVA1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 422 #define NVA1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 423 #define NVA1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 424 425 #define NVA1C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 426 #define NVA1C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 427 428 #define NVA1C0_SET_SPARE_NOOP12 0x0f44 429 #define NVA1C0_SET_SPARE_NOOP12_V 31:0 430 431 #define NVA1C0_SET_SPARE_NOOP13 0x0f48 432 #define NVA1C0_SET_SPARE_NOOP13_V 31:0 433 434 #define NVA1C0_SET_SPARE_NOOP14 0x0f4c 435 #define NVA1C0_SET_SPARE_NOOP14_V 31:0 436 437 #define NVA1C0_SET_SPARE_NOOP15 0x0f50 438 #define NVA1C0_SET_SPARE_NOOP15_V 31:0 439 440 #define NVA1C0_SET_SPARE_NOOP00 0x1040 441 #define NVA1C0_SET_SPARE_NOOP00_V 31:0 442 443 #define NVA1C0_SET_SPARE_NOOP01 0x1044 444 #define NVA1C0_SET_SPARE_NOOP01_V 31:0 445 446 #define NVA1C0_SET_SPARE_NOOP02 0x1048 447 #define NVA1C0_SET_SPARE_NOOP02_V 31:0 448 449 #define NVA1C0_SET_SPARE_NOOP03 0x104c 450 #define NVA1C0_SET_SPARE_NOOP03_V 31:0 451 452 #define NVA1C0_SET_SPARE_NOOP04 0x1050 453 #define NVA1C0_SET_SPARE_NOOP04_V 31:0 454 455 #define NVA1C0_SET_SPARE_NOOP05 0x1054 456 #define NVA1C0_SET_SPARE_NOOP05_V 31:0 457 458 #define NVA1C0_SET_SPARE_NOOP06 0x1058 459 #define NVA1C0_SET_SPARE_NOOP06_V 31:0 460 461 #define NVA1C0_SET_SPARE_NOOP07 0x105c 462 #define NVA1C0_SET_SPARE_NOOP07_V 31:0 463 464 #define NVA1C0_SET_SPARE_NOOP08 0x1060 465 #define NVA1C0_SET_SPARE_NOOP08_V 31:0 466 467 #define NVA1C0_SET_SPARE_NOOP09 0x1064 468 #define NVA1C0_SET_SPARE_NOOP09_V 31:0 469 470 #define NVA1C0_SET_SPARE_NOOP10 0x1068 471 #define NVA1C0_SET_SPARE_NOOP10_V 31:0 472 473 #define NVA1C0_SET_SPARE_NOOP11 0x106c 474 #define NVA1C0_SET_SPARE_NOOP11_V 31:0 475 476 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 477 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 478 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 479 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 480 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 481 482 #define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 483 #define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 484 #define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 485 #define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 486 487 #define NVA1C0_INVALIDATE_SAMPLER_CACHE 0x1330 488 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 489 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 490 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 491 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 492 493 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 494 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 495 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 496 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 497 #define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 498 499 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 500 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 501 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 502 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 503 #define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 504 505 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 506 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 507 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 508 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 509 #define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 510 511 #define NVA1C0_SET_SHADER_EXCEPTIONS 0x1528 512 #define NVA1C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 513 #define NVA1C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 514 #define NVA1C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 515 516 #define NVA1C0_SET_RENDER_ENABLE_A 0x1550 517 #define NVA1C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 518 519 #define NVA1C0_SET_RENDER_ENABLE_B 0x1554 520 #define NVA1C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 521 522 #define NVA1C0_SET_RENDER_ENABLE_C 0x1558 523 #define NVA1C0_SET_RENDER_ENABLE_C_MODE 2:0 524 #define NVA1C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 525 #define NVA1C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 526 #define NVA1C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 527 #define NVA1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 528 #define NVA1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 529 530 #define NVA1C0_SET_TEX_SAMPLER_POOL_A 0x155c 531 #define NVA1C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 532 533 #define NVA1C0_SET_TEX_SAMPLER_POOL_B 0x1560 534 #define NVA1C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 535 536 #define NVA1C0_SET_TEX_SAMPLER_POOL_C 0x1564 537 #define NVA1C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 538 539 #define NVA1C0_SET_TEX_HEADER_POOL_A 0x1574 540 #define NVA1C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 541 542 #define NVA1C0_SET_TEX_HEADER_POOL_B 0x1578 543 #define NVA1C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 544 545 #define NVA1C0_SET_TEX_HEADER_POOL_C 0x157c 546 #define NVA1C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 547 548 #define NVA1C0_SET_PROGRAM_REGION_A 0x1608 549 #define NVA1C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 550 551 #define NVA1C0_SET_PROGRAM_REGION_B 0x160c 552 #define NVA1C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 553 554 #define NVA1C0_SET_SHADER_CONTROL 0x1690 555 #define NVA1C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 556 #define NVA1C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 557 #define NVA1C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 558 559 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 560 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 561 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 562 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 563 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 564 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 565 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 566 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 567 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 568 #define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 569 570 #define NVA1C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 571 #define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 572 #define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 573 #define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 574 #define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 575 576 #define NVA1C0_PIPE_NOP 0x1a2c 577 #define NVA1C0_PIPE_NOP_V 31:0 578 579 #define NVA1C0_SET_SPARE00 0x1a30 580 #define NVA1C0_SET_SPARE00_V 31:0 581 582 #define NVA1C0_SET_SPARE01 0x1a34 583 #define NVA1C0_SET_SPARE01_V 31:0 584 585 #define NVA1C0_SET_SPARE02 0x1a38 586 #define NVA1C0_SET_SPARE02_V 31:0 587 588 #define NVA1C0_SET_SPARE03 0x1a3c 589 #define NVA1C0_SET_SPARE03_V 31:0 590 591 #define NVA1C0_SET_REPORT_SEMAPHORE_A 0x1b00 592 #define NVA1C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 593 594 #define NVA1C0_SET_REPORT_SEMAPHORE_B 0x1b04 595 #define NVA1C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 596 597 #define NVA1C0_SET_REPORT_SEMAPHORE_C 0x1b08 598 #define NVA1C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 599 600 #define NVA1C0_SET_REPORT_SEMAPHORE_D 0x1b0c 601 #define NVA1C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 602 #define NVA1C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 603 #define NVA1C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 604 #define NVA1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 605 #define NVA1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 606 #define NVA1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 607 #define NVA1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 608 #define NVA1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 609 #define NVA1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 610 #define NVA1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 611 #define NVA1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 612 #define NVA1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 613 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 614 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 615 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 616 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 617 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 618 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 619 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 620 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 621 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 622 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 623 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 624 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 625 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 626 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 627 #define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 628 629 #define NVA1C0_SET_BINDLESS_TEXTURE 0x2608 630 #define NVA1C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 631 632 #define NVA1C0_SET_TRAP_HANDLER 0x260c 633 #define NVA1C0_SET_TRAP_HANDLER_OFFSET 31:0 634 635 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) 636 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 637 638 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) 639 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 640 641 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) 642 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 643 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 644 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 645 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 646 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 647 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 648 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 649 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 650 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 651 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 652 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 653 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 654 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 655 656 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) 657 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 658 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 659 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 660 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 661 662 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc 663 #define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 664 665 #define NVA1C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) 666 #define NVA1C0_SET_MME_SHADOW_SCRATCH_V 31:0 667 668 #endif /* _cl_kepler_compute_b_h_ */ 669