1 /* 2 * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef _cl_volta_compute_a_h_ 24 #define _cl_volta_compute_a_h_ 25 26 /* AUTO GENERATED FILE -- DO NOT EDIT */ 27 /* Command: ../../../../class/bin/sw_header.pl volta_compute_a */ 28 29 #include "nvtypes.h" 30 31 #define VOLTA_COMPUTE_A 0xC3C0 32 33 #define NVC3C0_SET_OBJECT 0x0000 34 #define NVC3C0_SET_OBJECT_CLASS_ID 15:0 35 #define NVC3C0_SET_OBJECT_ENGINE_ID 20:16 36 37 #define NVC3C0_NO_OPERATION 0x0100 38 #define NVC3C0_NO_OPERATION_V 31:0 39 40 #define NVC3C0_SET_NOTIFY_A 0x0104 41 #define NVC3C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 42 43 #define NVC3C0_SET_NOTIFY_B 0x0108 44 #define NVC3C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 45 46 #define NVC3C0_NOTIFY 0x010c 47 #define NVC3C0_NOTIFY_TYPE 31:0 48 #define NVC3C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 49 #define NVC3C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 50 51 #define NVC3C0_WAIT_FOR_IDLE 0x0110 52 #define NVC3C0_WAIT_FOR_IDLE_V 31:0 53 54 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 55 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 56 57 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 58 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 59 60 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 61 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 62 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 63 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 64 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 65 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 66 #define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 67 68 #define NVC3C0_SEND_GO_IDLE 0x013c 69 #define NVC3C0_SEND_GO_IDLE_V 31:0 70 71 #define NVC3C0_PM_TRIGGER 0x0140 72 #define NVC3C0_PM_TRIGGER_V 31:0 73 74 #define NVC3C0_PM_TRIGGER_WFI 0x0144 75 #define NVC3C0_PM_TRIGGER_WFI_V 31:0 76 77 #define NVC3C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 78 #define NVC3C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 79 80 #define NVC3C0_FE_ATOMIC_SEQUENCE_END 0x014c 81 #define NVC3C0_FE_ATOMIC_SEQUENCE_END_V 31:0 82 83 #define NVC3C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 84 #define NVC3C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 85 86 #define NVC3C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 87 #define NVC3C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 88 89 #define NVC3C0_LINE_LENGTH_IN 0x0180 90 #define NVC3C0_LINE_LENGTH_IN_VALUE 31:0 91 92 #define NVC3C0_LINE_COUNT 0x0184 93 #define NVC3C0_LINE_COUNT_VALUE 31:0 94 95 #define NVC3C0_OFFSET_OUT_UPPER 0x0188 96 #define NVC3C0_OFFSET_OUT_UPPER_VALUE 16:0 97 98 #define NVC3C0_OFFSET_OUT 0x018c 99 #define NVC3C0_OFFSET_OUT_VALUE 31:0 100 101 #define NVC3C0_PITCH_OUT 0x0190 102 #define NVC3C0_PITCH_OUT_VALUE 31:0 103 104 #define NVC3C0_SET_DST_BLOCK_SIZE 0x0194 105 #define NVC3C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 106 #define NVC3C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 107 #define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 108 #define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 109 #define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 110 #define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 111 #define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 112 #define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 113 #define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 114 #define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 115 #define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 116 #define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 117 #define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 118 #define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 119 #define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 120 #define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 121 122 #define NVC3C0_SET_DST_WIDTH 0x0198 123 #define NVC3C0_SET_DST_WIDTH_V 31:0 124 125 #define NVC3C0_SET_DST_HEIGHT 0x019c 126 #define NVC3C0_SET_DST_HEIGHT_V 31:0 127 128 #define NVC3C0_SET_DST_DEPTH 0x01a0 129 #define NVC3C0_SET_DST_DEPTH_V 31:0 130 131 #define NVC3C0_SET_DST_LAYER 0x01a4 132 #define NVC3C0_SET_DST_LAYER_V 31:0 133 134 #define NVC3C0_SET_DST_ORIGIN_BYTES_X 0x01a8 135 #define NVC3C0_SET_DST_ORIGIN_BYTES_X_V 20:0 136 137 #define NVC3C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac 138 #define NVC3C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 139 140 #define NVC3C0_LAUNCH_DMA 0x01b0 141 #define NVC3C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 142 #define NVC3C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 143 #define NVC3C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 144 #define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 145 #define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 146 #define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 147 #define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 148 #define NVC3C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 149 #define NVC3C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 150 #define NVC3C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 151 #define NVC3C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 152 #define NVC3C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 153 #define NVC3C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 154 #define NVC3C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 155 #define NVC3C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 156 #define NVC3C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 157 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP 15:13 158 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 159 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 160 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 161 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 162 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 163 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 164 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 165 #define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 166 #define NVC3C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 167 #define NVC3C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 168 #define NVC3C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 169 #define NVC3C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 170 #define NVC3C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 171 #define NVC3C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 172 173 #define NVC3C0_LOAD_INLINE_DATA 0x01b4 174 #define NVC3C0_LOAD_INLINE_DATA_V 31:0 175 176 #define NVC3C0_SET_I2M_SEMAPHORE_A 0x01dc 177 #define NVC3C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 178 179 #define NVC3C0_SET_I2M_SEMAPHORE_B 0x01e0 180 #define NVC3C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 181 182 #define NVC3C0_SET_I2M_SEMAPHORE_C 0x01e4 183 #define NVC3C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 184 185 #define NVC3C0_SET_I2M_SPARE_NOOP00 0x01f0 186 #define NVC3C0_SET_I2M_SPARE_NOOP00_V 31:0 187 188 #define NVC3C0_SET_I2M_SPARE_NOOP01 0x01f4 189 #define NVC3C0_SET_I2M_SPARE_NOOP01_V 31:0 190 191 #define NVC3C0_SET_I2M_SPARE_NOOP02 0x01f8 192 #define NVC3C0_SET_I2M_SPARE_NOOP02_V 31:0 193 194 #define NVC3C0_SET_I2M_SPARE_NOOP03 0x01fc 195 #define NVC3C0_SET_I2M_SPARE_NOOP03_V 31:0 196 197 #define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 198 #define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 199 200 #define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 201 #define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 202 203 #define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 204 #define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 205 206 #define NVC3C0_PERFMON_TRANSFER 0x0210 207 #define NVC3C0_PERFMON_TRANSFER_V 31:0 208 209 #define NVC3C0_INVALIDATE_SHADER_CACHES 0x021c 210 #define NVC3C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 211 #define NVC3C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 212 #define NVC3C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 213 #define NVC3C0_INVALIDATE_SHADER_CACHES_DATA 4:4 214 #define NVC3C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 215 #define NVC3C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 216 #define NVC3C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 217 #define NVC3C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 218 #define NVC3C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 219 #define NVC3C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 220 #define NVC3C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 221 #define NVC3C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 222 #define NVC3C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 223 #define NVC3C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 224 #define NVC3C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 225 226 #define NVC3C0_SET_RESERVED_SW_METHOD00 0x0220 227 #define NVC3C0_SET_RESERVED_SW_METHOD00_V 31:0 228 229 #define NVC3C0_SET_RESERVED_SW_METHOD01 0x0224 230 #define NVC3C0_SET_RESERVED_SW_METHOD01_V 31:0 231 232 #define NVC3C0_SET_RESERVED_SW_METHOD02 0x0228 233 #define NVC3C0_SET_RESERVED_SW_METHOD02_V 31:0 234 235 #define NVC3C0_SET_RESERVED_SW_METHOD03 0x022c 236 #define NVC3C0_SET_RESERVED_SW_METHOD03_V 31:0 237 238 #define NVC3C0_SET_RESERVED_SW_METHOD04 0x0230 239 #define NVC3C0_SET_RESERVED_SW_METHOD04_V 31:0 240 241 #define NVC3C0_SET_RESERVED_SW_METHOD05 0x0234 242 #define NVC3C0_SET_RESERVED_SW_METHOD05_V 31:0 243 244 #define NVC3C0_SET_RESERVED_SW_METHOD06 0x0238 245 #define NVC3C0_SET_RESERVED_SW_METHOD06_V 31:0 246 247 #define NVC3C0_SET_RESERVED_SW_METHOD07 0x023c 248 #define NVC3C0_SET_RESERVED_SW_METHOD07_V 31:0 249 250 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 251 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 252 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 253 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 254 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 255 256 #define NVC3C0_SET_CWD_REF_COUNTER 0x0248 257 #define NVC3C0_SET_CWD_REF_COUNTER_SELECT 5:0 258 #define NVC3C0_SET_CWD_REF_COUNTER_VALUE 23:8 259 260 #define NVC3C0_SET_RESERVED_SW_METHOD08 0x024c 261 #define NVC3C0_SET_RESERVED_SW_METHOD08_V 31:0 262 263 #define NVC3C0_SET_RESERVED_SW_METHOD09 0x0250 264 #define NVC3C0_SET_RESERVED_SW_METHOD09_V 31:0 265 266 #define NVC3C0_SET_RESERVED_SW_METHOD10 0x0254 267 #define NVC3C0_SET_RESERVED_SW_METHOD10_V 31:0 268 269 #define NVC3C0_SET_RESERVED_SW_METHOD11 0x0258 270 #define NVC3C0_SET_RESERVED_SW_METHOD11_V 31:0 271 272 #define NVC3C0_SET_RESERVED_SW_METHOD12 0x025c 273 #define NVC3C0_SET_RESERVED_SW_METHOD12_V 31:0 274 275 #define NVC3C0_SET_RESERVED_SW_METHOD13 0x0260 276 #define NVC3C0_SET_RESERVED_SW_METHOD13_V 31:0 277 278 #define NVC3C0_SET_RESERVED_SW_METHOD14 0x0264 279 #define NVC3C0_SET_RESERVED_SW_METHOD14_V 31:0 280 281 #define NVC3C0_SET_RESERVED_SW_METHOD15 0x0268 282 #define NVC3C0_SET_RESERVED_SW_METHOD15_V 31:0 283 284 #define NVC3C0_SET_SCG_CONTROL 0x0270 285 #define NVC3C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 286 #define NVC3C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 287 #define NVC3C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 288 #define NVC3C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 289 #define NVC3C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 290 291 #define NVC3C0_SET_COMPUTE_CLASS_VERSION 0x0280 292 #define NVC3C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 293 #define NVC3C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 294 295 #define NVC3C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 296 #define NVC3C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 297 #define NVC3C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 298 299 #define NVC3C0_SET_QMD_VERSION 0x0288 300 #define NVC3C0_SET_QMD_VERSION_CURRENT 15:0 301 #define NVC3C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 302 303 #define NVC3C0_CHECK_QMD_VERSION 0x0290 304 #define NVC3C0_CHECK_QMD_VERSION_CURRENT 15:0 305 #define NVC3C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 306 307 #define NVC3C0_INVALIDATE_SKED_CACHES 0x0298 308 #define NVC3C0_INVALIDATE_SKED_CACHES_V 0:0 309 310 #define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 311 #define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 312 313 #define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 314 #define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 315 316 #define NVC3C0_SCG_HYSTERESIS_CONTROL 0x02a8 317 #define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 318 #define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 319 #define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 320 #define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 321 #define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 322 #define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 323 324 #define NVC3C0_SET_CWD_SLOT_COUNT 0x02b0 325 #define NVC3C0_SET_CWD_SLOT_COUNT_V 7:0 326 327 #define NVC3C0_SEND_PCAS_A 0x02b4 328 #define NVC3C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 329 330 #define NVC3C0_SEND_PCAS_B 0x02b8 331 #define NVC3C0_SEND_PCAS_B_FROM 23:0 332 #define NVC3C0_SEND_PCAS_B_DELTA 31:24 333 334 #define NVC3C0_SEND_SIGNALING_PCAS_B 0x02bc 335 #define NVC3C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 336 #define NVC3C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 337 #define NVC3C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 338 #define NVC3C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 339 #define NVC3C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 340 #define NVC3C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 341 342 #define NVC3C0_SET_SKED_CACHE_CONTROL 0x02cc 343 #define NVC3C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 344 #define NVC3C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 345 #define NVC3C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 346 347 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 348 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 349 350 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 351 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 352 353 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec 354 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 355 356 #define NVC3C0_SET_SPA_VERSION 0x0310 357 #define NVC3C0_SET_SPA_VERSION_MINOR 7:0 358 #define NVC3C0_SET_SPA_VERSION_MAJOR 15:8 359 360 #define NVC3C0_SET_INLINE_QMD_ADDRESS_A 0x0318 361 #define NVC3C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 362 363 #define NVC3C0_SET_INLINE_QMD_ADDRESS_B 0x031c 364 #define NVC3C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 365 366 #define NVC3C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) 367 #define NVC3C0_LOAD_INLINE_QMD_DATA_V 31:0 368 369 #define NVC3C0_SET_FALCON00 0x0500 370 #define NVC3C0_SET_FALCON00_V 31:0 371 372 #define NVC3C0_SET_FALCON01 0x0504 373 #define NVC3C0_SET_FALCON01_V 31:0 374 375 #define NVC3C0_SET_FALCON02 0x0508 376 #define NVC3C0_SET_FALCON02_V 31:0 377 378 #define NVC3C0_SET_FALCON03 0x050c 379 #define NVC3C0_SET_FALCON03_V 31:0 380 381 #define NVC3C0_SET_FALCON04 0x0510 382 #define NVC3C0_SET_FALCON04_V 31:0 383 384 #define NVC3C0_SET_FALCON05 0x0514 385 #define NVC3C0_SET_FALCON05_V 31:0 386 387 #define NVC3C0_SET_FALCON06 0x0518 388 #define NVC3C0_SET_FALCON06_V 31:0 389 390 #define NVC3C0_SET_FALCON07 0x051c 391 #define NVC3C0_SET_FALCON07_V 31:0 392 393 #define NVC3C0_SET_FALCON08 0x0520 394 #define NVC3C0_SET_FALCON08_V 31:0 395 396 #define NVC3C0_SET_FALCON09 0x0524 397 #define NVC3C0_SET_FALCON09_V 31:0 398 399 #define NVC3C0_SET_FALCON10 0x0528 400 #define NVC3C0_SET_FALCON10_V 31:0 401 402 #define NVC3C0_SET_FALCON11 0x052c 403 #define NVC3C0_SET_FALCON11_V 31:0 404 405 #define NVC3C0_SET_FALCON12 0x0530 406 #define NVC3C0_SET_FALCON12_V 31:0 407 408 #define NVC3C0_SET_FALCON13 0x0534 409 #define NVC3C0_SET_FALCON13_V 31:0 410 411 #define NVC3C0_SET_FALCON14 0x0538 412 #define NVC3C0_SET_FALCON14_V 31:0 413 414 #define NVC3C0_SET_FALCON15 0x053c 415 #define NVC3C0_SET_FALCON15_V 31:0 416 417 #define NVC3C0_SET_FALCON16 0x0540 418 #define NVC3C0_SET_FALCON16_V 31:0 419 420 #define NVC3C0_SET_FALCON17 0x0544 421 #define NVC3C0_SET_FALCON17_V 31:0 422 423 #define NVC3C0_SET_FALCON18 0x0548 424 #define NVC3C0_SET_FALCON18_V 31:0 425 426 #define NVC3C0_SET_FALCON19 0x054c 427 #define NVC3C0_SET_FALCON19_V 31:0 428 429 #define NVC3C0_SET_FALCON20 0x0550 430 #define NVC3C0_SET_FALCON20_V 31:0 431 432 #define NVC3C0_SET_FALCON21 0x0554 433 #define NVC3C0_SET_FALCON21_V 31:0 434 435 #define NVC3C0_SET_FALCON22 0x0558 436 #define NVC3C0_SET_FALCON22_V 31:0 437 438 #define NVC3C0_SET_FALCON23 0x055c 439 #define NVC3C0_SET_FALCON23_V 31:0 440 441 #define NVC3C0_SET_FALCON24 0x0560 442 #define NVC3C0_SET_FALCON24_V 31:0 443 444 #define NVC3C0_SET_FALCON25 0x0564 445 #define NVC3C0_SET_FALCON25_V 31:0 446 447 #define NVC3C0_SET_FALCON26 0x0568 448 #define NVC3C0_SET_FALCON26_V 31:0 449 450 #define NVC3C0_SET_FALCON27 0x056c 451 #define NVC3C0_SET_FALCON27_V 31:0 452 453 #define NVC3C0_SET_FALCON28 0x0570 454 #define NVC3C0_SET_FALCON28_V 31:0 455 456 #define NVC3C0_SET_FALCON29 0x0574 457 #define NVC3C0_SET_FALCON29_V 31:0 458 459 #define NVC3C0_SET_FALCON30 0x0578 460 #define NVC3C0_SET_FALCON30_V 31:0 461 462 #define NVC3C0_SET_FALCON31 0x057c 463 #define NVC3C0_SET_FALCON31_V 31:0 464 465 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 466 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 467 468 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 469 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 470 471 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 472 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 473 474 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 475 #define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 476 477 #define NVC3C0_SET_SHADER_CACHE_CONTROL 0x0d94 478 #define NVC3C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 479 #define NVC3C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 480 #define NVC3C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 481 482 #define NVC3C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 483 #define NVC3C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 484 485 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_ALL 0x120c 486 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 487 488 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 489 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 490 491 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 492 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 493 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 494 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 495 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 496 497 #define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 498 #define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 499 #define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 500 #define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 501 502 #define NVC3C0_INVALIDATE_SAMPLER_CACHE 0x1330 503 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 504 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 505 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 506 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 507 508 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 509 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 510 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 511 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 512 #define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 513 514 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 515 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 516 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 517 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 518 #define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 519 520 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 521 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 522 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 523 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 524 #define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 525 526 #define NVC3C0_SET_SHADER_EXCEPTIONS 0x1528 527 #define NVC3C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 528 #define NVC3C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 529 #define NVC3C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 530 531 #define NVC3C0_SET_RENDER_ENABLE_A 0x1550 532 #define NVC3C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 533 534 #define NVC3C0_SET_RENDER_ENABLE_B 0x1554 535 #define NVC3C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 536 537 #define NVC3C0_SET_RENDER_ENABLE_C 0x1558 538 #define NVC3C0_SET_RENDER_ENABLE_C_MODE 2:0 539 #define NVC3C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 540 #define NVC3C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 541 #define NVC3C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 542 #define NVC3C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 543 #define NVC3C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 544 545 #define NVC3C0_SET_TEX_SAMPLER_POOL_A 0x155c 546 #define NVC3C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 547 548 #define NVC3C0_SET_TEX_SAMPLER_POOL_B 0x1560 549 #define NVC3C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 550 551 #define NVC3C0_SET_TEX_SAMPLER_POOL_C 0x1564 552 #define NVC3C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 553 554 #define NVC3C0_SET_TEX_HEADER_POOL_A 0x1574 555 #define NVC3C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 556 557 #define NVC3C0_SET_TEX_HEADER_POOL_B 0x1578 558 #define NVC3C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 559 560 #define NVC3C0_SET_TEX_HEADER_POOL_C 0x157c 561 #define NVC3C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 562 563 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 564 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 565 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 566 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 567 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 568 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 569 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 570 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 571 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 572 #define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 573 574 #define NVC3C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 575 #define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 576 #define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 577 #define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 578 #define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 579 580 #define NVC3C0_PIPE_NOP 0x1a2c 581 #define NVC3C0_PIPE_NOP_V 31:0 582 583 #define NVC3C0_SET_SPARE00 0x1a30 584 #define NVC3C0_SET_SPARE00_V 31:0 585 586 #define NVC3C0_SET_SPARE01 0x1a34 587 #define NVC3C0_SET_SPARE01_V 31:0 588 589 #define NVC3C0_SET_SPARE02 0x1a38 590 #define NVC3C0_SET_SPARE02_V 31:0 591 592 #define NVC3C0_SET_SPARE03 0x1a3c 593 #define NVC3C0_SET_SPARE03_V 31:0 594 595 #define NVC3C0_SET_REPORT_SEMAPHORE_A 0x1b00 596 #define NVC3C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 597 598 #define NVC3C0_SET_REPORT_SEMAPHORE_B 0x1b04 599 #define NVC3C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 600 601 #define NVC3C0_SET_REPORT_SEMAPHORE_C 0x1b08 602 #define NVC3C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 603 604 #define NVC3C0_SET_REPORT_SEMAPHORE_D 0x1b0c 605 #define NVC3C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 606 #define NVC3C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 607 #define NVC3C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 608 #define NVC3C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 609 #define NVC3C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 610 #define NVC3C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 611 #define NVC3C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 612 #define NVC3C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 613 #define NVC3C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 614 #define NVC3C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 615 #define NVC3C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 616 #define NVC3C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 617 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 618 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 619 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 620 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 621 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 622 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 623 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 624 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 625 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 626 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 627 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 628 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 629 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 630 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 631 #define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 632 633 #define NVC3C0_SET_TRAP_HANDLER_A 0x25f8 634 #define NVC3C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 635 636 #define NVC3C0_SET_TRAP_HANDLER_B 0x25fc 637 #define NVC3C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 638 639 #define NVC3C0_SET_BINDLESS_TEXTURE 0x2608 640 #define NVC3C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 641 642 #define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) 643 #define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 644 645 #define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) 646 #define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 647 648 #define NVC3C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 649 #define NVC3C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 650 651 #define NVC3C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 652 #define NVC3C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 653 654 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) 655 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 656 657 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) 658 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 659 660 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) 661 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 662 663 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) 664 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 665 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 666 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 667 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 668 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 669 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 670 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 671 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 672 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 673 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 674 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 675 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 676 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 677 678 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) 679 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 680 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 681 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 682 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 683 684 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc 685 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 686 687 #define NVC3C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 688 #define NVC3C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 689 690 #define NVC3C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 691 #define NVC3C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 692 693 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 694 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 695 696 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec 697 #define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 698 699 #define NVC3C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) 700 #define NVC3C0_SET_MME_SHADOW_SCRATCH_V 31:0 701 702 #endif /* _cl_volta_compute_a_h_ */ 703