1 /* 2 * Copyright (c) 2021-2023, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codec_hw_next.h 24 //! \brief This modules implements HW interface layer to be used on all platforms on all operating systems/DDIs, across CODECHAL components. 25 //! 26 27 #ifndef __CODEC_HW_NEXT_H__ 28 #define __CODEC_HW_NEXT_H__ 29 30 #include "codechal_common.h" 31 #include "media_interfaces_mhw_next.h" 32 33 #include "mhw_mi_itf.h" 34 #include "media_sfc_interface.h" 35 #include "renderhal.h" 36 #include "codechal_setting.h" 37 #include "mhw_vdbox_vvcp_itf.h" 38 39 #define HUC_DMEM_OFFSET_RTOS_GEMS 0x2000 40 //------------------------------------------------------------------------------ 41 // Macros specific to MOS_CODEC_SUBCOMP_HW sub-comp 42 //------------------------------------------------------------------------------ 43 #define CODEC_HW_ASSERT(_expr) \ 44 MOS_ASSERT(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _expr) 45 46 #define CODEC_HW_ASSERTMESSAGE(_message, ...) \ 47 MOS_ASSERTMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _message, ##__VA_ARGS__) 48 49 #define CODEC_HW_NORMALMESSAGE(_message, ...) \ 50 MOS_NORMALMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _message, ##__VA_ARGS__) 51 52 #define CODEC_HW_VERBOSEMESSAGE(_message, ...) \ 53 MOS_VERBOSEMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _message, ##__VA_ARGS__) 54 55 #define CODEC_HW_FUNCTION_ENTER \ 56 MOS_FUNCTION_ENTER(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW) 57 58 #define CODEC_HW_CHK_STATUS(_stmt) \ 59 MOS_CHK_STATUS(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _stmt) 60 61 #define CODEC_HW_CHK_STATUS_RETURN(_stmt) \ 62 MOS_CHK_STATUS_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _stmt) 63 64 #define CODEC_HW_CHK_STATUS_MESSAGE(_stmt, _message, ...) \ 65 MOS_CHK_STATUS_MESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _stmt, _message, ##__VA_ARGS__) 66 67 #define CODEC_HW_CHK_NULL(_ptr) \ 68 MOS_CHK_NULL(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _ptr) 69 70 #define CODEC_HW_CHK_NULL_RETURN(_ptr) \ 71 MOS_CHK_NULL_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _ptr) 72 73 #define CODEC_HW_CHK_NULL_NO_STATUS(_ptr) \ 74 MOS_CHK_NULL_NO_STATUS(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _ptr) 75 76 #define CODEC_HW_CHK_COND_RETURN(_expr, _message, ...) \ 77 MOS_CHK_COND_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW,_expr,_message, ##__VA_ARGS__) 78 79 #define CODECHAL_SURFACE_PITCH_ALIGNMENT 128 80 81 class MediaScalability; 82 class MediaContext; 83 class MediaCopyBaseState; 84 85 //! Codec hw next interface 86 /*! 87 This class defines the interfaces for hardware dependent settings and functions used in Codechal 88 */ 89 class CodechalHwInterfaceNext 90 { 91 public: 92 //! 93 //! \brief Constructor 94 //! 95 CodechalHwInterfaceNext( 96 PMOS_INTERFACE osInterface, 97 CODECHAL_FUNCTION codecFunction, 98 MhwInterfacesNext *mhwInterfacesNext, 99 bool disableScalability = false); 100 //! 101 //! \brief Constructor 102 //! 103 CodechalHwInterfaceNext( 104 PMOS_INTERFACE osInterface, 105 bool disableScalability = false); 106 107 //! 108 //! \brief Destructor 109 //! 110 virtual ~CodechalHwInterfaceNext(); 111 112 static CodechalHwInterfaceNext* Create( 113 PMOS_INTERFACE osInterface, 114 CODECHAL_FUNCTION codecFunction, 115 MhwInterfacesNext* mhwInterfacesNext, 116 bool disableScalability); 117 118 //! 119 //! \brief Initialize the codechal hw interface 120 //! \details Initialize the interface before using 121 //! 122 //! \param [in] settings 123 //! Settings for initialization 124 //! 125 //! \return MOS_STATUS 126 //! MOS_STATUS_SUCCESS if success, else fail reason 127 //! 128 virtual MOS_STATUS Initialize( 129 CodechalSetting *settings); 130 131 MOS_STATUS GetVdencPictureSecondLevelCommandsSize( 132 uint32_t mode, 133 uint32_t *commandsSize); 134 135 //! \brief Create media copy 136 //! \details Create media copy instance. 137 //! \param osInterface 138 //! [in] Pointer to MOS_INTERFACE. 139 //! \return MediaCopyBaseState* 140 //! Pointer to MediaCopyBaseState 141 //! CreateMediaCopy(PMOS_INTERFACE mosInterface)142 virtual MediaCopyBaseState *CreateMediaCopy(PMOS_INTERFACE mosInterface) 143 { 144 return nullptr; 145 } 146 147 //! 148 //! \brief Get Cacheability Settings 149 //! \details Get Cacheability Settings in codechal hw interface 150 //! 151 //! \return [out] MHW_MEMORY_OBJECT_CONTROL_PARAMS* 152 //! Cachebility Settings got. 153 //! GetCacheabilitySettings()154 inline MHW_MEMORY_OBJECT_CONTROL_PARAMS *GetCacheabilitySettings() 155 { 156 return m_cacheabilitySettings; 157 } 158 159 //! 160 //! \brief Get platform 161 //! \details Get platform in codechal hw interface 162 //! 163 //! \return [out] PLATFORM 164 //! Platform got. 165 //! GetPlatform()166 inline PLATFORM GetPlatform() 167 { 168 return m_platform; 169 } 170 171 //! 172 //! \brief Get Wa table 173 //! \details Get Wa table in codechal hw interface 174 //! 175 //! \return [out] MEDIA_WA_TABLE 176 //! Wa table got. 177 //! GetWaTable()178 inline MEDIA_WA_TABLE *GetWaTable() 179 { 180 return m_waTable; 181 } 182 183 //! 184 //! \brief Get SFC interface 185 //! \details Get SFC interface in codechal hw interface 186 //! 187 //! \return [out] MhwSfcInterface* 188 //! Interface got. 189 //! GetSfcInterface()190 inline MhwSfcInterface *GetSfcInterface() 191 { 192 return m_sfcInterface; 193 } 194 195 //! 196 //! \brief Get renderHal interface 197 //! \details Get renderHal interface in codechal hw interface 198 //! 199 //! \return [out] RENDERHAL_INTERFACE* 200 //! Interface got. 201 //! GetRenderHalInterface()202 inline RENDERHAL_INTERFACE *GetRenderHalInterface() 203 { 204 return m_renderHal; 205 } 206 207 //! 208 //! \brief Get mfx interface 209 //! \details Get mfx interface in codechal hw interface next 210 //! 211 //! \return pointer to new MFX interface 212 //! GetMfxInterfaceNext()213 inline std::shared_ptr<mhw::vdbox::mfx::Itf> GetMfxInterfaceNext() 214 { 215 return m_mfxItf; 216 } 217 218 //! 219 //! \brief Get avp interface 220 //! \details Get avp interface in codechal hw interface next 221 //! 222 //! \return pointer to new AVP interface 223 //! GetAvpInterfaceNext()224 inline std::shared_ptr<mhw::vdbox::avp::Itf> GetAvpInterfaceNext() 225 { 226 return m_avpItf; 227 } 228 229 //! 230 //! \brief Get vdenc interface 231 //! \details Get vdenc interface in codechal hw interface next 232 //! 233 //! \return pointer to new VDENC interface 234 //! GetVdencInterfaceNext()235 inline std::shared_ptr<mhw::vdbox::vdenc::Itf> GetVdencInterfaceNext() 236 { 237 return m_vdencItf; 238 } 239 240 //! \brief Get huc interface 241 //! \details Get huc interface in codechal hw interface next 242 //! 243 //! \return pointer to new HUC interface 244 //! GetHucInterfaceNext()245 inline std::shared_ptr<mhw::vdbox::huc::Itf> GetHucInterfaceNext() 246 { 247 return m_hucItf; 248 } 249 250 //! 251 //! \brief Get mi interface 252 //! \details Get mi interface in codechal hw interface next 253 //! 254 //! \return pointer to new MI interface 255 //! GetMiInterfaceNext()256 inline std::shared_ptr<mhw::mi::Itf> GetMiInterfaceNext() 257 { 258 return m_miItf; 259 } 260 261 //! 262 //! \brief Get hcp interface 263 //! \details Get hcp interface in codechal hw interface next 264 //! 265 //! \return pointer to new HCP interface 266 //! GetHcpInterfaceNext()267 inline std::shared_ptr<mhw::vdbox::hcp::Itf> GetHcpInterfaceNext() 268 { 269 return m_hcpItf; 270 } 271 272 //! 273 //! \brief Get render interface 274 //! \details Get render interface in codechal hw interface next 275 //! 276 //! \return pointer to new HCP interface 277 //! GetRenderInterfaceNext()278 inline std::shared_ptr<mhw::render::Itf> GetRenderInterfaceNext() 279 { 280 return m_renderItf; 281 } 282 283 //! 284 //! \brief Get vvcp interface 285 //! \details Get vvcp interface in codechal hw interface next 286 //! 287 //! \return pointer to new VVCP interface 288 //! GetVvcpInterfaceNext()289 inline std::shared_ptr<mhw::vdbox::vvcp::Itf> GetVvcpInterfaceNext() 290 { 291 return m_vvcpItf; 292 } 293 294 //! 295 //! \brief Get Os interface 296 //! \details Get Os interface in codechal hw interface 297 //! 298 //! \return [out] PMOS_INTERFACE 299 //! Interface got. 300 //! GetOsInterface()301 inline PMOS_INTERFACE GetOsInterface() 302 { 303 return m_osInterface; 304 } 305 306 //! 307 //! \brief Get Sku table 308 //! \details Get Sku table in codechal hw interface 309 //! 310 //! \return [out] MEDIA_FEATURE_TABLE * 311 //! Sku table got. 312 //! GetSkuTable()313 inline MEDIA_FEATURE_TABLE *GetSkuTable() 314 { 315 return m_skuTable; 316 } 317 318 //! 319 //! \brief Get cp interface 320 //! \details Get cp interface in codechal hw interface 321 //! 322 //! \return [out] MhwCpInterface* 323 //! Interface got. 324 //! GetCpInterface()325 inline MhwCpInterface *GetCpInterface() 326 { 327 return m_cpInterface; 328 } 329 GetMediaSfcInterface()330 inline std::shared_ptr<MediaSfcInterface> GetMediaSfcInterface() 331 { 332 return m_mediaSfcItf; 333 } 334 SetMediaSfcInterface(std::shared_ptr<MediaSfcInterface> itf)335 inline void SetMediaSfcInterface(std::shared_ptr<MediaSfcInterface> itf) 336 { 337 m_mediaSfcItf = itf; 338 } 339 340 //! 341 //! \brief Init Cacheability Control Settings 342 //! \details Init Cacheability Control Settings in codechal hw interface 343 //! 344 //! \param [in] codecFunction 345 //! codec function used to judge how to setup cacheability control settings 346 //! 347 //! \return MOS_STATUS 348 //! MOS_STATUS_SUCCESS if success, else fail reason 349 //! 350 MOS_STATUS InitCacheabilityControlSettings( 351 CODECHAL_FUNCTION codecFunction); 352 353 //! 354 //! \brief Get memory object of GMM Cacheability control settings 355 //! \details Internal function to get memory object of GMM Cacheability control settings 356 //! 357 //! \param [in] mosUsage 358 //! Codec usages in mos type 359 //! 360 //! \return MOS_STATUS 361 //! MOS_STATUS_SUCCESS if success, else fail reason 362 //! 363 MOS_STATUS CachePolicyGetMemoryObject( 364 MOS_HW_RESOURCE_DEF mosUsage); 365 ComposeSurfaceCacheabilityControl(uint32_t cacheabiltySettingIdx,uint32_t cacheabilityTypeRequested)366 uint32_t ComposeSurfaceCacheabilityControl( 367 uint32_t cacheabiltySettingIdx, 368 uint32_t cacheabilityTypeRequested) 369 { 370 CODEC_HW_FUNCTION_ENTER; 371 372 MHW_MEMORY_OBJECT_CONTROL_PARAMS cacheSetting = m_cacheabilitySettings[cacheabiltySettingIdx]; 373 374 return (uint32_t)m_cacheabilitySettings[cacheabiltySettingIdx].Value; 375 } 376 377 //! 378 //! \brief Calculates the maximum size for AVP picture level commands 379 //! \details Client facing function to calculate the maximum size for AVP picture level commands 380 //! \param [in] mode 381 //! Indicate the codec mode 382 //! \param [out] commandsSize 383 //! The maximum command buffer size 384 //! \param [out] patchListSize 385 //! The maximum command patch list size 386 //! \param [in] params 387 //! Indicate the command size parameters 388 //! \return MOS_STATUS 389 //! MOS_STATUS_SUCCESS if success, else fail reason 390 //! 391 virtual MOS_STATUS GetAvpStateCommandSize( 392 uint32_t mode, 393 uint32_t *commandsSize, 394 uint32_t *patchListSize, 395 PMHW_VDBOX_STATE_CMDSIZE_PARAMS params); 396 397 //! 398 //! \brief Calculates maximum size for AVP tile level commands 399 //! \details Client facing function to calculate maximum size for AVP tile level commands 400 //! \param [in] mode 401 //! Indicate the codec mode 402 //! \param [out] commandsSize 403 //! The maximum command buffer size 404 //! \param [out] patchListSize 405 //! The maximum command patch list size 406 //! \return MOS_STATUS 407 //! MOS_STATUS_SUCCESS if success, else fail reason 408 //! 409 virtual MOS_STATUS GetAvpPrimitiveCommandSize( 410 uint32_t mode, 411 uint32_t *commandsSize, 412 uint32_t *patchListSize); 413 414 //! 415 //! \brief Set Cacheability Settings 416 //! \details Set Cacheability Settings in sub interfaces in codechal hw interface 417 //! 418 //! \param [in] cacheabilitySettings 419 //! cacheability Settings to set into sub mhw intefaces in hw interface 420 //! 421 //! \return MOS_STATUS 422 //! MOS_STATUS_SUCCESS if success, else fail reason 423 //! 424 virtual MOS_STATUS SetCacheabilitySettings( 425 MHW_MEMORY_OBJECT_CONTROL_PARAMS cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_END_CODEC]); 426 427 //! 428 //! \brief Calculates the maximum size for Huc picture level commands 429 //! \details Client facing function to calculate the maximum size for Huc picture level commands 430 //! \param [in] mode 431 //! Indicate the codec mode 432 //! \param [out] commandsSize 433 //! The maximum command buffer size 434 //! \param [out] patchListSize 435 //! The maximum command patch list size 436 //! \param [in] params 437 //! Indicate the command size parameters 438 //! \return MOS_STATUS 439 //! MOS_STATUS_SUCCESS if success, else fail reason 440 //! 441 virtual MOS_STATUS GetHucStateCommandSize( 442 uint32_t mode, 443 uint32_t* commandsSize, 444 uint32_t* patchListSize, 445 PMHW_VDBOX_STATE_CMDSIZE_PARAMS params); 446 447 //! 448 //! \brief Calculates maximum size for all picture level commands 449 //! \details Client facing function to calculate maximum size for all slice/MB level commands in mfx pipeline 450 //! 451 //! \param [in] mode 452 //! Codec mode 453 //! \param [out] commandsSize 454 //! The maximum command buffer size 455 //! \param [out] patchListSize 456 //! The maximum command patch list size 457 //! \param [in] modeSpecific 458 //! Indicate the long or short format for decoder or single take phase for encoder 459 //! 460 //! \return MOS_STATUS 461 //! MOS_STATUS_SUCCESS if success, else fail reason 462 //! 463 virtual MOS_STATUS GetMfxStateCommandsDataSize( 464 uint32_t mode, 465 uint32_t *commandsSize, 466 uint32_t *patchListSize, 467 bool modeSpecific); 468 469 //! 470 //! \brief Calculates maximum size for all slice/MB level commands 471 //! \details Client facing function to calculate maximum size for all slice/MB level commands in mfx pipeline 472 //! 473 //! \param [in] mode 474 //! Codec mode 475 //! \param [out] commandsSize 476 //! The maximum command buffer size 477 //! \param [out] patchListSize 478 //! The maximum command patch list size 479 //! \param [in] modeSpecific 480 //! Indicate the long or short format for decoder or single take phase for encoder 481 //! 482 //! \return MOS_STATUS 483 //! MOS_STATUS_SUCCESS if success, else fail reason 484 //! 485 virtual MOS_STATUS GetMfxPrimitiveCommandsDataSize( 486 uint32_t mode, 487 uint32_t *commandsSize, 488 uint32_t *patchListSize, 489 bool modeSpecific); 490 491 //! 492 //! \brief Calculates maximum size for HCP slice/MB level commands 493 //! \details Client facing function to calculate maximum size for HCP slice/MB level commands 494 //! \param [in] mode 495 //! Indicate the codec mode 496 //! \param [out] commandsSize 497 //! The maximum command buffer size 498 //! \param [out] patchListSize 499 //! The maximum command patch list size 500 //! \param [in] modeSpecific 501 //! Indicate the long or short format 502 //! \return MOS_STATUS 503 //! MOS_STATUS_SUCCESS if success, else fail reason 504 //! 505 virtual MOS_STATUS GetHcpPrimitiveCommandSize( 506 uint32_t mode, 507 uint32_t *commandsSize, 508 uint32_t *patchListSize, 509 bool modeSpecific); 510 511 //! 512 //! \brief Calculates the maximum size for VVCP picture level commands 513 //! \details Client facing function to calculate the maximum size for VVCP picture level commands 514 //! \param [in] mode 515 //! Indicate the codec mode 516 //! \param [out] commandsSize 517 //! The maximum command buffer size 518 //! \param [out] patchListSize 519 //! The maximum command patch list size 520 //! \param [in] params 521 //! Indicate the command size parameters 522 //! \return MOS_STATUS 523 //! MOS_STATUS_SUCCESS if success, else fail reason 524 //! 525 MOS_STATUS GetVvcpStateCommandSize( 526 uint32_t mode, 527 uint32_t *commandsSize, 528 uint32_t *patchListSize, 529 PMHW_VDBOX_STATE_CMDSIZE_PARAMS params); 530 531 //! 532 //! \brief Calculates the size for VVCP slice level commands 533 //! \details Client facing function to calculate the maximum size for VVCP picture level commands 534 //! \param [in] mode 535 //! Indicate the codec mode 536 //! \param [out] sliceCommandsSize 537 //! The maximum command buffer size for slice 538 //! \param [out] slicePatchListSize 539 //! The maximum command patch list size for slice 540 //! \param [out] tileCommandsSize 541 //! The maximum command buffer size for tile 542 //! \param [out] tilePatchListSize 543 //! The maximum command patch list size for tile 544 //! \return MOS_STATUS 545 //! MOS_STATUS_SUCCESS if success, else fail reason 546 //! 547 MOS_STATUS GetVvcpPrimitiveCommandSize( 548 uint32_t mode, 549 uint32_t *sliceCommandsSize, 550 uint32_t *slicePatchListSize, 551 uint32_t *tileCommandsSize, 552 uint32_t *tilePatchListSize); 553 554 MOS_STATUS GetVvcpSliceLvlCmdSize(uint32_t *sliceLvlCmdSize); 555 556 //! 557 //! \brief Add Huc stream out copy cmds 558 //! \details Prepare and add Huc stream out copy cmds 559 //! 560 //! \param [in,out] cmdBuffer 561 //! Command buffer 562 //! 563 //! \return MOS_STATUS 564 //! MOS_STATUS_SUCCESS if success, else fail reason 565 //! 566 MOS_STATUS AddHucDummyStreamOut( 567 PMOS_COMMAND_BUFFER cmdBuffer); 568 569 //! 570 //! \brief Perform Huc stream out copy 571 //! \details Implement the copy using huc stream out 572 //! 573 //! \param [in] hucStreamOutParams 574 //! Huc stream out parameters 575 //! \param [in,out] cmdBuffer 576 //! Command buffer 577 //! 578 //! \return MOS_STATUS 579 //! MOS_STATUS_SUCCESS if success, else fail reason 580 //! 581 MOS_STATUS PerformHucStreamOut( 582 CodechalHucStreamoutParams *hucStreamOutParams, 583 PMOS_COMMAND_BUFFER cmdBuffer); 584 585 //! \brief Read HCP status for status report 586 //! \param vdboxIndex 587 //! [in] the vdbox index 588 //! \param params 589 //! [in] the parameters for HCP status read 590 //! \param cmdBuffer 591 //! [in, out] the command buffer 592 //! \return MOS_STATUS 593 //! MOS_STATUS_SUCCESS if success, else fail reason 594 //! 595 MOS_STATUS ReadHcpStatus( 596 MHW_VDBOX_NODE_IND vdboxIndex, 597 const EncodeStatusReadParams ¶ms, 598 PMOS_COMMAND_BUFFER cmdBuffer); 599 600 //! 601 //! \brief Read HCP specific image status for status report 602 //! \param vdboxIndex 603 //! [in] the vdbox index 604 //! \param params 605 //! [in] the parameters for HCP IMG status read 606 //! \param cmdBuffer 607 //! [in, out] the command buffer 608 //! \return MOS_STATUS 609 //! MOS_STATUS_SUCCESS if success, else fail reason 610 //! 611 MOS_STATUS ReadImageStatusForHcp( 612 MHW_VDBOX_NODE_IND vdboxIndex, 613 const EncodeStatusReadParams ¶ms, 614 PMOS_COMMAND_BUFFER cmdBuffer); 615 GetMaxVdboxIndex()616 MHW_VDBOX_NODE_IND GetMaxVdboxIndex() 617 { 618 return MEDIA_IS_SKU(m_skuTable, FtrVcs2) ? MHW_VDBOX_NODE_2 : MHW_VDBOX_NODE_1; 619 }; 620 621 //! 622 //! \brief Check if disable scalability by default 623 //! \return bool 624 //! True if it is to disable scalability by default, else it is not. 625 //! IsDisableScalability()626 bool IsDisableScalability() 627 { 628 return m_disableScalability; 629 } 630 631 //! 632 //! \brief Resizes the cmd buffer and patch list 633 //! \details Resizes the buffer to be used for rendering GPU commands 634 //! 635 //! \param [in] requestedCommandBufferSize 636 //! Requested resize command buffer size 637 //! \param [in] requestedPatchListSize 638 //! Requested resize patchlist size 639 //! 640 //! \return MOS_STATUS 641 //! MOS_STATUS_SUCCESS if success, else fail reason 642 //! ResizeCommandBufferAndPatchList(uint32_t requestedCommandBufferSize,uint32_t requestedPatchListSize)643 MOS_STATUS ResizeCommandBufferAndPatchList( 644 uint32_t requestedCommandBufferSize, 645 uint32_t requestedPatchListSize) 646 { 647 CODEC_HW_FUNCTION_ENTER; 648 649 if (m_osInterface->bUsesCmdBufHeaderInResize) 650 { 651 return ResizeCommandBufferAndPatchListCmd(requestedCommandBufferSize, requestedPatchListSize); 652 } 653 else 654 { 655 return ResizeCommandBufferAndPatchListOs(requestedCommandBufferSize, requestedPatchListSize); 656 } 657 } 658 659 660 MediaScalability *m_singlePipeScalability = nullptr; 661 MediaScalability *m_multiPipeScalability = nullptr; 662 MOS_STATUS(*pfnCreateDecodeSinglePipe) 663 (void *hwInterface, MediaContext *mediaContext, uint8_t componentType) = nullptr; 664 MOS_STATUS(*pfnCreateDecodeMultiPipe) 665 (void *hwInterface, MediaContext *mediaContext, uint8_t componentType) = nullptr; 666 667 //! 668 //! \brief Select Vdbox by index and get MMIO register 669 //! \details Uses input parameters to Select VDBOX from KMD and get MMIO register 670 //! \param index 671 //! [in] vdbox index interface 672 //! \param pCmdBuffer 673 //! [in] get mos vdbox id from cmd buffer 674 //! \return MmioRegistersMfx 675 //! return the vdbox mmio register 676 //! 677 MmioRegistersMfx *SelectVdAndGetMmioReg( 678 MHW_VDBOX_NODE_IND index, 679 PMOS_COMMAND_BUFFER pCmdBuffer); 680 681 //! 682 //! \brief Init L3 Cache Settings 683 //! 684 //! \return MOS_STATUS 685 //! MOS_STATUS_SUCCESS if success, else fail reason 686 //! 687 virtual MOS_STATUS InitL3CacheSettings(); 688 689 //! 690 //! \brief Set Rowstore Cache offsets 691 //! \details Set Rowstore Cache offsets in sub interfaces in codechal hw interface 692 //! 693 //! \param [in] rowstoreParams 694 //! parameters to set rowstore cache offsets 695 //! 696 //! \return MOS_STATUS 697 //! MOS_STATUS_SUCCESS if success, else fail reason 698 //! 699 virtual MOS_STATUS SetRowstoreCachingOffsets( 700 PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams); 701 UsesRenderEngine(CODECHAL_FUNCTION codecFunction,uint32_t standard)702 bool UsesRenderEngine(CODECHAL_FUNCTION codecFunction, uint32_t standard) 703 { 704 if (codecFunction == CODECHAL_FUNCTION_ENC || 705 (codecFunction == CODECHAL_FUNCTION_ENC_PAK) || 706 codecFunction == CODECHAL_FUNCTION_HYBRIDPAK || 707 ((codecFunction == CODECHAL_FUNCTION_DECODE) && (standard == CODECHAL_VC1)) || 708 codecFunction == CODECHAL_FUNCTION_ENC_VDENC_PAK || 709 codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC || 710 codecFunction == CODECHAL_FUNCTION_FEI_ENC || 711 codecFunction == CODECHAL_FUNCTION_FEI_ENC_PAK) 712 { 713 return true; 714 } 715 716 return false; 717 } 718 719 //! 720 //! \brief Send mi atomic dword cmd with indirect data (non-inline) mode 721 //! \details Send mi atomic dword cmd for sync perpose 722 //! 723 //! \param [in] resource 724 //! Reource used in mi atomic dword cmd 725 //! \param [in] opCode 726 //! Operation code 727 //! \param [in,out] cmdBuffer 728 //! command buffer 729 //! 730 //! \return MOS_STATUS 731 //! MOS_STATUS_SUCCESS if success, else fail reason 732 //! SendMiAtomicDwordIndirectDataCmd(PMOS_RESOURCE resource,MHW_COMMON_MI_ATOMIC_OPCODE opCode,PMOS_COMMAND_BUFFER cmdBuffer)733 MOS_STATUS SendMiAtomicDwordIndirectDataCmd( 734 PMOS_RESOURCE resource, 735 MHW_COMMON_MI_ATOMIC_OPCODE opCode, 736 PMOS_COMMAND_BUFFER cmdBuffer) 737 { 738 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 739 740 CODEC_HW_FUNCTION_ENTER; 741 CODEC_HW_CHK_NULL_RETURN(m_miItf); 742 743 auto ¶ms = m_miItf->MHW_GETPAR_F(MI_ATOMIC)(); 744 params = {}; 745 params.pOsResource = resource; 746 params.dwDataSize = sizeof(uint32_t); 747 params.Operation = (mhw::mi::MHW_COMMON_MI_ATOMIC_OPCODE) opCode; 748 params.bInlineData = false; 749 eStatus = m_miItf->MHW_ADDCMD_F(MI_ATOMIC)(cmdBuffer); 750 751 return eStatus; 752 } 753 754 //! 755 //! \brief Send mi atomic dword cmd 756 //! \details Send mi atomic dword cmd for sync perpose 757 //! 758 //! \param [in] resource 759 //! Reource used in mi atomic dword cmd 760 //! \param [in] immData 761 //! Immediate data 762 //! \param [in] opCode 763 //! Operation code 764 //! \param [in,out] cmdBuffer 765 //! command buffer 766 //! 767 //! \return MOS_STATUS 768 //! MOS_STATUS_SUCCESS if success, else fail reason 769 //! SendMiAtomicDwordCmd(PMOS_RESOURCE resource,uint32_t immData,MHW_COMMON_MI_ATOMIC_OPCODE opCode,PMOS_COMMAND_BUFFER cmdBuffer)770 MOS_STATUS SendMiAtomicDwordCmd( 771 PMOS_RESOURCE resource, 772 uint32_t immData, 773 MHW_COMMON_MI_ATOMIC_OPCODE opCode, 774 PMOS_COMMAND_BUFFER cmdBuffer) 775 { 776 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 777 778 CODEC_HW_FUNCTION_ENTER; 779 CODEC_HW_CHK_NULL_RETURN(m_miItf); 780 781 auto ¶ms = m_miItf->MHW_GETPAR_F(MI_ATOMIC)(); 782 params = {}; 783 params.pOsResource = resource; 784 params.dwDataSize = sizeof(uint32_t); 785 params.Operation = (mhw::mi::MHW_COMMON_MI_ATOMIC_OPCODE) opCode; 786 params.bInlineData = true; 787 params.dwOperand1Data[0] = immData; 788 eStatus = m_miItf->MHW_ADDCMD_F(MI_ATOMIC)(cmdBuffer); 789 790 return eStatus; 791 } 792 793 //! 794 //! \brief Send hw semphore wait cmd 795 //! \details Send hw semphore wait cmd for sync perpose 796 //! 797 //! \param [in] semaMem 798 //! Reource of Hw semphore 799 //! \param [in] semaData 800 //! Data of Hw semphore 801 //! \param [in] opCode 802 //! Operation code 803 //! \param [in,out] cmdBuffer 804 //! command buffer 805 //! 806 //! \return MOS_STATUS 807 //! MOS_STATUS_SUCCESS if success, else fail reason 808 //! 809 MOS_STATUS SendHwSemaphoreWaitCmd( 810 PMOS_RESOURCE semaMem, 811 uint32_t semaData, 812 MHW_COMMON_MI_SEMAPHORE_COMPARE_OPERATION opCode, 813 PMOS_COMMAND_BUFFER cmdBuffer, 814 uint32_t semaMemOffset = 0) 815 { 816 CODEC_HW_FUNCTION_ENTER; 817 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 818 819 CODEC_HW_CHK_NULL_RETURN(m_miItf); 820 auto ¶ms = m_miItf->MHW_GETPAR_F(MI_SEMAPHORE_WAIT)(); 821 params = {}; 822 params.presSemaphoreMem = semaMem; 823 params.bPollingWaitMode = true; 824 params.dwSemaphoreData = semaData; 825 params.CompareOperation = (mhw::mi::MHW_COMMON_MI_SEMAPHORE_COMPARE_OPERATION) opCode; 826 params.dwResourceOffset = semaMemOffset; 827 eStatus = m_miItf->MHW_ADDCMD_F(MI_SEMAPHORE_WAIT)(cmdBuffer); 828 829 return eStatus; 830 } 831 832 //! 833 //! \brief Check if simulation/emulation is active 834 //! \return bool 835 //! True if simulation/emulation is active, else false. 836 //! IsSimActive()837 bool IsSimActive() 838 { 839 return m_osInterface ? m_osInterface->bSimIsActive : false; 840 } 841 842 //! 843 //! \brief Send mi store data imm cmd 844 //! \param [in] resource 845 //! Reource used in mi store data imm cmd 846 //! \param [in] immData 847 //! Immediate data 848 //! \param [in,out] cmdBuffer 849 //! command buffer 850 //! 851 //! \return MOS_STATUS 852 //! MOS_STATUS_SUCCESS if success, else fail reason 853 //! SendMiStoreDataImm(PMOS_RESOURCE resource,uint32_t immData,PMOS_COMMAND_BUFFER cmdBuffer)854 MOS_STATUS SendMiStoreDataImm( 855 PMOS_RESOURCE resource, 856 uint32_t immData, 857 PMOS_COMMAND_BUFFER cmdBuffer) 858 { 859 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 860 861 CODEC_HW_FUNCTION_ENTER; 862 863 CODEC_HW_CHK_NULL_RETURN(resource); 864 CODEC_HW_CHK_NULL_RETURN(cmdBuffer); 865 866 CODEC_HW_CHK_NULL_RETURN(m_miItf); 867 auto ¶ms = m_miItf->MHW_GETPAR_F(MI_STORE_DATA_IMM)(); 868 params = {}; 869 params.pOsResource = resource; 870 params.dwResourceOffset = 0; 871 params.dwValue = immData; 872 eStatus = m_miItf->MHW_ADDCMD_F(MI_STORE_DATA_IMM)(cmdBuffer); 873 874 return eStatus; 875 } 876 877 // Hardware dependent parameters 878 bool m_turboMode = false; //!> Turbo mode info to pass in cmdBuf 879 bool m_isVdencSuperSliceEnabled = false; //!> Flag indicating Vdenc super slice is enabled 880 uint16_t m_sizeOfCmdBatchBufferEnd = 0; //!> Size of batch buffer end cmd 881 uint16_t m_sizeOfCmdMediaReset = 0; //!> Size of media reset cmd 882 uint32_t m_vdencBrcImgStateBufferSize = 0; //!> vdenc brc img state buffer size 883 uint32_t m_vdencBatchBuffer1stGroupSize = 0; //!> vdenc batch buffer 1st group size 884 uint32_t m_vdencBatchBuffer2ndGroupSize = 0; //!> vdenc batch buffer 2nd group size 885 uint32_t m_vdencReadBatchBufferSize = 0; //!> vdenc read batch buffer size for group1 and group2 886 uint32_t m_vdenc2ndLevelBatchBufferSize = 0; //!> vdenc 2nd level batch buffer size 887 uint32_t m_vdencBatchBufferPerSliceConstSize = 0; //!> vdenc batch buffer per slice const size 888 uint32_t m_HucStitchCmdBatchBufferSize = 0; //!> huc stitch cmd 2nd level batch buffer size 889 uint32_t m_pakIntTileStatsSize = 0; //!> Size of combined statistics across all tiles 890 uint32_t m_pakIntAggregatedFrameStatsSize = 0; //!> Size of HEVC/ VP9 PAK Stats, HEVC Slice Streamout, VDEnc Stats 891 uint32_t m_tileRecordSize = 0; //!> Tile record size 892 uint32_t m_hucCommandBufferSize = 0; //!> Size of a single HuC command buffer 893 894 // Slice/Sub-slice/EU Shutdown Parameters 895 uint32_t m_numRequestedEuSlices = 0; //!> Number of requested Slices 896 uint32_t m_numRequestedSubSlices = 0; //!> Number of requested Sub-slices 897 uint32_t m_numRequestedEus = 0; //!> Number of requested EUs 898 bool m_enableCodecMmc = false; //!> Flag to indicate if enable codec MMC by default or not 899 900 //! \brief default disable the get vdbox node by UMD, decided by MHW and MOS 901 bool m_getVdboxNodeByUMD = false; 902 903 void *legacyHwInterface = nullptr; 904 905 protected: 906 907 #if (_DEBUG || _RELEASE_INTERNAL) 908 MOS_STATUS InitL3ControlUserFeatureSettings( 909 mhw::render::MHW_RENDER_ENGINE_L3_CACHE_CONFIG *l3CacheConfig, 910 mhw::render::MHW_RENDER_ENGINE_L3_CACHE_SETTINGS *l3Overrides); 911 #endif 912 913 //! 914 //! \brief Send conditional batch buffer end cmd 915 //! \details Send conditional batch buffer end cmd 916 //! 917 //! \param [in] resource 918 //! Reource used in conditional batch buffer end cmd 919 //! \param [in] offset 920 //! Reource offset used in mi atomic dword cmd 921 //! \param [in] compData 922 //! Compare data 923 //! \param [in] disableCompMask 924 //! Indicate disabling compare mask 925 //! \param [in,out] cmdBuffer 926 //! command buffer 927 //! 928 //! \return MOS_STATUS 929 //! MOS_STATUS_SUCCESS if success, else fail reason 930 //! SendCondBbEndCmd(PMOS_RESOURCE resource,uint32_t offset,uint32_t compData,bool disableCompMask,PMOS_COMMAND_BUFFER cmdBuffer)931 MOS_STATUS SendCondBbEndCmd( 932 PMOS_RESOURCE resource, 933 uint32_t offset, 934 uint32_t compData, 935 bool disableCompMask, 936 PMOS_COMMAND_BUFFER cmdBuffer) 937 { 938 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 939 940 CODEC_HW_FUNCTION_ENTER; 941 942 if (!Mos_ResourceIsNull(&m_conditionalBbEndDummy)) 943 { 944 auto &miFlushDwParams = m_miItf->MHW_GETPAR_F(MI_FLUSH_DW)(); 945 miFlushDwParams = {}; 946 miFlushDwParams.postSyncOperation = 1; 947 miFlushDwParams.pOsResource = &m_conditionalBbEndDummy; 948 miFlushDwParams.dwDataDW1 = 0; 949 CODEC_HW_CHK_STATUS_RETURN(m_miItf->MHW_ADDCMD_F(MI_FLUSH_DW)(cmdBuffer)); 950 } 951 952 auto &miConditionalBatchBufferEndParams = m_miItf->MHW_GETPAR_F(MI_CONDITIONAL_BATCH_BUFFER_END)(); 953 miConditionalBatchBufferEndParams = {}; 954 miConditionalBatchBufferEndParams.presSemaphoreBuffer = resource; 955 miConditionalBatchBufferEndParams.dwOffset = offset; 956 miConditionalBatchBufferEndParams.dwValue = compData; 957 miConditionalBatchBufferEndParams.bDisableCompareMask = disableCompMask; 958 CODEC_HW_CHK_STATUS_RETURN(m_miItf->MHW_ADDCMD_F(MI_CONDITIONAL_BATCH_BUFFER_END)(cmdBuffer)); 959 960 return eStatus; 961 } 962 ResizeCommandBufferAndPatchListCmd(uint32_t requestedCommandBufferSize,uint32_t requestedPatchListSize)963 MOS_STATUS ResizeCommandBufferAndPatchListCmd( 964 uint32_t requestedCommandBufferSize, 965 uint32_t requestedPatchListSize) 966 { 967 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 968 969 CODEC_HW_FUNCTION_ENTER; 970 971 CODEC_HW_CHK_NULL_RETURN(m_miItf); 972 973 MOS_COMMAND_BUFFER cmdBuffer; 974 975 CODEC_HW_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0)); 976 CODEC_HW_CHK_STATUS_RETURN(m_miItf->MHW_ADDCMD_F(MI_NOOP)(&cmdBuffer, nullptr)); 977 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0); 978 CODEC_HW_CHK_STATUS_RETURN(m_osInterface->pfnResizeCommandBufferAndPatchList(m_osInterface, requestedCommandBufferSize, requestedPatchListSize, 0)); 979 980 return eStatus; 981 } 982 ResizeCommandBufferAndPatchListOs(uint32_t requestedCommandBufferSize,uint32_t requestedPatchListSize)983 MOS_STATUS ResizeCommandBufferAndPatchListOs( 984 uint32_t requestedCommandBufferSize, 985 uint32_t requestedPatchListSize) 986 { 987 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 988 989 CODEC_HW_CHK_STATUS_RETURN(m_osInterface->pfnResizeCommandBufferAndPatchList(m_osInterface, requestedCommandBufferSize, requestedPatchListSize, 0)); 990 991 return eStatus; 992 } 993 994 protected: 995 std::shared_ptr<mhw::vdbox::avp::Itf> m_avpItf = nullptr; //!< Pointer to Mhw avp interface 996 std::shared_ptr<mhw::vdbox::vdenc::Itf> m_vdencItf = nullptr; //!< Pointer to Mhw vdenc interface 997 std::shared_ptr<mhw::vdbox::huc::Itf> m_hucItf = nullptr; //!< Pointer to Mhw huc interface 998 std::shared_ptr<mhw::mi::Itf> m_miItf = nullptr; //!< Pointer to Mhw mi interface 999 std::shared_ptr<mhw::vdbox::hcp::Itf> m_hcpItf = nullptr; //!< Pointer to Mhw hcp interface 1000 std::shared_ptr<mhw::vdbox::mfx::Itf> m_mfxItf = nullptr; //!< Pointer to Mhw mfx interface 1001 std::shared_ptr<mhw::render::Itf> m_renderItf = nullptr; //!< Pointer to render interface 1002 std::shared_ptr<MediaSfcInterface> m_mediaSfcItf = nullptr; //!< Pointer to Media sfc interface 1003 std::shared_ptr<mhw::vdbox::vvcp::Itf> m_vvcpItf = nullptr; 1004 // States 1005 PMOS_INTERFACE m_osInterface; //!< Pointer to OS interface 1006 1007 MediaUserSettingSharedPtr m_userSettingPtr = nullptr; 1008 1009 // Auxiliary 1010 PLATFORM m_platform; //!< Platform information 1011 1012 MHW_STATE_HEAP_SETTINGS m_stateHeapSettings; //!< State heap Mhw settings 1013 MhwCpInterface *m_cpInterface = nullptr; //!< Pointer to Mhw cp interface 1014 RENDERHAL_INTERFACE *m_renderHal = nullptr; //!< RenderHal interface 1015 MhwCpInterface *m_renderHalCpInterface = nullptr; //!< Pointer to RenderHal cp interface 1016 MhwVeboxInterface *m_veboxInterface = nullptr; //!< Pointer to Mhw vebox interface 1017 MhwSfcInterface *m_sfcInterface = nullptr; //!< Pointer to Mhw sfc interface 1018 MHW_MEMORY_OBJECT_CONTROL_PARAMS m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_END_CODEC]; //!< Cacheability Settings list 1019 bool m_disableScalability = false; //!> Flag to indicate if disable scalability by default 1020 CODECHAL_SSEU_SETTING const *m_ssEuTable = nullptr; //!< Pointer to the default SSEU settings table 1021 uint16_t m_numMediaStates = CODECHAL_NUM_MEDIA_STATES; //!< number of media states 1022 uint32_t m_maxKernelLoadCmdSize = 0; //!> Max kernel load cmd size 1023 #if (_DEBUG || _RELEASE_INTERNAL) 1024 bool m_numRequestedOverride = false; //!> Flag to indicate whether these params are set by Reg 1025 uint32_t m_numRequestedEuSlicesOverride = 0; //!> Number of requested Slices set by Reg 1026 uint32_t m_numRequestedSubSlicesOverride = 0; //!> Number of requested Sub-slices set by Reg 1027 uint32_t m_numRequestedEusOverride = 0; //!> Number of requested EUs set by Reg 1028 #endif 1029 1030 uint32_t m_sizeOfCmdMediaObject = 0; //!> Size of media object cmd 1031 uint32_t m_sizeOfCmdMediaStateFlush = 0; //!> Size of media state flush cmd 1032 // COND BBE WA 1033 MOS_RESOURCE m_conditionalBbEndDummy; //!> Dummy Resource for conditional batch buffer end WA 1034 1035 1036 // Auxiliary 1037 MEDIA_FEATURE_TABLE *m_skuTable = nullptr; //!< Pointer to SKU table 1038 MEDIA_WA_TABLE *m_waTable = nullptr; //!< Pointer to WA table 1039 1040 // HuC WA implementation 1041 MOS_RESOURCE m_dummyStreamIn; //!> Resource of dummy stream in 1042 MOS_RESOURCE m_dummyStreamOut; //!> Resource of dummy stream out 1043 MOS_RESOURCE m_hucDmemDummy; //!> Resource of Huc DMEM for dummy streamout WA 1044 uint32_t m_dmemBufSize = 0; //!> 1045 1046 bool m_checkBankCount = false; //!> Used to check L3 cache enable 1047 1048 MEDIA_CLASS_DEFINE_END(CodechalHwInterfaceNext) 1049 }; 1050 1051 #endif // __CODEC_HW_NEXT_H__ 1052