1 /* 2 * Copyright (c) 2011-2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_encode_avc_g9.h 24 //! \brief This file defines the C++ class/interface for Gen9 platform's AVC 25 //! DualPipe encoding to be used across CODECHAL components. 26 //! 27 28 #ifndef __CODECHAL_ENCODE_AVC_G9_H__ 29 #define __CODECHAL_ENCODE_AVC_G9_H__ 30 31 #include "codechal_encode_avc.h" 32 33 #define CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_G9 32 34 #define CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_RESERVED_G9 32 35 #define CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_1_G9 32 36 #define CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_1_RESERVED_G9 160 37 38 #define CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_INTRACOST_SCALING_FACTOR_G9 64 39 #define CODECHAL_ENCODE_AVC_BRC_HISTORY_BUFFER_SIZE_G9 864 40 41 #define CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_WIDTH_G9 64 42 #define CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_HEIGHT_G9 44 43 44 #define CODECHAL_ENCODE_AVC_MFE_MBENC_KERNEL_IDX 27 45 46 #define CODECHAL_ENCODE_AVC_ADAPTIVE_TX_DECISION_THRESHOLD_G9 128 47 #define CODECHAL_ENCODE_AVC_MB_TEXTURE_THRESHOLD_G9 1024 48 #define CODECHAL_ENCODE_AVC_SFD_COST_TABLE_BUFFER_SIZE_G9 52 49 50 // Unified curbe size for both legacy and fei. 51 #define CODECHAL_ENCODE_AVC_MBENC_CURBE_SIZE_IN_DWORD_G9 104 52 53 #define CODECHAL_ENCODE_AVC_MFE_MAX_FRAMES_G9 4 54 55 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_ME_CM_G9 56 { 57 CODECHAL_ENCODE_AVC_ME_MV_DATA_SURFACE_CM_G9 = 0, 58 CODECHAL_ENCODE_AVC_16xME_MV_DATA_SURFACE_CM_G9 = 1, 59 CODECHAL_ENCODE_AVC_32xME_MV_DATA_SURFACE_CM_G9 = 1, 60 CODECHAL_ENCODE_AVC_ME_DISTORTION_SURFACE_CM_G9 = 2, 61 CODECHAL_ENCODE_AVC_ME_BRC_DISTORTION_CM_G9 = 3, 62 CODECHAL_ENCODE_AVC_ME_RESERVED0_CM_G9 = 4, 63 CODECHAL_ENCODE_AVC_ME_CURR_FOR_FWD_REF_CM_G9 = 5, 64 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX0_CM_G9 = 6, 65 CODECHAL_ENCODE_AVC_ME_RESERVED1_CM_G9 = 7, 66 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX1_CM_G9 = 8, 67 CODECHAL_ENCODE_AVC_ME_RESERVED2_CM_G9 = 9, 68 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX2_CM_G9 = 10, 69 CODECHAL_ENCODE_AVC_ME_RESERVED3_CM_G9 = 11, 70 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX3_CM_G9 = 12, 71 CODECHAL_ENCODE_AVC_ME_RESERVED4_CM_G9 = 13, 72 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX4_CM_G9 = 14, 73 CODECHAL_ENCODE_AVC_ME_RESERVED5_CM_G9 = 15, 74 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX5_CM_G9 = 16, 75 CODECHAL_ENCODE_AVC_ME_RESERVED6_CM_G9 = 17, 76 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX6_CM_G9 = 18, 77 CODECHAL_ENCODE_AVC_ME_RESERVED7_CM_G9 = 19, 78 CODECHAL_ENCODE_AVC_ME_FWD_REF_IDX7_CM_G9 = 20, 79 CODECHAL_ENCODE_AVC_ME_RESERVED8_CM_G9 = 21, 80 CODECHAL_ENCODE_AVC_ME_CURR_FOR_BWD_REF_CM_G9 = 22, 81 CODECHAL_ENCODE_AVC_ME_BWD_REF_IDX0_CM_G9 = 23, 82 CODECHAL_ENCODE_AVC_ME_RESERVED9_CM_G9 = 24, 83 CODECHAL_ENCODE_AVC_ME_BWD_REF_IDX1_CM_G9 = 25, 84 CODECHAL_ENCODE_AVC_ME_VDENC_STREAMIN_CM_G9 = 26, 85 CODECHAL_ENCODE_AVC_ME_NUM_SURFACES_CM_G9 = 27 86 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_ME_CM_G9; 87 88 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_MBENC_G9 89 { 90 CODECHAL_ENCODE_AVC_MBENC_MFC_AVC_PAK_OBJ_G9 = 0, 91 CODECHAL_ENCODE_AVC_MBENC_IND_MV_DATA_G9 = 1, 92 CODECHAL_ENCODE_AVC_MBENC_BRC_DISTORTION_G9 = 2, // For BRC distortion for I 93 CODECHAL_ENCODE_AVC_MBENC_CURR_Y_G9 = 3, 94 CODECHAL_ENCODE_AVC_MBENC_CURR_UV_G9 = 4, 95 CODECHAL_ENCODE_AVC_MBENC_MB_SPECIFIC_DATA_G9 = 5, 96 CODECHAL_ENCODE_AVC_MBENC_AUX_VME_OUT_G9 = 6, 97 CODECHAL_ENCODE_AVC_MBENC_REFPICSELECT_L0_G9 = 7, 98 CODECHAL_ENCODE_AVC_MBENC_MV_DATA_FROM_ME_G9 = 8, 99 CODECHAL_ENCODE_AVC_MBENC_4xME_DISTORTION_G9 = 9, 100 CODECHAL_ENCODE_AVC_MBENC_SLICEMAP_DATA_G9 = 10, 101 CODECHAL_ENCODE_AVC_MBENC_FWD_MB_DATA_G9 = 11, 102 CODECHAL_ENCODE_AVC_MBENC_FWD_MV_DATA_G9 = 12, 103 CODECHAL_ENCODE_AVC_MBENC_MBQP_G9 = 13, 104 CODECHAL_ENCODE_AVC_MBENC_MBBRC_CONST_DATA_G9 = 14, 105 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_G9 = 15, 106 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX0_G9 = 16, 107 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_G9 = 17, 108 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX1_G9 = 18, 109 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_G9 = 19, 110 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX2_G9 = 20, 111 CODECHAL_ENCODE_AVC_MBENC_RESERVED0_G9 = 21, 112 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX3_G9 = 22, 113 CODECHAL_ENCODE_AVC_MBENC_RESERVED1_G9 = 23, 114 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX4_G9 = 24, 115 CODECHAL_ENCODE_AVC_MBENC_RESERVED2_G9 = 25, 116 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX5_G9 = 26, 117 CODECHAL_ENCODE_AVC_MBENC_RESERVED3_G9 = 27, 118 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX6_G9 = 28, 119 CODECHAL_ENCODE_AVC_MBENC_RESERVED4_G9 = 29, 120 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX7_G9 = 30, 121 CODECHAL_ENCODE_AVC_MBENC_RESERVED5_G9 = 31, 122 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_G9 = 32, 123 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_G9 = 33, 124 CODECHAL_ENCODE_AVC_MBENC_RESERVED6_G9 = 34, 125 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_G9 = 35, 126 CODECHAL_ENCODE_AVC_MBENC_RESERVED7_G9 = 36, 127 CODECHAL_ENCODE_AVC_MBENC_MB_STATS_G9 = 37, 128 CODECHAL_ENCODE_AVC_MBENC_MAD_DATA_G9 = 38, 129 CODECHAL_ENCODE_AVC_MBENC_FORCE_NONSKIP_MB_MAP_G9 = 39, 130 CODECHAL_ENCODE_AVC_MBENC_ADV_WA_G9 = 40, 131 CODECHAL_ENCODE_AVC_MBENC_BRC_CURBE_DATA_G9 = 41, 132 CODECHAL_ENCODE_AVC_MBENC_SFD_COST_TABLE_G9 = 42, 133 CODECHAL_ENCODE_AVC_MBENC_MV_PREDICTOR_G9 = 43, 134 CODECHAL_ENCODE_AVC_MBENC_NUM_SURFACES_G9 = 44 135 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_MBENC_G9; 136 137 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_FRAME_BRC_UPDATE_G9 138 { 139 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_HISTORY_G9 = 0, 140 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G9 = 1, 141 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_READ_G9 = 2, 142 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_WRITE_G9 = 3, 143 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_MBENC_CURBE_READ_G9 = 4, 144 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_MBENC_CURBE_WRITE_G9 = 5, 145 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_DISTORTION_G9 = 6, 146 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CONSTANT_DATA_G9 = 7, 147 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_MB_STAT_G9 = 8, 148 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_NUM_SURFACES_G9 = 9 149 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_FRAME_BRC_UPDATE_G9; 150 151 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_MB_BRC_UPDATE_G9 152 { 153 CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_HISTORY_G9 = 0, 154 CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_MB_QP_G9 = 1, 155 CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_ROI_G9 = 2, 156 CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_MB_STAT_G9 = 3, 157 CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_NUM_SURFACES_G9 = 4 158 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_MB_BRC_UPDATE_G9; 159 160 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_WP_G9 161 { 162 CODECHAL_ENCODE_AVC_WP_INPUT_REF_SURFACE_G9 = 0, 163 CODECHAL_ENCODE_AVC_WP_OUTPUT_SCALED_SURFACE_G9 = 1, 164 CODECHAL_ENCODE_AVC_WP_NUM_SURFACES_G9 = 2 165 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_WP_G9; 166 167 typedef struct _CODECHAL_ENCODE_AVC_ME_CURBE_CM_G9 168 { 169 // DW0 170 union 171 { 172 struct 173 { 174 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 ); 175 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 ); 176 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 ); 177 uint32_t : MOS_BITFIELD_RANGE( 3, 4 ); 178 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 ); 179 uint32_t : MOS_BITFIELD_BIT( 6 ); 180 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 ); 181 uint32_t : MOS_BITFIELD_RANGE( 8,23 ); 182 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 ); 183 }; 184 struct 185 { 186 uint32_t Value; 187 }; 188 } DW0; 189 190 // DW1 191 union 192 { 193 struct 194 { 195 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 ); 196 uint32_t : MOS_BITFIELD_RANGE( 6,15 ); 197 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 ); 198 uint32_t : MOS_BITFIELD_RANGE( 22,27 ); 199 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 ); 200 uint32_t : MOS_BITFIELD_RANGE( 29,31 ); 201 }; 202 struct 203 { 204 uint32_t Value; 205 }; 206 } DW1; 207 208 // DW2 209 union 210 { 211 struct 212 { 213 uint32_t MaxLenSP : MOS_BITFIELD_RANGE(0, 7); 214 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 ); 215 uint32_t : MOS_BITFIELD_RANGE(16, 31); 216 }; 217 struct 218 { 219 uint32_t Value; 220 }; 221 } DW2; 222 223 // DW3 224 union 225 { 226 struct 227 { 228 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 ); 229 uint32_t : MOS_BITFIELD_RANGE( 2, 3 ); 230 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 ); 231 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 ); 232 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 ); 233 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 ); 234 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 ); 235 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 ); 236 uint32_t SkipType : MOS_BITFIELD_BIT( 14 ); 237 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 ); 238 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 ); 239 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 ); 240 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 ); 241 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 ); 242 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 ); 243 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 ); 244 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 ); 245 uint32_t : MOS_BITFIELD_BIT( 31 ); 246 }; 247 struct 248 { 249 uint32_t Value; 250 }; 251 } DW3; 252 253 // DW4 254 union 255 { 256 struct 257 { 258 uint32_t : MOS_BITFIELD_RANGE(0, 7); 259 uint32_t PictureHeightMinus1 : MOS_BITFIELD_RANGE(8, 15); 260 uint32_t PictureWidth : MOS_BITFIELD_RANGE(16, 23); 261 uint32_t : MOS_BITFIELD_RANGE(24, 31); 262 }; 263 struct 264 { 265 uint32_t Value; 266 }; 267 } DW4; 268 269 // DW5 270 union 271 { 272 struct 273 { 274 uint32_t : MOS_BITFIELD_RANGE(0, 7); 275 uint32_t QpPrimeY : MOS_BITFIELD_RANGE(8, 15); 276 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 ); 277 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 ); 278 }; 279 struct 280 { 281 uint32_t Value; 282 }; 283 } DW5; 284 285 // DW6 286 union 287 { 288 struct 289 { 290 uint32_t : MOS_BITFIELD_RANGE(0, 2); 291 uint32_t WriteDistortions : MOS_BITFIELD_BIT(3); 292 uint32_t UseMvFromPrevStep : MOS_BITFIELD_BIT(4); 293 uint32_t : MOS_BITFIELD_RANGE(5, 7); 294 uint32_t SuperCombineDist : MOS_BITFIELD_RANGE(8, 15); 295 uint32_t MaxVmvR : MOS_BITFIELD_RANGE(16, 31); 296 }; 297 struct 298 { 299 uint32_t Value; 300 }; 301 } DW6; 302 303 // DW7 304 union 305 { 306 struct 307 { 308 uint32_t : MOS_BITFIELD_RANGE(0, 15); 309 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 ); 310 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 ); 311 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 ); 312 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 ); 313 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 ); 314 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 ); 315 uint32_t : MOS_BITFIELD_BIT( 23 ); 316 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 ); 317 }; 318 struct 319 { 320 uint32_t Value; 321 }; 322 } DW7; 323 324 // DW8 325 union 326 { 327 struct 328 { 329 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 330 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 ); 331 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 ); 332 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 ); 333 }; 334 struct 335 { 336 uint32_t Value; 337 }; 338 } DW8; 339 340 // DW9 341 union 342 { 343 struct 344 { 345 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 346 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 ); 347 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 ); 348 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 ); 349 }; 350 struct 351 { 352 uint32_t Value; 353 }; 354 } DW9; 355 356 // DW10 357 union 358 { 359 struct 360 { 361 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 ); 362 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 ); 363 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 ); 364 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 ); 365 }; 366 struct 367 { 368 uint32_t Value; 369 }; 370 } DW10; 371 372 // DW11 373 union 374 { 375 struct 376 { 377 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 378 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 ); 379 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 ); 380 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 ); 381 }; 382 struct 383 { 384 uint32_t Value; 385 }; 386 } DW11; 387 388 // DW12 389 union 390 { 391 struct 392 { 393 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 394 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 ); 395 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 ); 396 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 ); 397 }; 398 struct 399 { 400 uint32_t Value; 401 }; 402 } DW12; 403 404 // DW13 405 union 406 { 407 struct 408 { 409 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE(0, 7); 410 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE(8, 15); 411 uint32_t RefStreaminCost : MOS_BITFIELD_RANGE(16, 23); 412 uint32_t ROIEnable : MOS_BITFIELD_RANGE(24, 26); 413 uint32_t : MOS_BITFIELD_RANGE(27, 31); 414 }; 415 struct 416 { 417 uint32_t Value; 418 }; 419 } DW13; 420 421 // DW14 422 union 423 { 424 struct 425 { 426 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT(0); 427 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT(1); 428 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT(2); 429 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT(3); 430 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT(4); 431 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT(5); 432 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT(6); 433 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT(7); 434 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT(8); 435 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT(9); 436 uint32_t : MOS_BITFIELD_RANGE(10, 31); 437 }; 438 struct 439 { 440 uint32_t Value; 441 }; 442 } DW14; 443 444 // DW15 445 union 446 { 447 struct 448 { 449 uint32_t PrevMvReadPosFactor : MOS_BITFIELD_RANGE(0, 7); 450 uint32_t MvShiftFactor : MOS_BITFIELD_RANGE(8, 15); 451 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 31); 452 }; 453 struct 454 { 455 uint32_t Value; 456 }; 457 } DW15; 458 459 // DW16 460 union 461 { 462 struct 463 { 464 SearchPathDelta SPDelta_0; 465 SearchPathDelta SPDelta_1; 466 SearchPathDelta SPDelta_2; 467 SearchPathDelta SPDelta_3; 468 }; 469 struct 470 { 471 uint32_t Value; 472 }; 473 } DW16; 474 475 // DW17 476 union 477 { 478 struct 479 { 480 SearchPathDelta SPDelta_4; 481 SearchPathDelta SPDelta_5; 482 SearchPathDelta SPDelta_6; 483 SearchPathDelta SPDelta_7; 484 }; 485 struct 486 { 487 uint32_t Value; 488 }; 489 } DW17; 490 491 // DW18 492 union 493 { 494 struct 495 { 496 SearchPathDelta SPDelta_8; 497 SearchPathDelta SPDelta_9; 498 SearchPathDelta SPDelta_10; 499 SearchPathDelta SPDelta_11; 500 }; 501 struct 502 { 503 uint32_t Value; 504 }; 505 } DW18; 506 507 // DW19 508 union 509 { 510 struct 511 { 512 SearchPathDelta SPDelta_12; 513 SearchPathDelta SPDelta_13; 514 SearchPathDelta SPDelta_14; 515 SearchPathDelta SPDelta_15; 516 }; 517 struct 518 { 519 uint32_t Value; 520 }; 521 } DW19; 522 523 // DW20 524 union 525 { 526 struct 527 { 528 SearchPathDelta SPDelta_16; 529 SearchPathDelta SPDelta_17; 530 SearchPathDelta SPDelta_18; 531 SearchPathDelta SPDelta_19; 532 }; 533 struct 534 { 535 uint32_t Value; 536 }; 537 } DW20; 538 539 // DW21 540 union 541 { 542 struct 543 { 544 SearchPathDelta SPDelta_20; 545 SearchPathDelta SPDelta_21; 546 SearchPathDelta SPDelta_22; 547 SearchPathDelta SPDelta_23; 548 }; 549 struct 550 { 551 uint32_t Value; 552 }; 553 } DW21; 554 555 // DW22 556 union 557 { 558 struct 559 { 560 SearchPathDelta SPDelta_24; 561 SearchPathDelta SPDelta_25; 562 SearchPathDelta SPDelta_26; 563 SearchPathDelta SPDelta_27; 564 }; 565 struct 566 { 567 uint32_t Value; 568 }; 569 } DW22; 570 571 // DW23 572 union 573 { 574 struct 575 { 576 SearchPathDelta SPDelta_28; 577 SearchPathDelta SPDelta_29; 578 SearchPathDelta SPDelta_30; 579 SearchPathDelta SPDelta_31; 580 }; 581 struct 582 { 583 uint32_t Value; 584 }; 585 } DW23; 586 587 // DW24 588 union 589 { 590 struct 591 { 592 SearchPathDelta SPDelta_32; 593 SearchPathDelta SPDelta_33; 594 SearchPathDelta SPDelta_34; 595 SearchPathDelta SPDelta_35; 596 }; 597 struct 598 { 599 uint32_t Value; 600 }; 601 } DW24; 602 603 // DW25 604 union 605 { 606 struct 607 { 608 SearchPathDelta SPDelta_36; 609 SearchPathDelta SPDelta_37; 610 SearchPathDelta SPDelta_38; 611 SearchPathDelta SPDelta_39; 612 }; 613 struct 614 { 615 uint32_t Value; 616 }; 617 } DW25; 618 619 // DW26 620 union 621 { 622 struct 623 { 624 SearchPathDelta SPDelta_40; 625 SearchPathDelta SPDelta_41; 626 SearchPathDelta SPDelta_42; 627 SearchPathDelta SPDelta_43; 628 }; 629 struct 630 { 631 uint32_t Value; 632 }; 633 } DW26; 634 635 // DW27 636 union 637 { 638 struct 639 { 640 SearchPathDelta SPDelta_44; 641 SearchPathDelta SPDelta_45; 642 SearchPathDelta SPDelta_46; 643 SearchPathDelta SPDelta_47; 644 }; 645 struct 646 { 647 uint32_t Value; 648 }; 649 } DW27; 650 651 // DW28 652 union 653 { 654 struct 655 { 656 SearchPathDelta SPDelta_48; 657 SearchPathDelta SPDelta_49; 658 SearchPathDelta SPDelta_50; 659 SearchPathDelta SPDelta_51; 660 }; 661 struct 662 { 663 uint32_t Value; 664 }; 665 } DW28; 666 667 // DW29 668 union 669 { 670 struct 671 { 672 SearchPathDelta SPDelta_52; 673 SearchPathDelta SPDelta_53; 674 SearchPathDelta SPDelta_54; 675 SearchPathDelta SPDelta_55; 676 }; 677 struct 678 { 679 uint32_t Value; 680 }; 681 } DW29; 682 683 // DW30 684 union 685 { 686 struct 687 { 688 uint32_t ActualMBWidth : MOS_BITFIELD_RANGE(0, 15); 689 uint32_t ActualMBHeight : MOS_BITFIELD_RANGE(16, 31); 690 }; 691 struct 692 { 693 uint32_t Value; 694 }; 695 } DW30; 696 697 // DW31 698 union 699 { 700 struct 701 { 702 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 703 }; 704 struct 705 { 706 uint32_t Value; 707 }; 708 } DW31; 709 710 // DW32 711 union 712 { 713 struct 714 { 715 uint32_t _4xMeMvOutputDataSurfIndex : MOS_BITFIELD_RANGE(0, 31); 716 }; 717 struct 718 { 719 uint32_t Value; 720 }; 721 } DW32; 722 723 // DW33 724 union 725 { 726 struct 727 { 728 uint32_t _16xOr32xMeMvInputDataSurfIndex : MOS_BITFIELD_RANGE(0, 31); 729 }; 730 struct 731 { 732 uint32_t Value; 733 }; 734 } DW33; 735 736 // DW34 737 union 738 { 739 struct 740 { 741 uint32_t _4xMeOutputDistSurfIndex : MOS_BITFIELD_RANGE(0, 31); 742 }; 743 struct 744 { 745 uint32_t Value; 746 }; 747 } DW34; 748 749 // DW35 750 union 751 { 752 struct 753 { 754 uint32_t _4xMeOutputBrcDistSurfIndex : MOS_BITFIELD_RANGE(0, 31); 755 }; 756 struct 757 { 758 uint32_t Value; 759 }; 760 } DW35; 761 762 // DW36 763 union 764 { 765 struct 766 { 767 uint32_t VMEFwdInterPredictionSurfIndex : MOS_BITFIELD_RANGE(0, 31); 768 }; 769 struct 770 { 771 uint32_t Value; 772 }; 773 } DW36; 774 775 // DW37 776 union 777 { 778 struct 779 { 780 uint32_t VMEBwdInterPredictionSurfIndex : MOS_BITFIELD_RANGE(0, 31); 781 }; 782 struct 783 { 784 uint32_t Value; 785 }; 786 } DW37; 787 788 // DW38 789 union 790 { 791 struct 792 { 793 uint32_t VDEncStreamInSurfIndex : MOS_BITFIELD_RANGE(0, 31); 794 }; 795 struct 796 { 797 uint32_t Value; 798 }; 799 } DW38; 800 801 } CODECHAL_ENCODE_AVC_ME_CURBE_CM_G9, *PCODECHAL_ENCODE_AVC_ME_CURBE_CM_G9; 802 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_ME_CURBE_CM_G9)) == 39); 803 804 typedef struct _CODECHAL_ENCODE_AVC_MBENC_CURBE_G9_COMMON 805 { 806 // DW0 807 union 808 { 809 struct 810 { 811 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 ); 812 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 ); 813 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 ); 814 uint32_t : MOS_BITFIELD_RANGE( 3, 4 ); 815 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 ); 816 uint32_t : MOS_BITFIELD_BIT( 6 ); 817 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 ); 818 uint32_t : MOS_BITFIELD_RANGE( 8,23 ); 819 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 ); 820 }; 821 struct 822 { 823 uint32_t Value; 824 }; 825 } DW0; 826 827 // DW1 828 union 829 { 830 struct 831 { 832 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 ); 833 uint32_t : MOS_BITFIELD_RANGE( 6,15 ); 834 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 ); 835 uint32_t : MOS_BITFIELD_RANGE( 22,27 ); 836 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 ); 837 uint32_t : MOS_BITFIELD_RANGE( 29,31 ); 838 }; 839 struct 840 { 841 uint32_t Value; 842 }; 843 } DW1; 844 845 // DW2 846 union 847 { 848 struct 849 { 850 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 ); 851 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 ); 852 uint32_t PicWidth : MOS_BITFIELD_RANGE( 16,31 ); 853 }; 854 struct 855 { 856 uint32_t Value; 857 }; 858 } DW2; 859 860 // DW3 861 union 862 { 863 struct 864 { 865 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 ); 866 uint32_t : MOS_BITFIELD_RANGE( 2, 3 ); 867 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 ); 868 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 ); 869 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 ); 870 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 ); 871 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 ); 872 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 ); 873 uint32_t SkipType : MOS_BITFIELD_BIT( 14 ); 874 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 ); 875 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 ); 876 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 ); 877 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 ); 878 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 ); 879 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 ); 880 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 ); 881 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 ); 882 uint32_t : MOS_BITFIELD_BIT( 31 ); 883 }; 884 struct 885 { 886 uint32_t Value; 887 }; 888 } DW3; 889 890 // DW4 891 union 892 { 893 struct 894 { 895 uint32_t PicHeightMinus1 : MOS_BITFIELD_RANGE( 0,15 ); 896 uint32_t MvRestrictionInSliceEnable : MOS_BITFIELD_BIT( 16 ); 897 uint32_t DeltaMvEnable : MOS_BITFIELD_BIT( 17 ); 898 uint32_t TrueDistortionEnable : MOS_BITFIELD_BIT( 18 ); 899 uint32_t EnableWavefrontOptimization : MOS_BITFIELD_BIT( 19 ); 900 uint32_t EnableFBRBypass : MOS_BITFIELD_BIT( 20 ); 901 uint32_t EnableIntraCostScalingForStaticFrame: MOS_BITFIELD_BIT( 21 ); 902 uint32_t : MOS_BITFIELD_BIT( 22 ); 903 uint32_t Reserved : MOS_BITFIELD_BIT( 23 ); 904 uint32_t EnableDirtyRect : MOS_BITFIELD_BIT( 24 ); 905 uint32_t bCurFldIDR : MOS_BITFIELD_BIT( 25 ); 906 uint32_t ConstrainedIntraPredFlag : MOS_BITFIELD_BIT( 26 ); 907 uint32_t FieldParityFlag : MOS_BITFIELD_BIT( 27 ); 908 uint32_t HMEEnable : MOS_BITFIELD_BIT( 28 ); 909 uint32_t PictureType : MOS_BITFIELD_RANGE( 29,30 ); 910 uint32_t UseActualRefQPValue : MOS_BITFIELD_BIT( 31 ); 911 }; 912 struct 913 { 914 uint32_t Value; 915 }; 916 } DW4; 917 918 // DW5 919 union 920 { 921 struct 922 { 923 uint32_t SliceMbHeight : MOS_BITFIELD_RANGE( 0,15 ); 924 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 ); 925 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 ); 926 }; 927 struct 928 { 929 uint32_t Value; 930 }; 931 } DW5; 932 933 // DW6 934 union 935 { 936 struct 937 { 938 uint32_t BatchBufferEnd : MOS_BITFIELD_RANGE( 0,31 ); 939 }; 940 struct 941 { 942 uint32_t Value; 943 }; 944 } DW6; 945 946 // DW7 947 union 948 { 949 struct 950 { 951 uint32_t IntraPartMask : MOS_BITFIELD_RANGE( 0, 4 ); 952 uint32_t NonSkipZMvAdded : MOS_BITFIELD_BIT( 5 ); 953 uint32_t NonSkipModeAdded : MOS_BITFIELD_BIT( 6 ); 954 uint32_t LumaIntraSrcCornerSwap : MOS_BITFIELD_BIT( 7 ); 955 uint32_t : MOS_BITFIELD_RANGE( 8,15 ); 956 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 ); 957 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 ); 958 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 ); 959 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 ); 960 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 ); 961 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 ); 962 uint32_t : MOS_BITFIELD_BIT( 23 ); 963 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 ); 964 }; 965 struct 966 { 967 uint32_t Value; 968 }; 969 } DW7; 970 971 // DW8 972 union 973 { 974 struct 975 { 976 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 977 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 ); 978 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 ); 979 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 ); 980 }; 981 struct 982 { 983 uint32_t Value; 984 }; 985 } DW8; 986 987 // DW9 988 union 989 { 990 struct 991 { 992 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 993 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 ); 994 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 ); 995 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 ); 996 }; 997 struct 998 { 999 uint32_t Value; 1000 }; 1001 } DW9; 1002 1003 // DW10 1004 union 1005 { 1006 struct 1007 { 1008 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 ); 1009 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 ); 1010 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 ); 1011 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 ); 1012 }; 1013 struct 1014 { 1015 uint32_t Value; 1016 }; 1017 } DW10; 1018 1019 // DW11 1020 union 1021 { 1022 struct 1023 { 1024 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 1025 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 ); 1026 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 ); 1027 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 ); 1028 }; 1029 struct 1030 { 1031 uint32_t Value; 1032 }; 1033 } DW11; 1034 1035 // DW12 1036 union 1037 { 1038 struct 1039 { 1040 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 1041 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 ); 1042 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 ); 1043 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 ); 1044 }; 1045 struct 1046 { 1047 uint32_t Value; 1048 }; 1049 } DW12; 1050 1051 // DW13 1052 union 1053 { 1054 struct 1055 { 1056 uint32_t QpPrimeY : MOS_BITFIELD_RANGE( 0, 7 ); 1057 uint32_t QpPrimeCb : MOS_BITFIELD_RANGE( 8,15 ); 1058 uint32_t QpPrimeCr : MOS_BITFIELD_RANGE( 16,23 ); 1059 uint32_t TargetSizeInWord : MOS_BITFIELD_RANGE( 24,31 ); 1060 }; 1061 struct 1062 { 1063 uint32_t Value; 1064 }; 1065 } DW13; 1066 1067 // DW14 1068 union 1069 { 1070 struct 1071 { 1072 uint32_t SICFwdTransCoeffThreshold_0 : MOS_BITFIELD_RANGE( 0,15 ); 1073 uint32_t SICFwdTransCoeffThreshold_1 : MOS_BITFIELD_RANGE( 16,23 ); 1074 uint32_t SICFwdTransCoeffThreshold_2 : MOS_BITFIELD_RANGE( 24,31 ); 1075 }; 1076 struct 1077 { 1078 uint32_t Value; 1079 }; 1080 } DW14; 1081 1082 // DW15 1083 union 1084 { 1085 struct 1086 { 1087 uint32_t SICFwdTransCoeffThreshold_3 : MOS_BITFIELD_RANGE( 0, 7 ); 1088 uint32_t SICFwdTransCoeffThreshold_4 : MOS_BITFIELD_RANGE( 8,15 ); 1089 uint32_t SICFwdTransCoeffThreshold_5 : MOS_BITFIELD_RANGE( 16,23 ); 1090 uint32_t SICFwdTransCoeffThreshold_6 : MOS_BITFIELD_RANGE( 24,31 ); // Highest Freq 1091 }; 1092 struct 1093 { 1094 uint32_t Value; 1095 }; 1096 } DW15; 1097 1098 // DW16 1099 union 1100 { 1101 struct 1102 { 1103 SearchPathDelta SPDelta_0; 1104 SearchPathDelta SPDelta_1; 1105 SearchPathDelta SPDelta_2; 1106 SearchPathDelta SPDelta_3; 1107 }; 1108 struct 1109 { 1110 uint32_t Value; 1111 }; 1112 } DW16; 1113 1114 // DW17 1115 union 1116 { 1117 struct 1118 { 1119 SearchPathDelta SPDelta_4; 1120 SearchPathDelta SPDelta_5; 1121 SearchPathDelta SPDelta_6; 1122 SearchPathDelta SPDelta_7; 1123 }; 1124 struct 1125 { 1126 uint32_t Value; 1127 }; 1128 } DW17; 1129 1130 // DW18 1131 union 1132 { 1133 struct 1134 { 1135 SearchPathDelta SPDelta_8; 1136 SearchPathDelta SPDelta_9; 1137 SearchPathDelta SPDelta_10; 1138 SearchPathDelta SPDelta_11; 1139 }; 1140 struct 1141 { 1142 uint32_t Value; 1143 }; 1144 } DW18; 1145 1146 // DW19 1147 union 1148 { 1149 struct 1150 { 1151 SearchPathDelta SPDelta_12; 1152 SearchPathDelta SPDelta_13; 1153 SearchPathDelta SPDelta_14; 1154 SearchPathDelta SPDelta_15; 1155 }; 1156 struct 1157 { 1158 uint32_t Value; 1159 }; 1160 } DW19; 1161 1162 // DW20 1163 union 1164 { 1165 struct 1166 { 1167 SearchPathDelta SPDelta_16; 1168 SearchPathDelta SPDelta_17; 1169 SearchPathDelta SPDelta_18; 1170 SearchPathDelta SPDelta_19; 1171 }; 1172 struct 1173 { 1174 uint32_t Value; 1175 }; 1176 } DW20; 1177 1178 // DW21 1179 union 1180 { 1181 struct 1182 { 1183 SearchPathDelta SPDelta_20; 1184 SearchPathDelta SPDelta_21; 1185 SearchPathDelta SPDelta_22; 1186 SearchPathDelta SPDelta_23; 1187 }; 1188 struct 1189 { 1190 uint32_t Value; 1191 }; 1192 } DW21; 1193 1194 // DW22 1195 union 1196 { 1197 struct 1198 { 1199 SearchPathDelta SPDelta_24; 1200 SearchPathDelta SPDelta_25; 1201 SearchPathDelta SPDelta_26; 1202 SearchPathDelta SPDelta_27; 1203 }; 1204 struct 1205 { 1206 uint32_t Value; 1207 }; 1208 } DW22; 1209 1210 // DW23 1211 union 1212 { 1213 struct 1214 { 1215 SearchPathDelta SPDelta_28; 1216 SearchPathDelta SPDelta_29; 1217 SearchPathDelta SPDelta_30; 1218 SearchPathDelta SPDelta_31; 1219 }; 1220 struct 1221 { 1222 uint32_t Value; 1223 }; 1224 } DW23; 1225 1226 // DW24 1227 union 1228 { 1229 struct 1230 { 1231 SearchPathDelta SPDelta_32; 1232 SearchPathDelta SPDelta_33; 1233 SearchPathDelta SPDelta_34; 1234 SearchPathDelta SPDelta_35; 1235 }; 1236 struct 1237 { 1238 uint32_t Value; 1239 }; 1240 } DW24; 1241 1242 // DW25 1243 union 1244 { 1245 struct 1246 { 1247 SearchPathDelta SPDelta_36; 1248 SearchPathDelta SPDelta_37; 1249 SearchPathDelta SPDelta_38; 1250 SearchPathDelta SPDelta_39; 1251 }; 1252 struct 1253 { 1254 uint32_t Value; 1255 }; 1256 } DW25; 1257 1258 // DW26 1259 union 1260 { 1261 struct 1262 { 1263 SearchPathDelta SPDelta_40; 1264 SearchPathDelta SPDelta_41; 1265 SearchPathDelta SPDelta_42; 1266 SearchPathDelta SPDelta_43; 1267 }; 1268 struct 1269 { 1270 uint32_t Value; 1271 }; 1272 } DW26; 1273 1274 // DW27 1275 union 1276 { 1277 struct 1278 { 1279 SearchPathDelta SPDelta_44; 1280 SearchPathDelta SPDelta_45; 1281 SearchPathDelta SPDelta_46; 1282 SearchPathDelta SPDelta_47; 1283 }; 1284 struct 1285 { 1286 uint32_t Value; 1287 }; 1288 } DW27; 1289 1290 // DW28 1291 union 1292 { 1293 struct 1294 { 1295 SearchPathDelta SPDelta_48; 1296 SearchPathDelta SPDelta_49; 1297 SearchPathDelta SPDelta_50; 1298 SearchPathDelta SPDelta_51; 1299 }; 1300 struct 1301 { 1302 uint32_t Value; 1303 }; 1304 } DW28; 1305 1306 // DW29 1307 union 1308 { 1309 struct 1310 { 1311 SearchPathDelta SPDelta_52; 1312 SearchPathDelta SPDelta_53; 1313 SearchPathDelta SPDelta_54; 1314 SearchPathDelta SPDelta_55; 1315 }; 1316 struct 1317 { 1318 uint32_t Value; 1319 }; 1320 } DW29; 1321 1322 // DW30 1323 union 1324 { 1325 struct 1326 { 1327 uint32_t Intra4x4ModeMask : MOS_BITFIELD_RANGE( 0, 8 ); 1328 uint32_t : MOS_BITFIELD_RANGE( 9,15 ); 1329 uint32_t Intra8x8ModeMask : MOS_BITFIELD_RANGE( 16,24 ); 1330 uint32_t : MOS_BITFIELD_RANGE( 25,31 ); 1331 }; 1332 struct 1333 { 1334 uint32_t Value; 1335 }; 1336 } DW30; 1337 1338 // DW31 1339 union 1340 { 1341 struct 1342 { 1343 uint32_t Intra16x16ModeMask : MOS_BITFIELD_RANGE( 0, 3 ); 1344 uint32_t IntraChromaModeMask : MOS_BITFIELD_RANGE( 4, 7 ); 1345 uint32_t IntraComputeType : MOS_BITFIELD_RANGE( 8, 9 ); 1346 uint32_t : MOS_BITFIELD_RANGE( 10,31 ); 1347 }; 1348 struct 1349 { 1350 uint32_t Value; 1351 }; 1352 } DW31; 1353 1354 // DW32 1355 union 1356 { 1357 struct 1358 { 1359 uint32_t SkipVal : MOS_BITFIELD_RANGE( 0,15 ); 1360 uint32_t MultiPredL0Disable : MOS_BITFIELD_RANGE( 16,23 ); 1361 uint32_t MultiPredL1Disable : MOS_BITFIELD_RANGE( 24,31 ); 1362 }; 1363 struct 1364 { 1365 uint32_t Value; 1366 }; 1367 } DW32; 1368 1369 // DW33 1370 union 1371 { 1372 struct 1373 { 1374 uint32_t Intra16x16NonDCPredPenalty : MOS_BITFIELD_RANGE( 0,7 ); 1375 uint32_t Intra8x8NonDCPredPenalty : MOS_BITFIELD_RANGE( 8,15 ); 1376 uint32_t Intra4x4NonDCPredPenalty : MOS_BITFIELD_RANGE( 16,23 ); 1377 uint32_t : MOS_BITFIELD_RANGE( 24,31 ); 1378 }; 1379 struct 1380 { 1381 uint32_t Value; 1382 }; 1383 } DW33; 1384 1385 // DW34 1386 union 1387 { 1388 struct 1389 { 1390 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT( 0 ); 1391 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT( 1 ); 1392 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT( 2 ); 1393 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT( 3 ); 1394 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT( 4 ); 1395 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT( 5 ); 1396 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT( 6 ); 1397 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT( 7 ); 1398 uint32_t List1RefID0FrameFieldFlag : MOS_BITFIELD_BIT( 8 ); 1399 uint32_t List1RefID1FrameFieldFlag : MOS_BITFIELD_BIT( 9 ); 1400 uint32_t IntraRefreshEn : MOS_BITFIELD_RANGE( 10,11 ); 1401 uint32_t ArbitraryNumMbsPerSlice : MOS_BITFIELD_BIT( 12 ); 1402 uint32_t EnableAdaptiveTxDecision : MOS_BITFIELD_BIT( 13 ); 1403 uint32_t ForceNonSkipMbEnable : MOS_BITFIELD_BIT( 14 ); 1404 uint32_t DisableEncSkipCheck : MOS_BITFIELD_BIT( 15 ); 1405 uint32_t EnableDirectBiasAdjustment : MOS_BITFIELD_BIT( 16 ); 1406 uint32_t bForceToSkip : MOS_BITFIELD_BIT( 17 ); 1407 uint32_t EnableGlobalMotionBiasAdjustment : MOS_BITFIELD_BIT( 18 ); 1408 uint32_t EnableAdaptiveSearchWindowSize : MOS_BITFIELD_BIT( 19 ); 1409 uint32_t EnablePerMBStaticCheck : MOS_BITFIELD_BIT( 20 ); 1410 uint32_t RemoveIntraRefreshOverlap : MOS_BITFIELD_BIT( 21 ); 1411 uint32_t : MOS_BITFIELD_RANGE( 22,23 ); 1412 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT( 24 ); 1413 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT( 25 ); 1414 uint32_t MADEnableFlag : MOS_BITFIELD_BIT( 26 ); 1415 uint32_t ROIEnableFlag : MOS_BITFIELD_BIT( 27 ); 1416 uint32_t EnableMBFlatnessChkOptimization : MOS_BITFIELD_BIT( 28 ); 1417 uint32_t bDirectMode : MOS_BITFIELD_BIT( 29 ); 1418 uint32_t MBBrcEnable : MOS_BITFIELD_BIT( 30 ); 1419 uint32_t bOriginalBff : MOS_BITFIELD_BIT( 31 ); 1420 }; 1421 struct 1422 { 1423 uint32_t Value; 1424 }; 1425 } DW34; 1426 1427 // DW35 1428 union 1429 { 1430 struct 1431 { 1432 uint32_t PanicModeMBThreshold : MOS_BITFIELD_RANGE( 0,15 ); 1433 uint32_t SmallMbSizeInWord : MOS_BITFIELD_RANGE( 16,23 ); 1434 uint32_t LargeMbSizeInWord : MOS_BITFIELD_RANGE( 24,31 ); 1435 }; 1436 struct 1437 { 1438 uint32_t Value; 1439 }; 1440 } DW35; 1441 1442 // DW36 1443 union 1444 { 1445 struct 1446 { 1447 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE( 0, 7 ); 1448 uint32_t HMECombinedExtraSUs : MOS_BITFIELD_RANGE( 8,15 ); 1449 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE( 16,23 ); 1450 uint32_t : MOS_BITFIELD_RANGE( 24,27 ); 1451 uint32_t IsFwdFrameShortTermRef : MOS_BITFIELD_BIT( 28 ); 1452 uint32_t CheckAllFractionalEnable : MOS_BITFIELD_BIT( 29 ); 1453 uint32_t HMECombineOverlap : MOS_BITFIELD_RANGE( 30,31 ); 1454 }; 1455 struct 1456 { 1457 uint32_t Value; 1458 }; 1459 } DW36; 1460 1461 // DW37 1462 union 1463 { 1464 struct 1465 { 1466 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 ); 1467 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 ); 1468 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 ); 1469 uint32_t : MOS_BITFIELD_RANGE( 3, 4 ); 1470 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 ); 1471 uint32_t : MOS_BITFIELD_BIT( 6 ); 1472 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 ); 1473 uint32_t : MOS_BITFIELD_RANGE( 8,23 ); 1474 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 ); 1475 }; 1476 struct 1477 { 1478 uint32_t Value; 1479 }; 1480 } DW37; 1481 1482 // DW38 1483 union 1484 { 1485 struct 1486 { 1487 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 ); 1488 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 ); 1489 uint32_t RefThreshold : MOS_BITFIELD_RANGE( 16,31 ); 1490 }; 1491 struct 1492 { 1493 uint32_t Value; 1494 }; 1495 } DW38; 1496 1497 // DW39 1498 union 1499 { 1500 struct 1501 { 1502 uint32_t : MOS_BITFIELD_RANGE( 0, 7 ); 1503 uint32_t HMERefWindowsCombThreshold : MOS_BITFIELD_RANGE( 8,15 ); 1504 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 ); 1505 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 ); 1506 }; 1507 struct 1508 { 1509 uint32_t Value; 1510 }; 1511 } DW39; 1512 1513 // DW40 1514 union 1515 { 1516 struct 1517 { 1518 uint32_t DistScaleFactorRefID0List0 : MOS_BITFIELD_RANGE( 0,15 ); 1519 uint32_t DistScaleFactorRefID1List0 : MOS_BITFIELD_RANGE( 16,31 ); 1520 }; 1521 struct 1522 { 1523 uint32_t Value; 1524 }; 1525 } DW40; 1526 1527 // DW41 1528 union 1529 { 1530 struct 1531 { 1532 uint32_t DistScaleFactorRefID2List0 : MOS_BITFIELD_RANGE( 0,15 ); 1533 uint32_t DistScaleFactorRefID3List0 : MOS_BITFIELD_RANGE( 16,31 ); 1534 }; 1535 struct 1536 { 1537 uint32_t Value; 1538 }; 1539 } DW41; 1540 1541 // DW42 1542 union 1543 { 1544 struct 1545 { 1546 uint32_t DistScaleFactorRefID4List0 : MOS_BITFIELD_RANGE( 0,15 ); 1547 uint32_t DistScaleFactorRefID5List0 : MOS_BITFIELD_RANGE( 16,31 ); 1548 }; 1549 struct 1550 { 1551 uint32_t Value; 1552 }; 1553 } DW42; 1554 1555 // DW43 1556 union 1557 { 1558 struct 1559 { 1560 uint32_t DistScaleFactorRefID6List0 : MOS_BITFIELD_RANGE( 0,15 ); 1561 uint32_t DistScaleFactorRefID7List0 : MOS_BITFIELD_RANGE( 16,31 ); 1562 }; 1563 struct 1564 { 1565 uint32_t Value; 1566 }; 1567 } DW43; 1568 1569 // DW44 1570 union 1571 { 1572 struct 1573 { 1574 uint32_t ActualQPValueForRefID0List0 : MOS_BITFIELD_RANGE( 0, 7 ); 1575 uint32_t ActualQPValueForRefID1List0 : MOS_BITFIELD_RANGE( 8,15 ); 1576 uint32_t ActualQPValueForRefID2List0 : MOS_BITFIELD_RANGE( 16,23 ); 1577 uint32_t ActualQPValueForRefID3List0 : MOS_BITFIELD_RANGE( 24,31 ); 1578 }; 1579 struct 1580 { 1581 uint32_t Value; 1582 }; 1583 } DW44; 1584 1585 // DW45 1586 union 1587 { 1588 struct 1589 { 1590 uint32_t ActualQPValueForRefID4List0 : MOS_BITFIELD_RANGE( 0, 7 ); 1591 uint32_t ActualQPValueForRefID5List0 : MOS_BITFIELD_RANGE( 8,15 ); 1592 uint32_t ActualQPValueForRefID6List0 : MOS_BITFIELD_RANGE( 16,23 ); 1593 uint32_t ActualQPValueForRefID7List0 : MOS_BITFIELD_RANGE( 24,31 ); 1594 }; 1595 struct 1596 { 1597 uint32_t Value; 1598 }; 1599 } DW45; 1600 1601 // DW46 1602 union 1603 { 1604 struct 1605 { 1606 uint32_t ActualQPValueForRefID0List1 : MOS_BITFIELD_RANGE( 0, 7 ); 1607 uint32_t ActualQPValueForRefID1List1 : MOS_BITFIELD_RANGE( 8,15 ); 1608 uint32_t RefCost : MOS_BITFIELD_RANGE( 16,31 ); 1609 }; 1610 struct 1611 { 1612 uint32_t Value; 1613 }; 1614 } DW46; 1615 1616 // DW47 1617 union 1618 { 1619 struct 1620 { 1621 uint32_t MbQpReadFactor : MOS_BITFIELD_RANGE( 0, 7 ); 1622 uint32_t IntraCostSF : MOS_BITFIELD_RANGE( 8,15 ); 1623 uint32_t MaxVmvR : MOS_BITFIELD_RANGE( 16,31 ); 1624 }; 1625 struct 1626 { 1627 uint32_t Value; 1628 }; 1629 } DW47; 1630 1631 //DW48 1632 union 1633 { 1634 struct 1635 { 1636 uint32_t IntraRefreshMBNum : MOS_BITFIELD_RANGE( 0,15 ); 1637 uint32_t IntraRefreshUnitInMBMinus1 : MOS_BITFIELD_RANGE( 16,23 ); 1638 uint32_t IntraRefreshQPDelta : MOS_BITFIELD_RANGE( 24,31 ); 1639 }; 1640 struct 1641 { 1642 uint32_t Value; 1643 }; 1644 } DW48; 1645 1646 // DW49 1647 union 1648 { 1649 struct 1650 { 1651 uint32_t ROI1_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1652 uint32_t ROI1_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1653 }; 1654 struct 1655 { 1656 uint32_t Value; 1657 }; 1658 } DW49; 1659 1660 // DW50 1661 union 1662 { 1663 struct 1664 { 1665 uint32_t ROI1_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1666 uint32_t ROI1_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1667 }; 1668 struct 1669 { 1670 uint32_t Value; 1671 }; 1672 } DW50; 1673 1674 // DW51 1675 union 1676 { 1677 struct 1678 { 1679 uint32_t ROI2_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1680 uint32_t ROI2_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1681 }; 1682 struct 1683 { 1684 uint32_t Value; 1685 }; 1686 } DW51; 1687 1688 // DW52 1689 union 1690 { 1691 struct 1692 { 1693 uint32_t ROI2_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1694 uint32_t ROI2_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1695 }; 1696 struct 1697 { 1698 uint32_t Value; 1699 }; 1700 } DW52; 1701 1702 // DW53 1703 union 1704 { 1705 struct 1706 { 1707 uint32_t ROI3_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1708 uint32_t ROI3_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1709 }; 1710 struct 1711 { 1712 uint32_t Value; 1713 }; 1714 } DW53; 1715 1716 // DW54 1717 union 1718 { 1719 struct 1720 { 1721 uint32_t ROI3_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1722 uint32_t ROI3_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1723 }; 1724 struct 1725 { 1726 uint32_t Value; 1727 }; 1728 } DW54; 1729 1730 // DW55 1731 union 1732 { 1733 struct 1734 { 1735 uint32_t ROI4_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1736 uint32_t ROI4_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1737 }; 1738 struct 1739 { 1740 uint32_t Value; 1741 }; 1742 } DW55; 1743 1744 // DW56 1745 union 1746 { 1747 struct 1748 { 1749 uint32_t ROI4_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1750 uint32_t ROI4_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1751 }; 1752 struct 1753 { 1754 uint32_t Value; 1755 }; 1756 } DW56; 1757 1758 // DW57 1759 union 1760 { 1761 struct 1762 { 1763 uint32_t ROI1_dQpPrimeY : MOS_BITFIELD_RANGE( 0, 7 ); 1764 uint32_t ROI2_dQpPrimeY : MOS_BITFIELD_RANGE( 8,15 ); 1765 uint32_t ROI3_dQpPrimeY : MOS_BITFIELD_RANGE( 16,23 ); 1766 uint32_t ROI4_dQpPrimeY : MOS_BITFIELD_RANGE( 24,31 ); 1767 }; 1768 struct 1769 { 1770 uint32_t Value; 1771 }; 1772 } DW57; 1773 1774 // DW58 1775 union 1776 { 1777 struct 1778 { 1779 uint32_t MBTextureThreshold : MOS_BITFIELD_RANGE( 0,15 ); 1780 uint32_t TxDecisonThreshold : MOS_BITFIELD_RANGE( 16,31 ); 1781 }; 1782 struct 1783 { 1784 uint32_t Value; 1785 }; 1786 } DW58; 1787 1788 // DW59 1789 union 1790 { 1791 struct 1792 { 1793 uint32_t HMEMVCostScalingFactor : MOS_BITFIELD_RANGE( 0, 7 ); 1794 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,31 ); 1795 }; 1796 struct 1797 { 1798 uint32_t Value; 1799 }; 1800 } DW59; 1801 1802 // DW60 1803 union 1804 { 1805 struct 1806 { 1807 uint32_t IPCM_QP0 : MOS_BITFIELD_RANGE( 0, 7 ); 1808 uint32_t IPCM_QP1 : MOS_BITFIELD_RANGE( 8,15 ); 1809 uint32_t IPCM_QP2 : MOS_BITFIELD_RANGE( 16,23 ); 1810 uint32_t IPCM_QP3 : MOS_BITFIELD_RANGE( 24,31 ); 1811 }; 1812 struct 1813 { 1814 uint32_t Value; 1815 }; 1816 } DW60; 1817 1818 // DW61 1819 union 1820 { 1821 struct 1822 { 1823 uint32_t IPCM_QP4 : MOS_BITFIELD_RANGE( 0, 7 ); 1824 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,15 ); 1825 uint32_t IPCM_Thresh0 : MOS_BITFIELD_RANGE( 16,31 ); 1826 }; 1827 struct 1828 { 1829 uint32_t Value; 1830 }; 1831 } DW61; 1832 1833 // DW62 1834 union 1835 { 1836 struct 1837 { 1838 uint32_t IPCM_Thresh1 : MOS_BITFIELD_RANGE( 0,15 ); 1839 uint32_t IPCM_Thresh2 : MOS_BITFIELD_RANGE( 16,31 ); 1840 }; 1841 struct 1842 { 1843 uint32_t Value; 1844 }; 1845 } DW62; 1846 1847 // DW63 1848 union 1849 { 1850 struct 1851 { 1852 uint32_t IPCM_Thresh3 : MOS_BITFIELD_RANGE( 0,15 ); 1853 uint32_t IPCM_Thresh4 : MOS_BITFIELD_RANGE( 16,31 ); 1854 }; 1855 struct 1856 { 1857 uint32_t Value; 1858 }; 1859 } DW63; 1860 1861 // DW64 1862 union 1863 { 1864 struct 1865 { 1866 uint32_t NumMVPredictorsL0 : MOS_BITFIELD_RANGE( 0, 3 ); 1867 uint32_t Reserved1 : MOS_BITFIELD_BIT( 4 ); 1868 uint32_t Reserved2 : MOS_BITFIELD_BIT( 5 ); 1869 uint32_t VMEDistortionOutputEnable : MOS_BITFIELD_BIT( 6 ); 1870 uint32_t PerMBQpEnable : MOS_BITFIELD_BIT( 7 ); 1871 uint32_t MBInputEnable : MOS_BITFIELD_BIT( 8 ); 1872 uint32_t FEIMode : MOS_BITFIELD_BIT( 9 ); 1873 uint32_t NumMVPredictorsL1 : MOS_BITFIELD_RANGE( 10,13 ); 1874 uint32_t DefaultMVCompare : MOS_BITFIELD_RANGE( 14,15 ); 1875 uint32_t NumberOfMVPBipredCalls : MOS_BITFIELD_RANGE( 16,23 ); 1876 uint32_t EnableColorBleedWAforIntraSlice : MOS_BITFIELD_BIT( 24 ); 1877 uint32_t L1ListRef0PictureCodingType : MOS_BITFIELD_RANGE( 25,26 ); // PAFF WA Fix 1878 uint32_t Reserved3 : MOS_BITFIELD_RANGE( 27,31 ); 1879 }; 1880 struct 1881 { 1882 uint32_t Value; 1883 }; 1884 } DW64; 1885 1886 // DW65 1887 union 1888 { 1889 struct 1890 { 1891 uint32_t FlatnessThreshold : MOS_BITFIELD_RANGE( 0,31 ); 1892 }; 1893 struct 1894 { 1895 uint32_t Value; 1896 }; 1897 } DW65; 1898 1899 // DW66 1900 union 1901 { 1902 struct 1903 { 1904 uint32_t BottomFieldOffsetL1ListRef0MV : MOS_BITFIELD_RANGE( 0,31 ); 1905 }; 1906 struct 1907 { 1908 uint32_t Value; 1909 }; 1910 } DW66; 1911 1912 // DW67 1913 union 1914 { 1915 struct 1916 { 1917 uint32_t BottomFieldOffsetL1ListRef0MBCode : MOS_BITFIELD_RANGE( 0,31 ); 1918 }; 1919 struct 1920 { 1921 uint32_t Value; 1922 }; 1923 } DW67; 1924 1925 // DW68 1926 union 1927 { 1928 struct 1929 { 1930 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 1931 }; 1932 struct 1933 { 1934 uint32_t Value; 1935 }; 1936 } DW68; 1937 1938 // DW69 1939 union 1940 { 1941 struct 1942 { 1943 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 1944 }; 1945 struct 1946 { 1947 uint32_t Value; 1948 }; 1949 } DW69; 1950 1951 // DW70 1952 union 1953 { 1954 struct 1955 { 1956 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 1957 }; 1958 struct 1959 { 1960 uint32_t Value; 1961 }; 1962 } DW70; 1963 1964 // DW71 1965 union 1966 { 1967 struct 1968 { 1969 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 1970 }; 1971 struct 1972 { 1973 uint32_t Value; 1974 }; 1975 } DW71; 1976 1977 // DW72 1978 union 1979 { 1980 struct 1981 { 1982 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 1983 }; 1984 struct 1985 { 1986 uint32_t Value; 1987 }; 1988 } DW72; 1989 1990 // DW73 1991 union 1992 { 1993 struct 1994 { 1995 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 1996 }; 1997 struct 1998 { 1999 uint32_t Value; 2000 }; 2001 } DW73; 2002 2003 // DW74 2004 union 2005 { 2006 struct 2007 { 2008 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 2009 }; 2010 struct 2011 { 2012 uint32_t Value; 2013 }; 2014 } DW74; 2015 2016 // DW75 2017 union 2018 { 2019 struct 2020 { 2021 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 2022 }; 2023 struct 2024 { 2025 uint32_t Value; 2026 }; 2027 } DW75; 2028 2029 // DW76 2030 union 2031 { 2032 struct 2033 { 2034 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 2035 }; 2036 struct 2037 { 2038 uint32_t Value; 2039 }; 2040 } DW76; 2041 2042 // DW77 2043 union 2044 { 2045 struct 2046 { 2047 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 2048 }; 2049 struct 2050 { 2051 uint32_t Value; 2052 }; 2053 } DW77; 2054 2055 // DW78 2056 union 2057 { 2058 struct 2059 { 2060 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 2061 }; 2062 struct 2063 { 2064 uint32_t Value; 2065 }; 2066 } DW78; 2067 2068 // DW79 2069 union 2070 { 2071 struct 2072 { 2073 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 2074 }; 2075 struct 2076 { 2077 uint32_t Value; 2078 }; 2079 } DW79; 2080 } CODECHAL_ENCODE_AVC_MBENC_CURBE_G9_COMMON, *PCODECHAL_ENCODE_AVC_MBENC_CURBE_G9_COMMON; 2081 2082 typedef struct _CODECHAL_ENCODE_AVC_MBENC_CURBE_G9_SURFACES 2083 { 2084 // DW80 2085 union 2086 { 2087 struct 2088 { 2089 uint32_t MBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2090 }; 2091 struct 2092 { 2093 uint32_t Value; 2094 }; 2095 } DW80; 2096 2097 // DW81 2098 union 2099 { 2100 struct 2101 { 2102 uint32_t MVDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2103 }; 2104 struct 2105 { 2106 uint32_t Value; 2107 }; 2108 } DW81; 2109 2110 // DW82 2111 union 2112 { 2113 struct 2114 { 2115 uint32_t IDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2116 }; 2117 struct 2118 { 2119 uint32_t Value; 2120 }; 2121 } DW82; 2122 2123 // DW83 2124 union 2125 { 2126 struct 2127 { 2128 uint32_t SrcYSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2129 }; 2130 struct 2131 { 2132 uint32_t Value; 2133 }; 2134 } DW83; 2135 2136 // DW84 2137 union 2138 { 2139 struct 2140 { 2141 uint32_t MBSpecificDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2142 }; 2143 struct 2144 { 2145 uint32_t Value; 2146 }; 2147 } DW84; 2148 2149 // DW85 2150 union 2151 { 2152 struct 2153 { 2154 uint32_t AuxVmeOutSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2155 }; 2156 struct 2157 { 2158 uint32_t Value; 2159 }; 2160 } DW85; 2161 2162 // DW86 2163 union 2164 { 2165 struct 2166 { 2167 uint32_t CurrRefPicSelSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2168 }; 2169 struct 2170 { 2171 uint32_t Value; 2172 }; 2173 } DW86; 2174 2175 // DW87 2176 union 2177 { 2178 struct 2179 { 2180 uint32_t HMEMVPredFwdBwdSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2181 }; 2182 struct 2183 { 2184 uint32_t Value; 2185 }; 2186 } DW87; 2187 2188 // DW88 2189 union 2190 { 2191 struct 2192 { 2193 uint32_t HMEDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2194 }; 2195 struct 2196 { 2197 uint32_t Value; 2198 }; 2199 } DW88; 2200 2201 // DW89 2202 union 2203 { 2204 struct 2205 { 2206 uint32_t SliceMapSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2207 }; 2208 struct 2209 { 2210 uint32_t Value; 2211 }; 2212 } DW89; 2213 2214 // DW90 2215 union 2216 { 2217 struct 2218 { 2219 uint32_t FwdFrmMBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2220 }; 2221 struct 2222 { 2223 uint32_t Value; 2224 }; 2225 } DW90; 2226 2227 // DW91 2228 union 2229 { 2230 struct 2231 { 2232 uint32_t FwdFrmMVSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2233 }; 2234 struct 2235 { 2236 uint32_t Value; 2237 }; 2238 } DW91; 2239 2240 // DW92 2241 union 2242 { 2243 struct 2244 { 2245 uint32_t MBQPBuffer : MOS_BITFIELD_RANGE( 0,31 ); 2246 }; 2247 struct 2248 { 2249 uint32_t Value; 2250 }; 2251 } DW92; 2252 2253 // DW93 2254 union 2255 { 2256 struct 2257 { 2258 uint32_t MBBRCLut : MOS_BITFIELD_RANGE( 0,31 ); 2259 }; 2260 struct 2261 { 2262 uint32_t Value; 2263 }; 2264 } DW93; 2265 2266 // DW94 2267 union 2268 { 2269 struct 2270 { 2271 uint32_t VMEInterPredictionSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2272 }; 2273 struct 2274 { 2275 uint32_t Value; 2276 }; 2277 } DW94; 2278 2279 // DW95 2280 union 2281 { 2282 struct 2283 { 2284 uint32_t VMEInterPredictionMRSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2285 }; 2286 struct 2287 { 2288 uint32_t Value; 2289 }; 2290 } DW95; 2291 2292 // DW96 2293 union 2294 { 2295 struct 2296 { 2297 uint32_t MbStatsSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2298 }; 2299 struct 2300 { 2301 uint32_t Value; 2302 }; 2303 } DW96; 2304 2305 // DW97 2306 union 2307 { 2308 struct 2309 { 2310 uint32_t MADSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2311 }; 2312 struct 2313 { 2314 uint32_t Value; 2315 }; 2316 } DW97; 2317 2318 // DW98 2319 union 2320 { 2321 struct 2322 { 2323 uint32_t ForceNonSkipMBmapSurface : MOS_BITFIELD_RANGE( 0,31 ); 2324 }; 2325 struct 2326 { 2327 uint32_t Value; 2328 }; 2329 } DW98; 2330 2331 // DW99 2332 union 2333 { 2334 struct 2335 { 2336 uint32_t ReservedIndex : MOS_BITFIELD_RANGE( 0,31 ); 2337 }; 2338 struct 2339 { 2340 uint32_t Value; 2341 }; 2342 } DW99; 2343 2344 // DW100 2345 union 2346 { 2347 struct 2348 { 2349 uint32_t BRCCurbeSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2350 }; 2351 struct 2352 { 2353 uint32_t Value; 2354 }; 2355 } DW100; 2356 2357 // DW101 2358 union 2359 { 2360 struct 2361 { 2362 uint32_t StaticDetectionCostTableIndex : MOS_BITFIELD_RANGE( 0,31 ); 2363 }; 2364 struct 2365 { 2366 uint32_t Value; 2367 }; 2368 } DW101; 2369 2370 // DW102 2371 union 2372 { 2373 struct 2374 { 2375 uint32_t FEIMVPredictorSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 2376 }; 2377 struct 2378 { 2379 uint32_t Value; 2380 }; 2381 } DW102; 2382 2383 // DW103 2384 union 2385 { 2386 struct 2387 { 2388 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 2389 }; 2390 struct 2391 { 2392 uint32_t Value; 2393 }; 2394 } DW103; 2395 } CODECHAL_ENCODE_AVC_MBENC_CURBE_G9_SURFACES, *PCODECHAL_ENCODE_AVC_MBENC_CURBE_G9_SURFACES; 2396 2397 typedef struct _CODECHAL_ENCODE_AVC_MBENC_CURBE_G9 2398 { 2399 CODECHAL_ENCODE_AVC_MBENC_CURBE_G9_COMMON common; 2400 CODECHAL_ENCODE_AVC_MBENC_CURBE_G9_SURFACES surfaces; 2401 } CODECHAL_ENCODE_AVC_MBENC_CURBE_G9, *PCODECHAL_ENCODE_AVC_MBENC_CURBE_G9; 2402 2403 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)) == CODECHAL_ENCODE_AVC_MBENC_CURBE_SIZE_IN_DWORD_G9); 2404 2405 typedef struct _CODECHAL_ENCODE_AVC_FEI_MBENC_STATIC_DATA_G9 2406 { 2407 // DW0 2408 union 2409 { 2410 struct 2411 { 2412 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 ); 2413 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 ); 2414 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 ); 2415 uint32_t : MOS_BITFIELD_RANGE( 3, 4 ); 2416 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 ); 2417 uint32_t : MOS_BITFIELD_BIT( 6 ); 2418 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 ); 2419 uint32_t : MOS_BITFIELD_RANGE( 8,23 ); 2420 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 ); 2421 }; 2422 struct 2423 { 2424 uint32_t Value; 2425 }; 2426 } DW0; 2427 2428 // DW1 2429 union 2430 { 2431 struct 2432 { 2433 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 ); 2434 uint32_t : MOS_BITFIELD_RANGE( 6,15 ); 2435 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 ); 2436 uint32_t : MOS_BITFIELD_RANGE( 22,27 ); 2437 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 ); 2438 uint32_t : MOS_BITFIELD_RANGE( 29,31 ); 2439 }; 2440 struct 2441 { 2442 uint32_t Value; 2443 }; 2444 } DW1; 2445 2446 // DW2 2447 union 2448 { 2449 struct 2450 { 2451 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 ); 2452 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 ); 2453 uint32_t PicWidth : MOS_BITFIELD_RANGE( 16,31 ); 2454 }; 2455 struct 2456 { 2457 uint32_t Value; 2458 }; 2459 } DW2; 2460 2461 // DW3 2462 union 2463 { 2464 struct 2465 { 2466 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 ); 2467 uint32_t : MOS_BITFIELD_RANGE( 2, 3 ); 2468 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 ); 2469 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 ); 2470 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 ); 2471 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 ); 2472 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 ); 2473 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 ); 2474 uint32_t SkipType : MOS_BITFIELD_BIT( 14 ); 2475 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 ); 2476 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 ); 2477 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 ); 2478 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 ); 2479 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 ); 2480 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 ); 2481 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 ); 2482 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 ); 2483 uint32_t : MOS_BITFIELD_BIT( 31 ); 2484 }; 2485 struct 2486 { 2487 uint32_t Value; 2488 }; 2489 } DW3; 2490 2491 // DW4 2492 union 2493 { 2494 struct 2495 { 2496 uint32_t PicHeightMinus1 : MOS_BITFIELD_RANGE( 0,15 ); 2497 uint32_t MvRestrictionInSliceEnable : MOS_BITFIELD_BIT( 16 ); 2498 uint32_t DeltaMvEnable : MOS_BITFIELD_BIT( 17 ); 2499 uint32_t TrueDistortionEnable : MOS_BITFIELD_BIT( 18 ); 2500 uint32_t EnableWavefrontOptimization : MOS_BITFIELD_BIT( 19 ); 2501 uint32_t EnableFBRBypass : MOS_BITFIELD_BIT( 20 ); 2502 uint32_t EnableIntraCostScalingForStaticFrame: MOS_BITFIELD_BIT( 21 ); 2503 uint32_t : MOS_BITFIELD_BIT( 22 ); 2504 uint32_t Reserved : MOS_BITFIELD_BIT( 23 ); 2505 uint32_t EnableDirtyRect : MOS_BITFIELD_BIT( 24 ); 2506 uint32_t bCurFldIDR : MOS_BITFIELD_BIT( 25 ); 2507 uint32_t ConstrainedIntraPredFlag : MOS_BITFIELD_BIT( 26 ); 2508 uint32_t FieldParityFlag : MOS_BITFIELD_BIT( 27 ); 2509 uint32_t HMEEnable : MOS_BITFIELD_BIT( 28 ); 2510 uint32_t PictureType : MOS_BITFIELD_RANGE( 29,30 ); 2511 uint32_t UseActualRefQPValue : MOS_BITFIELD_BIT( 31 ); 2512 }; 2513 struct 2514 { 2515 uint32_t Value; 2516 }; 2517 } DW4; 2518 2519 // DW5 2520 union 2521 { 2522 struct 2523 { 2524 uint32_t SliceMbHeight : MOS_BITFIELD_RANGE( 0,15 ); 2525 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 ); 2526 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 ); 2527 }; 2528 struct 2529 { 2530 uint32_t Value; 2531 }; 2532 } DW5; 2533 2534 // DW6 2535 union 2536 { 2537 struct 2538 { 2539 uint32_t BatchBufferEnd : MOS_BITFIELD_RANGE( 0,31 ); 2540 }; 2541 struct 2542 { 2543 uint32_t Value; 2544 }; 2545 } DW6; 2546 2547 // DW7 2548 union 2549 { 2550 struct 2551 { 2552 uint32_t IntraPartMask : MOS_BITFIELD_RANGE( 0, 4 ); 2553 uint32_t NonSkipZMvAdded : MOS_BITFIELD_BIT( 5 ); 2554 uint32_t NonSkipModeAdded : MOS_BITFIELD_BIT( 6 ); 2555 uint32_t LumaIntraSrcCornerSwap : MOS_BITFIELD_BIT( 7 ); 2556 uint32_t : MOS_BITFIELD_RANGE( 8,15 ); 2557 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 ); 2558 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 ); 2559 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 ); 2560 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 ); 2561 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 ); 2562 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 ); 2563 uint32_t : MOS_BITFIELD_BIT( 23 ); 2564 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 ); 2565 }; 2566 struct 2567 { 2568 uint32_t Value; 2569 }; 2570 } DW7; 2571 2572 struct 2573 { 2574 // DW8 2575 union 2576 { 2577 struct 2578 { 2579 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 2580 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 ); 2581 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 ); 2582 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 ); 2583 }; 2584 struct 2585 { 2586 uint32_t Value; 2587 }; 2588 } DW8; 2589 2590 // DW9 2591 union 2592 { 2593 struct 2594 { 2595 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 2596 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 ); 2597 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 ); 2598 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 ); 2599 }; 2600 struct 2601 { 2602 uint32_t Value; 2603 }; 2604 } DW9; 2605 2606 // DW10 2607 union 2608 { 2609 struct 2610 { 2611 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 ); 2612 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 ); 2613 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 ); 2614 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 ); 2615 }; 2616 struct 2617 { 2618 uint32_t Value; 2619 }; 2620 } DW10; 2621 2622 // DW11 2623 union 2624 { 2625 struct 2626 { 2627 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 2628 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 ); 2629 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 ); 2630 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 ); 2631 }; 2632 struct 2633 { 2634 uint32_t Value; 2635 }; 2636 } DW11; 2637 2638 // DW12 2639 union 2640 { 2641 struct 2642 { 2643 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 2644 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 ); 2645 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 ); 2646 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 ); 2647 }; 2648 struct 2649 { 2650 uint32_t Value; 2651 }; 2652 } DW12; 2653 2654 // DW13 2655 union 2656 { 2657 struct 2658 { 2659 uint32_t QpPrimeY : MOS_BITFIELD_RANGE( 0, 7 ); 2660 uint32_t QpPrimeCb : MOS_BITFIELD_RANGE( 8,15 ); 2661 uint32_t QpPrimeCr : MOS_BITFIELD_RANGE( 16,23 ); 2662 uint32_t TargetSizeInWord : MOS_BITFIELD_RANGE( 24,31 ); 2663 }; 2664 struct 2665 { 2666 uint32_t Value; 2667 }; 2668 } DW13; 2669 2670 // DW14 2671 union 2672 { 2673 struct 2674 { 2675 uint32_t SICFwdTransCoeffThreshold_0 : MOS_BITFIELD_RANGE( 0,15 ); 2676 uint32_t SICFwdTransCoeffThreshold_1 : MOS_BITFIELD_RANGE( 16,23 ); 2677 uint32_t SICFwdTransCoeffThreshold_2 : MOS_BITFIELD_RANGE( 24,31 ); 2678 }; 2679 struct 2680 { 2681 uint32_t Value; 2682 }; 2683 } DW14; 2684 2685 // DW15 2686 union 2687 { 2688 struct 2689 { 2690 uint32_t SICFwdTransCoeffThreshold_3 : MOS_BITFIELD_RANGE( 0, 7 ); 2691 uint32_t SICFwdTransCoeffThreshold_4 : MOS_BITFIELD_RANGE( 8,15 ); 2692 uint32_t SICFwdTransCoeffThreshold_5 : MOS_BITFIELD_RANGE( 16,23 ); 2693 uint32_t SICFwdTransCoeffThreshold_6 : MOS_BITFIELD_RANGE( 24,31 ); // Highest Freq 2694 }; 2695 struct 2696 { 2697 uint32_t Value; 2698 }; 2699 } DW15; 2700 } ModeMvCost; 2701 2702 struct 2703 { 2704 // DW16 2705 union 2706 { 2707 struct 2708 { 2709 SearchPathDelta SPDelta_0; 2710 SearchPathDelta SPDelta_1; 2711 SearchPathDelta SPDelta_2; 2712 SearchPathDelta SPDelta_3; 2713 }; 2714 struct 2715 { 2716 uint32_t Value; 2717 }; 2718 } DW16; 2719 2720 // DW17 2721 union 2722 { 2723 struct 2724 { 2725 SearchPathDelta SPDelta_4; 2726 SearchPathDelta SPDelta_5; 2727 SearchPathDelta SPDelta_6; 2728 SearchPathDelta SPDelta_7; 2729 }; 2730 struct 2731 { 2732 uint32_t Value; 2733 }; 2734 } DW17; 2735 2736 // DW18 2737 union 2738 { 2739 struct 2740 { 2741 SearchPathDelta SPDelta_8; 2742 SearchPathDelta SPDelta_9; 2743 SearchPathDelta SPDelta_10; 2744 SearchPathDelta SPDelta_11; 2745 }; 2746 struct 2747 { 2748 uint32_t Value; 2749 }; 2750 } DW18; 2751 2752 // DW19 2753 union 2754 { 2755 struct 2756 { 2757 SearchPathDelta SPDelta_12; 2758 SearchPathDelta SPDelta_13; 2759 SearchPathDelta SPDelta_14; 2760 SearchPathDelta SPDelta_15; 2761 }; 2762 struct 2763 { 2764 uint32_t Value; 2765 }; 2766 } DW19; 2767 2768 // DW20 2769 union 2770 { 2771 struct 2772 { 2773 SearchPathDelta SPDelta_16; 2774 SearchPathDelta SPDelta_17; 2775 SearchPathDelta SPDelta_18; 2776 SearchPathDelta SPDelta_19; 2777 }; 2778 struct 2779 { 2780 uint32_t Value; 2781 }; 2782 } DW20; 2783 2784 // DW21 2785 union 2786 { 2787 struct 2788 { 2789 SearchPathDelta SPDelta_20; 2790 SearchPathDelta SPDelta_21; 2791 SearchPathDelta SPDelta_22; 2792 SearchPathDelta SPDelta_23; 2793 }; 2794 struct 2795 { 2796 uint32_t Value; 2797 }; 2798 } DW21; 2799 2800 // DW22 2801 union 2802 { 2803 struct 2804 { 2805 SearchPathDelta SPDelta_24; 2806 SearchPathDelta SPDelta_25; 2807 SearchPathDelta SPDelta_26; 2808 SearchPathDelta SPDelta_27; 2809 }; 2810 struct 2811 { 2812 uint32_t Value; 2813 }; 2814 } DW22; 2815 2816 // DW23 2817 union 2818 { 2819 struct 2820 { 2821 SearchPathDelta SPDelta_28; 2822 SearchPathDelta SPDelta_29; 2823 SearchPathDelta SPDelta_30; 2824 SearchPathDelta SPDelta_31; 2825 }; 2826 struct 2827 { 2828 uint32_t Value; 2829 }; 2830 } DW23; 2831 2832 // DW24 2833 union 2834 { 2835 struct 2836 { 2837 SearchPathDelta SPDelta_32; 2838 SearchPathDelta SPDelta_33; 2839 SearchPathDelta SPDelta_34; 2840 SearchPathDelta SPDelta_35; 2841 }; 2842 struct 2843 { 2844 uint32_t Value; 2845 }; 2846 } DW24; 2847 2848 // DW25 2849 union 2850 { 2851 struct 2852 { 2853 SearchPathDelta SPDelta_36; 2854 SearchPathDelta SPDelta_37; 2855 SearchPathDelta SPDelta_38; 2856 SearchPathDelta SPDelta_39; 2857 }; 2858 struct 2859 { 2860 uint32_t Value; 2861 }; 2862 } DW25; 2863 2864 // DW26 2865 union 2866 { 2867 struct 2868 { 2869 SearchPathDelta SPDelta_40; 2870 SearchPathDelta SPDelta_41; 2871 SearchPathDelta SPDelta_42; 2872 SearchPathDelta SPDelta_43; 2873 }; 2874 struct 2875 { 2876 uint32_t Value; 2877 }; 2878 } DW26; 2879 2880 // DW27 2881 union 2882 { 2883 struct 2884 { 2885 SearchPathDelta SPDelta_44; 2886 SearchPathDelta SPDelta_45; 2887 SearchPathDelta SPDelta_46; 2888 SearchPathDelta SPDelta_47; 2889 }; 2890 struct 2891 { 2892 uint32_t Value; 2893 }; 2894 } DW27; 2895 2896 // DW28 2897 union 2898 { 2899 struct 2900 { 2901 SearchPathDelta SPDelta_48; 2902 SearchPathDelta SPDelta_49; 2903 SearchPathDelta SPDelta_50; 2904 SearchPathDelta SPDelta_51; 2905 }; 2906 struct 2907 { 2908 uint32_t Value; 2909 }; 2910 } DW28; 2911 2912 // DW29 2913 union 2914 { 2915 struct 2916 { 2917 SearchPathDelta SPDelta_52; 2918 SearchPathDelta SPDelta_53; 2919 SearchPathDelta SPDelta_54; 2920 SearchPathDelta SPDelta_55; 2921 }; 2922 struct 2923 { 2924 uint32_t Value; 2925 }; 2926 } DW29; 2927 2928 // DW30 2929 union 2930 { 2931 struct 2932 { 2933 uint32_t Intra4x4ModeMask : MOS_BITFIELD_RANGE( 0, 8 ); 2934 uint32_t : MOS_BITFIELD_RANGE( 9,15 ); 2935 uint32_t Intra8x8ModeMask : MOS_BITFIELD_RANGE( 16,24 ); 2936 uint32_t : MOS_BITFIELD_RANGE( 25,31 ); 2937 }; 2938 struct 2939 { 2940 uint32_t Value; 2941 }; 2942 } DW30; 2943 2944 // DW31 2945 union 2946 { 2947 struct 2948 { 2949 uint32_t Intra16x16ModeMask : MOS_BITFIELD_RANGE( 0, 3 ); 2950 uint32_t IntraChromaModeMask : MOS_BITFIELD_RANGE( 4, 7 ); 2951 uint32_t IntraComputeType : MOS_BITFIELD_RANGE( 8, 9 ); 2952 uint32_t : MOS_BITFIELD_RANGE( 10,31 ); 2953 }; 2954 struct 2955 { 2956 uint32_t Value; 2957 }; 2958 } DW31; 2959 } SPDelta; 2960 2961 // DW32 2962 union 2963 { 2964 struct 2965 { 2966 uint32_t SkipVal : MOS_BITFIELD_RANGE( 0,15 ); 2967 uint32_t MultiPredL0Disable : MOS_BITFIELD_RANGE( 16,23 ); 2968 uint32_t MultiPredL1Disable : MOS_BITFIELD_RANGE( 24,31 ); 2969 }; 2970 struct 2971 { 2972 uint32_t Value; 2973 }; 2974 } DW32; 2975 2976 // DW33 2977 union 2978 { 2979 struct 2980 { 2981 uint32_t Intra16x16NonDCPredPenalty : MOS_BITFIELD_RANGE( 0,7 ); 2982 uint32_t Intra8x8NonDCPredPenalty : MOS_BITFIELD_RANGE( 8,15 ); 2983 uint32_t Intra4x4NonDCPredPenalty : MOS_BITFIELD_RANGE( 16,23 ); 2984 uint32_t : MOS_BITFIELD_RANGE( 24,31 ); 2985 }; 2986 struct 2987 { 2988 uint32_t Value; 2989 }; 2990 } DW33; 2991 2992 // DW34 2993 union 2994 { 2995 struct 2996 { 2997 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT( 0 ); 2998 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT( 1 ); 2999 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT( 2 ); 3000 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT( 3 ); 3001 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT( 4 ); 3002 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT( 5 ); 3003 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT( 6 ); 3004 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT( 7 ); 3005 uint32_t List1RefID0FrameFieldFlag : MOS_BITFIELD_BIT( 8 ); 3006 uint32_t List1RefID1FrameFieldFlag : MOS_BITFIELD_BIT( 9 ); 3007 uint32_t IntraRefreshEn : MOS_BITFIELD_RANGE( 10,11 ); 3008 uint32_t ArbitraryNumMbsPerSlice : MOS_BITFIELD_BIT( 12 ); 3009 uint32_t EnableAdaptiveTxDecision : MOS_BITFIELD_BIT( 13 ); 3010 uint32_t ForceNonSkipMbEnable : MOS_BITFIELD_BIT( 14 ); 3011 uint32_t DisableEncSkipCheck : MOS_BITFIELD_BIT( 15 ); 3012 uint32_t EnableDirectBiasAdjustment : MOS_BITFIELD_BIT( 16 ); 3013 uint32_t bForceToSkip : MOS_BITFIELD_BIT( 17 ); 3014 uint32_t EnableGlobalMotionBiasAdjustment : MOS_BITFIELD_BIT( 18 ); 3015 uint32_t EnableAdaptiveSearchWindowSize : MOS_BITFIELD_BIT( 19 ); 3016 uint32_t EnablePerMBStaticCheck : MOS_BITFIELD_BIT( 20 ); 3017 uint32_t : MOS_BITFIELD_RANGE( 21,23 ); 3018 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT( 24 ); 3019 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT( 25 ); 3020 uint32_t MADEnableFlag : MOS_BITFIELD_BIT( 26 ); 3021 uint32_t ROIEnableFlag : MOS_BITFIELD_BIT( 27 ); 3022 uint32_t EnableMBFlatnessChkOptimization : MOS_BITFIELD_BIT( 28 ); 3023 uint32_t bDirectMode : MOS_BITFIELD_BIT( 29 ); 3024 uint32_t MBBrcEnable : MOS_BITFIELD_BIT( 30 ); 3025 uint32_t bOriginalBff : MOS_BITFIELD_BIT( 31 ); 3026 }; 3027 struct 3028 { 3029 uint32_t Value; 3030 }; 3031 } DW34; 3032 3033 // DW35 3034 union 3035 { 3036 struct 3037 { 3038 uint32_t PanicModeMBThreshold : MOS_BITFIELD_RANGE( 0,15 ); 3039 uint32_t SmallMbSizeInWord : MOS_BITFIELD_RANGE( 16,23 ); 3040 uint32_t LargeMbSizeInWord : MOS_BITFIELD_RANGE( 24,31 ); 3041 }; 3042 struct 3043 { 3044 uint32_t Value; 3045 }; 3046 } DW35; 3047 3048 // DW36 3049 union 3050 { 3051 struct 3052 { 3053 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE( 0, 7 ); 3054 uint32_t HMECombinedExtraSUs : MOS_BITFIELD_RANGE( 8,15 ); 3055 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE( 16,23 ); 3056 uint32_t : MOS_BITFIELD_RANGE( 24,27 ); 3057 uint32_t IsFwdFrameShortTermRef : MOS_BITFIELD_BIT( 28 ); 3058 uint32_t CheckAllFractionalEnable : MOS_BITFIELD_BIT( 29 ); 3059 uint32_t HMECombineOverlap : MOS_BITFIELD_RANGE( 30,31 ); 3060 }; 3061 struct 3062 { 3063 uint32_t Value; 3064 }; 3065 } DW36; 3066 3067 // DW37 3068 union 3069 { 3070 struct 3071 { 3072 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 ); 3073 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 ); 3074 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 ); 3075 uint32_t : MOS_BITFIELD_RANGE( 3, 4 ); 3076 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 ); 3077 uint32_t : MOS_BITFIELD_BIT( 6 ); 3078 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 ); 3079 uint32_t : MOS_BITFIELD_RANGE( 8,23 ); 3080 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 ); 3081 }; 3082 struct 3083 { 3084 uint32_t Value; 3085 }; 3086 } DW37; 3087 3088 // DW38 3089 union 3090 { 3091 struct 3092 { 3093 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 ); 3094 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 ); 3095 uint32_t RefThreshold : MOS_BITFIELD_RANGE( 16,31 ); 3096 }; 3097 struct 3098 { 3099 uint32_t Value; 3100 }; 3101 } DW38; 3102 3103 // DW39 3104 union 3105 { 3106 struct 3107 { 3108 uint32_t : MOS_BITFIELD_RANGE( 0, 7 ); 3109 uint32_t HMERefWindowsCombThreshold : MOS_BITFIELD_RANGE( 8,15 ); 3110 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 ); 3111 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 ); 3112 }; 3113 struct 3114 { 3115 uint32_t Value; 3116 }; 3117 } DW39; 3118 3119 // DW40 3120 union 3121 { 3122 struct 3123 { 3124 uint32_t DistScaleFactorRefID0List0 : MOS_BITFIELD_RANGE( 0,15 ); 3125 uint32_t DistScaleFactorRefID1List0 : MOS_BITFIELD_RANGE( 16,31 ); 3126 }; 3127 struct 3128 { 3129 uint32_t Value; 3130 }; 3131 } DW40; 3132 3133 // DW41 3134 union 3135 { 3136 struct 3137 { 3138 uint32_t DistScaleFactorRefID2List0 : MOS_BITFIELD_RANGE( 0,15 ); 3139 uint32_t DistScaleFactorRefID3List0 : MOS_BITFIELD_RANGE( 16,31 ); 3140 }; 3141 struct 3142 { 3143 uint32_t Value; 3144 }; 3145 } DW41; 3146 3147 // DW42 3148 union 3149 { 3150 struct 3151 { 3152 uint32_t DistScaleFactorRefID4List0 : MOS_BITFIELD_RANGE( 0,15 ); 3153 uint32_t DistScaleFactorRefID5List0 : MOS_BITFIELD_RANGE( 16,31 ); 3154 }; 3155 struct 3156 { 3157 uint32_t Value; 3158 }; 3159 } DW42; 3160 3161 // DW43 3162 union 3163 { 3164 struct 3165 { 3166 uint32_t DistScaleFactorRefID6List0 : MOS_BITFIELD_RANGE( 0,15 ); 3167 uint32_t DistScaleFactorRefID7List0 : MOS_BITFIELD_RANGE( 16,31 ); 3168 }; 3169 struct 3170 { 3171 uint32_t Value; 3172 }; 3173 } DW43; 3174 3175 // DW44 3176 union 3177 { 3178 struct 3179 { 3180 uint32_t ActualQPValueForRefID0List0 : MOS_BITFIELD_RANGE( 0, 7 ); 3181 uint32_t ActualQPValueForRefID1List0 : MOS_BITFIELD_RANGE( 8,15 ); 3182 uint32_t ActualQPValueForRefID2List0 : MOS_BITFIELD_RANGE( 16,23 ); 3183 uint32_t ActualQPValueForRefID3List0 : MOS_BITFIELD_RANGE( 24,31 ); 3184 }; 3185 struct 3186 { 3187 uint32_t Value; 3188 }; 3189 } DW44; 3190 3191 // DW45 3192 union 3193 { 3194 struct 3195 { 3196 uint32_t ActualQPValueForRefID4List0 : MOS_BITFIELD_RANGE( 0, 7 ); 3197 uint32_t ActualQPValueForRefID5List0 : MOS_BITFIELD_RANGE( 8,15 ); 3198 uint32_t ActualQPValueForRefID6List0 : MOS_BITFIELD_RANGE( 16,23 ); 3199 uint32_t ActualQPValueForRefID7List0 : MOS_BITFIELD_RANGE( 24,31 ); 3200 }; 3201 struct 3202 { 3203 uint32_t Value; 3204 }; 3205 } DW45; 3206 3207 // DW46 3208 union 3209 { 3210 struct 3211 { 3212 uint32_t ActualQPValueForRefID0List1 : MOS_BITFIELD_RANGE( 0, 7 ); 3213 uint32_t ActualQPValueForRefID1List1 : MOS_BITFIELD_RANGE( 8,15 ); 3214 uint32_t RefCost : MOS_BITFIELD_RANGE( 16,31 ); 3215 }; 3216 struct 3217 { 3218 uint32_t Value; 3219 }; 3220 } DW46; 3221 3222 // DW47 3223 union 3224 { 3225 struct 3226 { 3227 uint32_t MbQpReadFactor : MOS_BITFIELD_RANGE( 0, 7 ); 3228 uint32_t IntraCostSF : MOS_BITFIELD_RANGE( 8,15 ); 3229 uint32_t MaxVmvR : MOS_BITFIELD_RANGE( 16,31 ); 3230 }; 3231 struct 3232 { 3233 uint32_t Value; 3234 }; 3235 } DW47; 3236 3237 //DW48 3238 union 3239 { 3240 struct 3241 { 3242 uint32_t IntraRefreshMBNum : MOS_BITFIELD_RANGE( 0,15 ); 3243 uint32_t IntraRefreshUnitInMBMinus1 : MOS_BITFIELD_RANGE( 16,23 ); 3244 uint32_t IntraRefreshQPDelta : MOS_BITFIELD_RANGE( 24,31 ); 3245 }; 3246 struct 3247 { 3248 uint32_t Value; 3249 }; 3250 } DW48; 3251 3252 // DW49 3253 union 3254 { 3255 struct 3256 { 3257 uint32_t ROI1_X_left : MOS_BITFIELD_RANGE( 0,15 ); 3258 uint32_t ROI1_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 3259 }; 3260 struct 3261 { 3262 uint32_t Value; 3263 }; 3264 } DW49; 3265 3266 // DW50 3267 union 3268 { 3269 struct 3270 { 3271 uint32_t ROI1_X_right : MOS_BITFIELD_RANGE( 0,15 ); 3272 uint32_t ROI1_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 3273 }; 3274 struct 3275 { 3276 uint32_t Value; 3277 }; 3278 } DW50; 3279 3280 // DW51 3281 union 3282 { 3283 struct 3284 { 3285 uint32_t ROI2_X_left : MOS_BITFIELD_RANGE( 0,15 ); 3286 uint32_t ROI2_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 3287 }; 3288 struct 3289 { 3290 uint32_t Value; 3291 }; 3292 } DW51; 3293 3294 // DW52 3295 union 3296 { 3297 struct 3298 { 3299 uint32_t ROI2_X_right : MOS_BITFIELD_RANGE( 0,15 ); 3300 uint32_t ROI2_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 3301 }; 3302 struct 3303 { 3304 uint32_t Value; 3305 }; 3306 } DW52; 3307 3308 // DW53 3309 union 3310 { 3311 struct 3312 { 3313 uint32_t ROI3_X_left : MOS_BITFIELD_RANGE( 0,15 ); 3314 uint32_t ROI3_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 3315 }; 3316 struct 3317 { 3318 uint32_t Value; 3319 }; 3320 } DW53; 3321 3322 // DW54 3323 union 3324 { 3325 struct 3326 { 3327 uint32_t ROI3_X_right : MOS_BITFIELD_RANGE( 0,15 ); 3328 uint32_t ROI3_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 3329 }; 3330 struct 3331 { 3332 uint32_t Value; 3333 }; 3334 } DW54; 3335 3336 // DW55 3337 union 3338 { 3339 struct 3340 { 3341 uint32_t ROI4_X_left : MOS_BITFIELD_RANGE( 0,15 ); 3342 uint32_t ROI4_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 3343 }; 3344 struct 3345 { 3346 uint32_t Value; 3347 }; 3348 } DW55; 3349 3350 // DW56 3351 union 3352 { 3353 struct 3354 { 3355 uint32_t ROI4_X_right : MOS_BITFIELD_RANGE( 0,15 ); 3356 uint32_t ROI4_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 3357 }; 3358 struct 3359 { 3360 uint32_t Value; 3361 }; 3362 } DW56; 3363 3364 // DW57 3365 union 3366 { 3367 struct 3368 { 3369 uint32_t ROI1_dQpPrimeY : MOS_BITFIELD_RANGE( 0, 7 ); 3370 uint32_t ROI2_dQpPrimeY : MOS_BITFIELD_RANGE( 8,15 ); 3371 uint32_t ROI3_dQpPrimeY : MOS_BITFIELD_RANGE( 16,23 ); 3372 uint32_t ROI4_dQpPrimeY : MOS_BITFIELD_RANGE( 24,31 ); 3373 }; 3374 struct 3375 { 3376 uint32_t Value; 3377 }; 3378 } DW57; 3379 3380 // DW58 3381 union 3382 { 3383 struct 3384 { 3385 uint32_t MBTextureThreshold : MOS_BITFIELD_RANGE( 0,15 ); 3386 uint32_t TxDecisonThreshold : MOS_BITFIELD_RANGE( 16,31 ); 3387 }; 3388 struct 3389 { 3390 uint32_t Value; 3391 }; 3392 } DW58; 3393 3394 // DW59 3395 union 3396 { 3397 struct 3398 { 3399 uint32_t HMEMVCostScalingFactor : MOS_BITFIELD_RANGE( 0, 7 ); 3400 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,31 ); 3401 }; 3402 struct 3403 { 3404 uint32_t Value; 3405 }; 3406 } DW59; 3407 3408 // DW60 3409 union 3410 { 3411 struct 3412 { 3413 uint32_t IPCM_QP0 : MOS_BITFIELD_RANGE( 0, 7 ); 3414 uint32_t IPCM_QP1 : MOS_BITFIELD_RANGE( 8,15 ); 3415 uint32_t IPCM_QP2 : MOS_BITFIELD_RANGE( 16,23 ); 3416 uint32_t IPCM_QP3 : MOS_BITFIELD_RANGE( 24,31 ); 3417 }; 3418 struct 3419 { 3420 uint32_t Value; 3421 }; 3422 } DW60; 3423 3424 // DW61 3425 union 3426 { 3427 struct 3428 { 3429 uint32_t IPCM_QP4 : MOS_BITFIELD_RANGE( 0, 7 ); 3430 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,15 ); 3431 uint32_t IPCM_Thresh0 : MOS_BITFIELD_RANGE( 16,31 ); 3432 }; 3433 struct 3434 { 3435 uint32_t Value; 3436 }; 3437 } DW61; 3438 3439 // DW62 3440 union 3441 { 3442 struct 3443 { 3444 uint32_t IPCM_Thresh1 : MOS_BITFIELD_RANGE( 0,15 ); 3445 uint32_t IPCM_Thresh2 : MOS_BITFIELD_RANGE( 16,31 ); 3446 }; 3447 struct 3448 { 3449 uint32_t Value; 3450 }; 3451 } DW62; 3452 3453 // DW63 3454 union 3455 { 3456 struct 3457 { 3458 uint32_t IPCM_Thresh3 : MOS_BITFIELD_RANGE( 0,15 ); 3459 uint32_t IPCM_Thresh4 : MOS_BITFIELD_RANGE( 16,31 ); 3460 }; 3461 struct 3462 { 3463 uint32_t Value; 3464 }; 3465 } DW63; 3466 3467 // DW64 3468 union 3469 { 3470 struct 3471 { 3472 uint32_t NumMVPredictorsL0 : MOS_BITFIELD_RANGE( 0, 3 ); 3473 uint32_t FEIEnable : MOS_BITFIELD_BIT( 4 ); 3474 uint32_t MultipleMVPredictorPerMBEnable : MOS_BITFIELD_BIT( 5 ); 3475 uint32_t VMEDistortionOutputEnable : MOS_BITFIELD_BIT( 6 ); 3476 uint32_t PerMBQpEnable : MOS_BITFIELD_BIT( 7 ); 3477 uint32_t MBInputEnable : MOS_BITFIELD_BIT( 8 ); 3478 uint32_t FEIMode : MOS_BITFIELD_BIT( 9 ); 3479 uint32_t NumMVPredictorsL1 : MOS_BITFIELD_RANGE( 10,13 ); 3480 uint32_t Reserved : MOS_BITFIELD_RANGE( 14,24 ); 3481 uint32_t L1ListRef0PictureCodingType : MOS_BITFIELD_RANGE( 25,26 ); // PAFF WA Fix, 0-invalid, 1-TFF, 2-invalid, 3-BFF 3482 uint32_t Reserved1 : MOS_BITFIELD_RANGE( 27,31 ); 3483 }; 3484 struct 3485 { 3486 uint32_t Value; 3487 }; 3488 } DW64; 3489 3490 // DW65 3491 union 3492 { 3493 struct 3494 { 3495 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3496 }; 3497 struct 3498 { 3499 uint32_t Value; 3500 }; 3501 } DW65; 3502 3503 // DW66 3504 union 3505 { 3506 struct 3507 { 3508 uint32_t BottomFieldOffsetL1ListRef0MV : MOS_BITFIELD_RANGE( 0,31 ); 3509 }; 3510 struct 3511 { 3512 uint32_t Value; 3513 }; 3514 } DW66; 3515 3516 // DW67 3517 union 3518 { 3519 struct 3520 { 3521 uint32_t BottomFieldOffsetL1ListRef0MBCode : MOS_BITFIELD_RANGE( 0,31 ); 3522 }; 3523 struct 3524 { 3525 uint32_t Value; 3526 }; 3527 } DW67; 3528 3529 // DW68 3530 union 3531 { 3532 struct 3533 { 3534 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3535 }; 3536 struct 3537 { 3538 uint32_t Value; 3539 }; 3540 } DW68; 3541 3542 // DW69 3543 union 3544 { 3545 struct 3546 { 3547 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3548 }; 3549 struct 3550 { 3551 uint32_t Value; 3552 }; 3553 } DW69; 3554 3555 // DW70 3556 union 3557 { 3558 struct 3559 { 3560 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3561 }; 3562 struct 3563 { 3564 uint32_t Value; 3565 }; 3566 } DW70; 3567 3568 // DW71 3569 union 3570 { 3571 struct 3572 { 3573 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3574 }; 3575 struct 3576 { 3577 uint32_t Value; 3578 }; 3579 } DW71; 3580 3581 // DW72 3582 union 3583 { 3584 struct 3585 { 3586 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3587 }; 3588 struct 3589 { 3590 uint32_t Value; 3591 }; 3592 } DW72; 3593 3594 // DW73 3595 union 3596 { 3597 struct 3598 { 3599 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3600 }; 3601 struct 3602 { 3603 uint32_t Value; 3604 }; 3605 } DW73; 3606 3607 // DW74 3608 union 3609 { 3610 struct 3611 { 3612 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3613 }; 3614 struct 3615 { 3616 uint32_t Value; 3617 }; 3618 } DW74; 3619 3620 // DW75 3621 union 3622 { 3623 struct 3624 { 3625 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3626 }; 3627 struct 3628 { 3629 uint32_t Value; 3630 }; 3631 } DW75; 3632 3633 // DW76 3634 union 3635 { 3636 struct 3637 { 3638 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3639 }; 3640 struct 3641 { 3642 uint32_t Value; 3643 }; 3644 } DW76; 3645 3646 // DW77 3647 union 3648 { 3649 struct 3650 { 3651 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3652 }; 3653 struct 3654 { 3655 uint32_t Value; 3656 }; 3657 } DW77; 3658 3659 // DW78 3660 union 3661 { 3662 struct 3663 { 3664 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3665 }; 3666 struct 3667 { 3668 uint32_t Value; 3669 }; 3670 } DW78; 3671 3672 // DW79 3673 union 3674 { 3675 struct 3676 { 3677 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3678 }; 3679 struct 3680 { 3681 uint32_t Value; 3682 }; 3683 } DW79; 3684 3685 // DW80 3686 union 3687 { 3688 struct 3689 { 3690 uint32_t MBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3691 }; 3692 struct 3693 { 3694 uint32_t Value; 3695 }; 3696 } DW80; 3697 3698 // DW81 3699 union 3700 { 3701 struct 3702 { 3703 uint32_t MVDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3704 }; 3705 struct 3706 { 3707 uint32_t Value; 3708 }; 3709 } DW81; 3710 3711 // DW82 3712 union 3713 { 3714 struct 3715 { 3716 uint32_t IDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3717 }; 3718 struct 3719 { 3720 uint32_t Value; 3721 }; 3722 } DW82; 3723 3724 // DW83 3725 union 3726 { 3727 struct 3728 { 3729 uint32_t SrcYSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3730 }; 3731 struct 3732 { 3733 uint32_t Value; 3734 }; 3735 } DW83; 3736 3737 // DW84 3738 union 3739 { 3740 struct 3741 { 3742 uint32_t MBSpecificDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3743 }; 3744 struct 3745 { 3746 uint32_t Value; 3747 }; 3748 } DW84; 3749 3750 // DW85 3751 union 3752 { 3753 struct 3754 { 3755 uint32_t AuxVmeOutSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3756 }; 3757 struct 3758 { 3759 uint32_t Value; 3760 }; 3761 } DW85; 3762 3763 // DW86 3764 union 3765 { 3766 struct 3767 { 3768 uint32_t CurrRefPicSelSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3769 }; 3770 struct 3771 { 3772 uint32_t Value; 3773 }; 3774 } DW86; 3775 3776 // DW87 3777 union 3778 { 3779 struct 3780 { 3781 uint32_t HMEMVPredFwdBwdSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3782 }; 3783 struct 3784 { 3785 uint32_t Value; 3786 }; 3787 } DW87; 3788 3789 // DW88 3790 union 3791 { 3792 struct 3793 { 3794 uint32_t HMEDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3795 }; 3796 struct 3797 { 3798 uint32_t Value; 3799 }; 3800 } DW88; 3801 3802 // DW89 3803 union 3804 { 3805 struct 3806 { 3807 uint32_t SliceMapSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3808 }; 3809 struct 3810 { 3811 uint32_t Value; 3812 }; 3813 } DW89; 3814 3815 // DW90 3816 union 3817 { 3818 struct 3819 { 3820 uint32_t FwdFrmMBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3821 }; 3822 struct 3823 { 3824 uint32_t Value; 3825 }; 3826 } DW90; 3827 3828 // DW91 3829 union 3830 { 3831 struct 3832 { 3833 uint32_t FwdFrmMVSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3834 }; 3835 struct 3836 { 3837 uint32_t Value; 3838 }; 3839 } DW91; 3840 3841 // DW92 3842 union 3843 { 3844 struct 3845 { 3846 uint32_t MBQPBuffer : MOS_BITFIELD_RANGE( 0,31 ); 3847 }; 3848 struct 3849 { 3850 uint32_t Value; 3851 }; 3852 } DW92; 3853 3854 // DW93 3855 union 3856 { 3857 struct 3858 { 3859 uint32_t MBBRCLut : MOS_BITFIELD_RANGE( 0,31 ); 3860 }; 3861 struct 3862 { 3863 uint32_t Value; 3864 }; 3865 } DW93; 3866 3867 // DW94 3868 union 3869 { 3870 struct 3871 { 3872 uint32_t VMEInterPredictionSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3873 }; 3874 struct 3875 { 3876 uint32_t Value; 3877 }; 3878 } DW94; 3879 3880 // DW95 3881 union 3882 { 3883 struct 3884 { 3885 uint32_t VMEInterPredictionMRSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3886 }; 3887 struct 3888 { 3889 uint32_t Value; 3890 }; 3891 } DW95; 3892 3893 // DW96 3894 union 3895 { 3896 struct 3897 { 3898 uint32_t MbStatsSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3899 }; 3900 struct 3901 { 3902 uint32_t Value; 3903 }; 3904 } DW96; 3905 3906 // DW97 3907 union 3908 { 3909 struct 3910 { 3911 uint32_t MADSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3912 }; 3913 struct 3914 { 3915 uint32_t Value; 3916 }; 3917 } DW97; 3918 3919 // DW98 3920 union 3921 { 3922 struct 3923 { 3924 uint32_t ForceNonSkipMBmapSurface : MOS_BITFIELD_RANGE( 0,31 ); 3925 }; 3926 struct 3927 { 3928 uint32_t Value; 3929 }; 3930 } DW98; 3931 3932 // DW99 3933 union 3934 { 3935 struct 3936 { 3937 uint32_t ReservedIndex : MOS_BITFIELD_RANGE( 0,31 ); 3938 }; 3939 struct 3940 { 3941 uint32_t Value; 3942 }; 3943 } DW99; 3944 3945 // DW100 3946 union 3947 { 3948 struct 3949 { 3950 uint32_t BRCCurbeSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3951 }; 3952 struct 3953 { 3954 uint32_t Value; 3955 }; 3956 } DW100; 3957 3958 // DW101 3959 union 3960 { 3961 struct 3962 { 3963 uint32_t StaticDetectionCostTableIndex : MOS_BITFIELD_RANGE( 0,31 ); 3964 }; 3965 struct 3966 { 3967 uint32_t Value; 3968 }; 3969 } DW101; 3970 3971 // DW102 3972 union 3973 { 3974 struct 3975 { 3976 uint32_t FEIMVPredictorSurfIndex : MOS_BITFIELD_RANGE( 0,31 ); 3977 }; 3978 struct 3979 { 3980 uint32_t Value; 3981 }; 3982 } DW102; 3983 3984 // DW103 3985 union 3986 { 3987 struct 3988 { 3989 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 3990 }; 3991 struct 3992 { 3993 uint32_t Value; 3994 }; 3995 } DW103; 3996 } CODECHAL_ENCODE_AVC_FEI_MBENC_STATIC_DATA_G9, *PCODECHAL_ENCODE_AVC_FEI_MBENC_STATIC_DATA_G9; 3997 3998 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_FEI_MBENC_STATIC_DATA_G9)) == CODECHAL_ENCODE_AVC_MBENC_CURBE_SIZE_IN_DWORD_G9); 3999 // AVC Gen 9 WP kernel CURBE, defined in Gen9 AVC WP Kernel 4000 typedef struct _CODECHAL_ENCODE_AVC_WP_CURBE_G9 4001 { 4002 // DW0 4003 union 4004 { 4005 struct 4006 { 4007 uint32_t DefaultWeight : MOS_BITFIELD_RANGE( 0,15 ); 4008 uint32_t DefaultOffset : MOS_BITFIELD_RANGE( 16,31 ); 4009 }; 4010 struct 4011 { 4012 uint32_t Value; 4013 }; 4014 } DW0; 4015 4016 // DW1 4017 union 4018 { 4019 struct 4020 { 4021 uint32_t ROI0_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4022 uint32_t ROI0_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4023 }; 4024 struct 4025 { 4026 uint32_t Value; 4027 }; 4028 } DW1; 4029 4030 // DW2 4031 union 4032 { 4033 struct 4034 { 4035 uint32_t ROI0_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4036 uint32_t ROI0_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4037 }; 4038 struct 4039 { 4040 uint32_t Value; 4041 }; 4042 } DW2; 4043 4044 // DW3 4045 union 4046 { 4047 struct 4048 { 4049 uint32_t ROI0Weight : MOS_BITFIELD_RANGE( 0,15 ); 4050 uint32_t ROI0Offset : MOS_BITFIELD_RANGE( 16,31 ); 4051 }; 4052 struct 4053 { 4054 uint32_t Value; 4055 }; 4056 } DW3; 4057 4058 // DW4 4059 union 4060 { 4061 struct 4062 { 4063 uint32_t ROI1_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4064 uint32_t ROI1_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4065 }; 4066 struct 4067 { 4068 uint32_t Value; 4069 }; 4070 } DW4; 4071 4072 // DW5 4073 union 4074 { 4075 struct 4076 { 4077 uint32_t ROI1_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4078 uint32_t ROI1_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4079 }; 4080 struct 4081 { 4082 uint32_t Value; 4083 }; 4084 } DW5; 4085 4086 // DW6 4087 union 4088 { 4089 struct 4090 { 4091 uint32_t ROI1Weight : MOS_BITFIELD_RANGE( 0,15 ); 4092 uint32_t ROI1Offset : MOS_BITFIELD_RANGE( 16,31 ); 4093 }; 4094 struct 4095 { 4096 uint32_t Value; 4097 }; 4098 } DW6; 4099 4100 // DW7 4101 union 4102 { 4103 struct 4104 { 4105 uint32_t ROI2_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4106 uint32_t ROI2_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4107 }; 4108 struct 4109 { 4110 uint32_t Value; 4111 }; 4112 } DW7; 4113 4114 // DW8 4115 union 4116 { 4117 struct 4118 { 4119 uint32_t ROI2_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4120 uint32_t ROI2_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4121 }; 4122 struct 4123 { 4124 uint32_t Value; 4125 }; 4126 } DW8; 4127 4128 // DW9 4129 union 4130 { 4131 struct 4132 { 4133 uint32_t ROI2Weight : MOS_BITFIELD_RANGE( 0,15 ); 4134 uint32_t ROI2Offset : MOS_BITFIELD_RANGE( 16,31 ); 4135 }; 4136 struct 4137 { 4138 uint32_t Value; 4139 }; 4140 } DW9; 4141 4142 // DW10 4143 union 4144 { 4145 struct 4146 { 4147 uint32_t ROI3_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4148 uint32_t ROI3_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4149 }; 4150 struct 4151 { 4152 uint32_t Value; 4153 }; 4154 } DW10; 4155 4156 // DW11 4157 union 4158 { 4159 struct 4160 { 4161 uint32_t ROI3_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4162 uint32_t ROI3_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4163 }; 4164 struct 4165 { 4166 uint32_t Value; 4167 }; 4168 } DW11; 4169 4170 // DW12 4171 union 4172 { 4173 struct 4174 { 4175 uint32_t ROI3Weight : MOS_BITFIELD_RANGE( 0,15 ); 4176 uint32_t ROI3Offset : MOS_BITFIELD_RANGE( 16,31 ); 4177 }; 4178 struct 4179 { 4180 uint32_t Value; 4181 }; 4182 } DW12; 4183 4184 // DW13 4185 union 4186 { 4187 struct 4188 { 4189 uint32_t ROI4_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4190 uint32_t ROI4_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4191 }; 4192 struct 4193 { 4194 uint32_t Value; 4195 }; 4196 } DW13; 4197 4198 // DW14 4199 union 4200 { 4201 struct 4202 { 4203 uint32_t ROI4_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4204 uint32_t ROI4_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4205 }; 4206 struct 4207 { 4208 uint32_t Value; 4209 }; 4210 } DW14; 4211 4212 // DW15 4213 union 4214 { 4215 struct 4216 { 4217 uint32_t ROI4Weight : MOS_BITFIELD_RANGE( 0,15 ); 4218 uint32_t ROI4Offset : MOS_BITFIELD_RANGE( 16,31 ); 4219 }; 4220 struct 4221 { 4222 uint32_t Value; 4223 }; 4224 } DW15; 4225 4226 // DW16 4227 union 4228 { 4229 struct 4230 { 4231 uint32_t ROI5_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4232 uint32_t ROI5_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4233 }; 4234 struct 4235 { 4236 uint32_t Value; 4237 }; 4238 } DW16; 4239 4240 // DW17 4241 union 4242 { 4243 struct 4244 { 4245 uint32_t ROI5_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4246 uint32_t ROI5_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4247 }; 4248 struct 4249 { 4250 uint32_t Value; 4251 }; 4252 } DW17; 4253 4254 // DW18 4255 union 4256 { 4257 struct 4258 { 4259 uint32_t ROI5Weight : MOS_BITFIELD_RANGE( 0,15 ); 4260 uint32_t ROI5Offset : MOS_BITFIELD_RANGE( 16,31 ); 4261 }; 4262 struct 4263 { 4264 uint32_t Value; 4265 }; 4266 } DW18; 4267 4268 // DW19 4269 union 4270 { 4271 struct 4272 { 4273 uint32_t ROI6_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4274 uint32_t ROI6_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4275 }; 4276 struct 4277 { 4278 uint32_t Value; 4279 }; 4280 } DW19; 4281 4282 // DW20 4283 union 4284 { 4285 struct 4286 { 4287 uint32_t ROI6_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4288 uint32_t ROI6_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4289 }; 4290 struct 4291 { 4292 uint32_t Value; 4293 }; 4294 } DW20; 4295 4296 // DW21 4297 union 4298 { 4299 struct 4300 { 4301 uint32_t ROI6Weight : MOS_BITFIELD_RANGE( 0,15 ); 4302 uint32_t ROI6Offset : MOS_BITFIELD_RANGE( 16,31 ); 4303 }; 4304 struct 4305 { 4306 uint32_t Value; 4307 }; 4308 } DW21; 4309 4310 // DW22 4311 union 4312 { 4313 struct 4314 { 4315 uint32_t ROI7_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4316 uint32_t ROI7_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4317 }; 4318 struct 4319 { 4320 uint32_t Value; 4321 }; 4322 } DW22; 4323 4324 // DW23 4325 union 4326 { 4327 struct 4328 { 4329 uint32_t ROI7_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4330 uint32_t ROI7_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4331 }; 4332 struct 4333 { 4334 uint32_t Value; 4335 }; 4336 } DW23; 4337 4338 // DW24 4339 union 4340 { 4341 struct 4342 { 4343 uint32_t ROI7Weight : MOS_BITFIELD_RANGE( 0,15 ); 4344 uint32_t ROI7Offset : MOS_BITFIELD_RANGE( 16,31 ); 4345 }; 4346 struct 4347 { 4348 uint32_t Value; 4349 }; 4350 } DW24; 4351 4352 // DW25 4353 union 4354 { 4355 struct 4356 { 4357 uint32_t ROI8_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4358 uint32_t ROI8_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4359 }; 4360 struct 4361 { 4362 uint32_t Value; 4363 }; 4364 } DW25; 4365 4366 // DW26 4367 union 4368 { 4369 struct 4370 { 4371 uint32_t ROI8_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4372 uint32_t ROI8_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4373 }; 4374 struct 4375 { 4376 uint32_t Value; 4377 }; 4378 } DW26; 4379 4380 // DW27 4381 union 4382 { 4383 struct 4384 { 4385 uint32_t ROI8Weight : MOS_BITFIELD_RANGE( 0,15 ); 4386 uint32_t ROI8Offset : MOS_BITFIELD_RANGE( 16,31 ); 4387 }; 4388 struct 4389 { 4390 uint32_t Value; 4391 }; 4392 } DW27; 4393 4394 // DW28 4395 union 4396 { 4397 struct 4398 { 4399 uint32_t ROI9_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4400 uint32_t ROI9_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4401 }; 4402 struct 4403 { 4404 uint32_t Value; 4405 }; 4406 } DW28; 4407 4408 // DW29 4409 union 4410 { 4411 struct 4412 { 4413 uint32_t ROI9_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4414 uint32_t ROI9_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4415 }; 4416 struct 4417 { 4418 uint32_t Value; 4419 }; 4420 } DW29; 4421 4422 // DW30 4423 union 4424 { 4425 struct 4426 { 4427 uint32_t ROI9Weight : MOS_BITFIELD_RANGE( 0,15 ); 4428 uint32_t ROI9Offset : MOS_BITFIELD_RANGE( 16,31 ); 4429 }; 4430 struct 4431 { 4432 uint32_t Value; 4433 }; 4434 } DW30; 4435 4436 // DW31 4437 union 4438 { 4439 struct 4440 { 4441 uint32_t ROI10_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4442 uint32_t ROI10_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4443 }; 4444 struct 4445 { 4446 uint32_t Value; 4447 }; 4448 } DW31; 4449 4450 // DW32 4451 union 4452 { 4453 struct 4454 { 4455 uint32_t ROI10_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4456 uint32_t ROI10_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4457 }; 4458 struct 4459 { 4460 uint32_t Value; 4461 }; 4462 } DW32; 4463 4464 // DW33 4465 union 4466 { 4467 struct 4468 { 4469 uint32_t ROI10Weight : MOS_BITFIELD_RANGE( 0,15 ); 4470 uint32_t ROI10Offset : MOS_BITFIELD_RANGE( 16,31 ); 4471 }; 4472 struct 4473 { 4474 uint32_t Value; 4475 }; 4476 } DW33; 4477 4478 // DW34 4479 union 4480 { 4481 struct 4482 { 4483 uint32_t ROI11_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4484 uint32_t ROI11_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4485 }; 4486 struct 4487 { 4488 uint32_t Value; 4489 }; 4490 } DW34; 4491 4492 // DW35 4493 union 4494 { 4495 struct 4496 { 4497 uint32_t ROI11_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4498 uint32_t ROI11_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4499 }; 4500 struct 4501 { 4502 uint32_t Value; 4503 }; 4504 } DW35; 4505 4506 // DW36 4507 union 4508 { 4509 struct 4510 { 4511 uint32_t ROI11Weight : MOS_BITFIELD_RANGE( 0,15 ); 4512 uint32_t ROI11Offset : MOS_BITFIELD_RANGE( 16,31 ); 4513 }; 4514 struct 4515 { 4516 uint32_t Value; 4517 }; 4518 } DW36; 4519 4520 // DW37 4521 union 4522 { 4523 struct 4524 { 4525 uint32_t ROI12_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4526 uint32_t ROI12_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4527 }; 4528 struct 4529 { 4530 uint32_t Value; 4531 }; 4532 } DW37; 4533 4534 // DW38 4535 union 4536 { 4537 struct 4538 { 4539 uint32_t ROI12_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4540 uint32_t ROI12_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4541 }; 4542 struct 4543 { 4544 uint32_t Value; 4545 }; 4546 } DW38; 4547 4548 // DW39 4549 union 4550 { 4551 struct 4552 { 4553 uint32_t ROI12Weight : MOS_BITFIELD_RANGE( 0,15 ); 4554 uint32_t ROI12Offset : MOS_BITFIELD_RANGE( 16,31 ); 4555 }; 4556 struct 4557 { 4558 uint32_t Value; 4559 }; 4560 } DW39; 4561 4562 // DW40 4563 union 4564 { 4565 struct 4566 { 4567 uint32_t ROI13_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4568 uint32_t ROI13_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4569 }; 4570 struct 4571 { 4572 uint32_t Value; 4573 }; 4574 } DW40; 4575 4576 // DW41 4577 union 4578 { 4579 struct 4580 { 4581 uint32_t ROI13_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4582 uint32_t ROI13_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4583 }; 4584 struct 4585 { 4586 uint32_t Value; 4587 }; 4588 } DW41; 4589 4590 // DW42 4591 union 4592 { 4593 struct 4594 { 4595 uint32_t ROI13Weight : MOS_BITFIELD_RANGE( 0,15 ); 4596 uint32_t ROI13Offset : MOS_BITFIELD_RANGE( 16,31 ); 4597 }; 4598 struct 4599 { 4600 uint32_t Value; 4601 }; 4602 } DW42; 4603 4604 // DW43 4605 union 4606 { 4607 struct 4608 { 4609 uint32_t ROI14_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4610 uint32_t ROI14_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4611 }; 4612 struct 4613 { 4614 uint32_t Value; 4615 }; 4616 } DW43; 4617 4618 // DW44 4619 union 4620 { 4621 struct 4622 { 4623 uint32_t ROI14_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4624 uint32_t ROI14_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4625 }; 4626 struct 4627 { 4628 uint32_t Value; 4629 }; 4630 } DW44; 4631 4632 // DW45 4633 union 4634 { 4635 struct 4636 { 4637 uint32_t ROI14Weight : MOS_BITFIELD_RANGE( 0,15 ); 4638 uint32_t ROI14Offset : MOS_BITFIELD_RANGE( 16,31 ); 4639 }; 4640 struct 4641 { 4642 uint32_t Value; 4643 }; 4644 } DW45; 4645 4646 // DW46 4647 union 4648 { 4649 struct 4650 { 4651 uint32_t ROI15_X_left : MOS_BITFIELD_RANGE( 0,15 ); 4652 uint32_t ROI15_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 4653 }; 4654 struct 4655 { 4656 uint32_t Value; 4657 }; 4658 } DW46; 4659 4660 // DW47 4661 union 4662 { 4663 struct 4664 { 4665 uint32_t ROI15_X_right : MOS_BITFIELD_RANGE( 0,15 ); 4666 uint32_t ROI15_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 4667 }; 4668 struct 4669 { 4670 uint32_t Value; 4671 }; 4672 } DW47; 4673 4674 // DW48 4675 union 4676 { 4677 struct 4678 { 4679 uint32_t ROI15Weight : MOS_BITFIELD_RANGE( 0,15 ); 4680 uint32_t ROI15Offset : MOS_BITFIELD_RANGE( 16,31 ); 4681 }; 4682 struct 4683 { 4684 uint32_t Value; 4685 }; 4686 } DW48; 4687 4688 // DW49 4689 union 4690 { 4691 struct 4692 { 4693 uint32_t Log2WeightDenom : MOS_BITFIELD_RANGE( 0,2 ); 4694 uint32_t reserve1 : MOS_BITFIELD_RANGE( 3,7 ); 4695 uint32_t ROI_enabled : MOS_BITFIELD_RANGE( 8,8 ); 4696 uint32_t reserve2 : MOS_BITFIELD_RANGE( 9,31 ); 4697 }; 4698 struct 4699 { 4700 uint32_t Value; 4701 }; 4702 } DW49; 4703 4704 // DW50 4705 union 4706 { 4707 struct 4708 { 4709 uint32_t InputSurface : MOS_BITFIELD_RANGE( 0,31 ); 4710 }; 4711 struct 4712 { 4713 uint32_t Value; 4714 }; 4715 } DW50; 4716 4717 // DW51 4718 union 4719 { 4720 struct 4721 { 4722 uint32_t OutputSurface : MOS_BITFIELD_RANGE( 0,31 ); 4723 }; 4724 struct 4725 { 4726 uint32_t Value; 4727 }; 4728 } DW51; 4729 4730 } CODECHAL_ENCODE_AVC_WP_CURBE_G9, *PCODECHAL_ENCODE_AVC_WP_CURBE_G9; 4731 4732 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_WP_CURBE_G9)) == 52); 4733 4734 typedef struct _CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9 4735 { 4736 union 4737 { 4738 struct 4739 { 4740 uint32_t TargetSize : MOS_BITFIELD_RANGE( 0,31 ); 4741 }; 4742 struct 4743 { 4744 uint32_t Value; 4745 }; 4746 } DW0; 4747 4748 union 4749 { 4750 struct 4751 { 4752 uint32_t FrameNumber : MOS_BITFIELD_RANGE( 0,31 ); 4753 }; 4754 struct 4755 { 4756 uint32_t Value; 4757 }; 4758 } DW1; 4759 4760 union 4761 { 4762 struct 4763 { 4764 uint32_t SizeofPicHeaders : MOS_BITFIELD_RANGE( 0,31 ); 4765 }; 4766 struct 4767 { 4768 uint32_t Value; 4769 }; 4770 } DW2; 4771 4772 union 4773 { 4774 struct 4775 { 4776 uint32_t startGAdjFrame0 : MOS_BITFIELD_RANGE( 0,15 ); 4777 uint32_t startGAdjFrame1 : MOS_BITFIELD_RANGE( 16,31 ); 4778 }; 4779 struct 4780 { 4781 uint32_t Value; 4782 }; 4783 } DW3; 4784 4785 union 4786 { 4787 struct 4788 { 4789 uint32_t startGAdjFrame2 : MOS_BITFIELD_RANGE( 0,15 ); 4790 uint32_t startGAdjFrame3 : MOS_BITFIELD_RANGE( 16,31 ); 4791 }; 4792 struct 4793 { 4794 uint32_t Value; 4795 }; 4796 } DW4; 4797 4798 union 4799 { 4800 struct 4801 { 4802 uint32_t TargetSizeFlag : MOS_BITFIELD_RANGE( 0, 7 ); 4803 uint32_t BRCFlag : MOS_BITFIELD_RANGE( 8,15 ); 4804 uint32_t MaxNumPAKs : MOS_BITFIELD_RANGE( 16,23 ); 4805 uint32_t CurrFrameType : MOS_BITFIELD_RANGE( 24,31 ); 4806 }; 4807 struct 4808 { 4809 uint32_t Value; 4810 }; 4811 } DW5; 4812 4813 union 4814 { 4815 struct 4816 { 4817 uint32_t NumSkipFrames : MOS_BITFIELD_RANGE( 0, 7 ); 4818 uint32_t MinimumQP : MOS_BITFIELD_RANGE( 8,15 ); 4819 uint32_t MaximumQP : MOS_BITFIELD_RANGE( 16,23 ); 4820 uint32_t EnableForceToSkip : MOS_BITFIELD_BIT( 24 ); 4821 uint32_t EnableSlidingWindow : MOS_BITFIELD_BIT( 25 ); 4822 uint32_t EnableExtremLowDelay : MOS_BITFIELD_BIT( 26 ); 4823 uint32_t Reserved : MOS_BITFIELD_RANGE( 27,31 ); 4824 }; 4825 struct 4826 { 4827 uint32_t Value; 4828 }; 4829 } DW6; 4830 4831 union 4832 { 4833 struct 4834 { 4835 uint32_t SizeSkipFrames : MOS_BITFIELD_RANGE( 0,31 ); 4836 }; 4837 struct 4838 { 4839 uint32_t Value; 4840 }; 4841 } DW7; 4842 4843 union 4844 { 4845 struct 4846 { 4847 uint32_t StartGlobalAdjustMult0 : MOS_BITFIELD_RANGE( 0, 7 ); 4848 uint32_t StartGlobalAdjustMult1 : MOS_BITFIELD_RANGE( 8,15 ); 4849 uint32_t StartGlobalAdjustMult2 : MOS_BITFIELD_RANGE( 16,23 ); 4850 uint32_t StartGlobalAdjustMult3 : MOS_BITFIELD_RANGE( 24,31 ); 4851 }; 4852 struct 4853 { 4854 uint32_t Value; 4855 }; 4856 } DW8; 4857 4858 union 4859 { 4860 struct 4861 { 4862 uint32_t StartGlobalAdjustMult4 : MOS_BITFIELD_RANGE( 0, 7 ); 4863 uint32_t StartGlobalAdjustDiv0 : MOS_BITFIELD_RANGE( 8,15 ); 4864 uint32_t StartGlobalAdjustDiv1 : MOS_BITFIELD_RANGE( 16,23 ); 4865 uint32_t StartGlobalAdjustDiv2 : MOS_BITFIELD_RANGE( 24,31 ); 4866 }; 4867 struct 4868 { 4869 uint32_t Value; 4870 }; 4871 } DW9; 4872 4873 union 4874 { 4875 struct 4876 { 4877 uint32_t StartGlobalAdjustDiv3 : MOS_BITFIELD_RANGE( 0, 7 ); 4878 uint32_t StartGlobalAdjustDiv4 : MOS_BITFIELD_RANGE( 8,15 ); 4879 uint32_t QPThreshold0 : MOS_BITFIELD_RANGE( 16,23 ); 4880 uint32_t QPThreshold1 : MOS_BITFIELD_RANGE( 24,31 ); 4881 }; 4882 struct 4883 { 4884 uint32_t Value; 4885 }; 4886 } DW10; 4887 4888 union 4889 { 4890 struct 4891 { 4892 uint32_t QPThreshold2 : MOS_BITFIELD_RANGE( 0, 7 ); 4893 uint32_t QPThreshold3 : MOS_BITFIELD_RANGE( 8,15 ); 4894 uint32_t gRateRatioThreshold0 : MOS_BITFIELD_RANGE( 16,23 ); 4895 uint32_t gRateRatioThreshold1 : MOS_BITFIELD_RANGE( 24,31 ); 4896 }; 4897 struct 4898 { 4899 uint32_t Value; 4900 }; 4901 } DW11; 4902 4903 union 4904 { 4905 struct 4906 { 4907 uint32_t gRateRatioThreshold2 : MOS_BITFIELD_RANGE( 0, 7 ); 4908 uint32_t gRateRatioThreshold3 : MOS_BITFIELD_RANGE( 8,15 ); 4909 uint32_t gRateRatioThreshold4 : MOS_BITFIELD_RANGE( 16,23 ); 4910 uint32_t gRateRatioThreshold5 : MOS_BITFIELD_RANGE( 24,31 ); 4911 }; 4912 struct 4913 { 4914 uint32_t Value; 4915 }; 4916 } DW12; 4917 4918 union 4919 { 4920 struct 4921 { 4922 uint32_t gRateRatioThresholdQP0 : MOS_BITFIELD_RANGE( 0, 7 ); 4923 uint32_t gRateRatioThresholdQP1 : MOS_BITFIELD_RANGE( 8,15 ); 4924 uint32_t gRateRatioThresholdQP2 : MOS_BITFIELD_RANGE( 16,23 ); 4925 uint32_t gRateRatioThresholdQP3 : MOS_BITFIELD_RANGE( 24,31 ); 4926 }; 4927 struct 4928 { 4929 uint32_t Value; 4930 }; 4931 } DW13; 4932 4933 union 4934 { 4935 struct 4936 { 4937 uint32_t gRateRatioThresholdQP4 : MOS_BITFIELD_RANGE( 0, 7 ); 4938 uint32_t gRateRatioThresholdQP5 : MOS_BITFIELD_RANGE( 8,15 ); 4939 uint32_t gRateRatioThresholdQP6 : MOS_BITFIELD_RANGE( 16,23 ); 4940 uint32_t QPIndexOfCurPic : MOS_BITFIELD_RANGE( 24,31 ); 4941 }; 4942 struct 4943 { 4944 uint32_t Value; 4945 }; 4946 } DW14; 4947 4948 union 4949 { 4950 struct 4951 { 4952 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,7 ); 4953 uint32_t EnableROI : MOS_BITFIELD_RANGE( 8,15 ); 4954 uint32_t RoundingIntra : MOS_BITFIELD_RANGE( 16,23 ); 4955 uint32_t RoundingInter : MOS_BITFIELD_RANGE( 24,31 ); 4956 }; 4957 struct 4958 { 4959 uint32_t Value; 4960 }; 4961 } DW15; 4962 4963 union 4964 { 4965 struct 4966 { 4967 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 4968 }; 4969 struct 4970 { 4971 uint32_t Value; 4972 }; 4973 } DW16; 4974 4975 union 4976 { 4977 struct 4978 { 4979 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 4980 }; 4981 struct 4982 { 4983 uint32_t Value; 4984 }; 4985 } DW17; 4986 4987 union 4988 { 4989 struct 4990 { 4991 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 4992 }; 4993 struct 4994 { 4995 uint32_t Value; 4996 }; 4997 } DW18; 4998 4999 union 5000 { 5001 struct 5002 { 5003 uint32_t UserMaxFrame : MOS_BITFIELD_RANGE( 0,31 ); 5004 }; 5005 struct 5006 { 5007 uint32_t Value; 5008 }; 5009 } DW19; 5010 5011 union 5012 { 5013 struct 5014 { 5015 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5016 }; 5017 struct 5018 { 5019 uint32_t Value; 5020 }; 5021 } DW20; 5022 5023 union 5024 { 5025 struct 5026 { 5027 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5028 }; 5029 struct 5030 { 5031 uint32_t Value; 5032 }; 5033 } DW21; 5034 5035 union 5036 { 5037 struct 5038 { 5039 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5040 }; 5041 struct 5042 { 5043 uint32_t Value; 5044 }; 5045 } DW22; 5046 5047 union 5048 { 5049 struct 5050 { 5051 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5052 }; 5053 struct 5054 { 5055 uint32_t Value; 5056 }; 5057 } DW23; 5058 } CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9, *PCODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9; 5059 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(_CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9)) == 24); 5060 5061 typedef struct _CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9 5062 { 5063 union 5064 { 5065 struct 5066 { 5067 uint32_t CurrFrameType : MOS_BITFIELD_RANGE( 0, 7 ); 5068 uint32_t EnableROI : MOS_BITFIELD_RANGE( 8,15 ); 5069 uint32_t ROIRatio : MOS_BITFIELD_RANGE( 16,23 ); 5070 uint32_t Reserved : MOS_BITFIELD_RANGE( 24,31 ); 5071 }; 5072 struct 5073 { 5074 uint32_t Value; 5075 }; 5076 } DW0; 5077 5078 union 5079 { 5080 struct 5081 { 5082 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5083 }; 5084 struct 5085 { 5086 uint32_t Value; 5087 }; 5088 } DW1; 5089 5090 union 5091 { 5092 struct 5093 { 5094 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5095 }; 5096 struct 5097 { 5098 uint32_t Value; 5099 }; 5100 } DW2; 5101 5102 union 5103 { 5104 struct 5105 { 5106 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5107 }; 5108 struct 5109 { 5110 uint32_t Value; 5111 }; 5112 } DW3; 5113 5114 union 5115 { 5116 struct 5117 { 5118 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5119 }; 5120 struct 5121 { 5122 uint32_t Value; 5123 }; 5124 } DW4; 5125 5126 union 5127 { 5128 struct 5129 { 5130 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5131 }; 5132 struct 5133 { 5134 uint32_t Value; 5135 }; 5136 } DW5; 5137 5138 union 5139 { 5140 struct 5141 { 5142 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 ); 5143 }; 5144 struct 5145 { 5146 uint32_t Value; 5147 }; 5148 } DW6; 5149 } CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9, *PCODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9; 5150 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9)) == 7); 5151 5152 typedef struct _CODECHAL_ENCODE_AVC_KERNEL_HEADER_G9 { 5153 int nKernelCount; 5154 5155 // Quality mode for Frame/Field 5156 CODECHAL_KERNEL_HEADER AVCMBEnc_Qlty_I; 5157 CODECHAL_KERNEL_HEADER AVCMBEnc_Qlty_P; 5158 CODECHAL_KERNEL_HEADER AVCMBEnc_Qlty_B; 5159 // Normal mode for Frame/Field 5160 CODECHAL_KERNEL_HEADER AVCMBEnc_Norm_I; 5161 CODECHAL_KERNEL_HEADER AVCMBEnc_Norm_P; 5162 CODECHAL_KERNEL_HEADER AVCMBEnc_Norm_B; 5163 // Performance modes for Frame/Field 5164 CODECHAL_KERNEL_HEADER AVCMBEnc_Perf_I; 5165 CODECHAL_KERNEL_HEADER AVCMBEnc_Perf_P; 5166 CODECHAL_KERNEL_HEADER AVCMBEnc_Perf_B; 5167 // Modes for Frame/Field 5168 CODECHAL_KERNEL_HEADER AVCMBEnc_Adv_I; 5169 CODECHAL_KERNEL_HEADER AVCMBEnc_Adv_P; 5170 CODECHAL_KERNEL_HEADER AVCMBEnc_Adv_B; 5171 5172 // HME 5173 CODECHAL_KERNEL_HEADER AVC_ME_P; 5174 CODECHAL_KERNEL_HEADER AVC_ME_B; 5175 5176 // DownScaling 5177 CODECHAL_KERNEL_HEADER PLY_DScale_PLY; 5178 CODECHAL_KERNEL_HEADER PLY_DScale_2f_PLY_2f; 5179 5180 // BRC Init frame 5181 CODECHAL_KERNEL_HEADER InitFrameBRC; 5182 5183 // FrameBRC Update 5184 CODECHAL_KERNEL_HEADER FrameENCUpdate; 5185 5186 // BRC Reset frame 5187 CODECHAL_KERNEL_HEADER BRC_ResetFrame; 5188 5189 // BRC I Frame Distortion 5190 CODECHAL_KERNEL_HEADER BRC_IFrame_Dist; 5191 5192 // BRCBlockCopy 5193 CODECHAL_KERNEL_HEADER BRCBlockCopy; 5194 5195 // MbBRC Update 5196 CODECHAL_KERNEL_HEADER MbBRCUpdate; 5197 5198 // 2x DownScaling 5199 CODECHAL_KERNEL_HEADER PLY_2xDScale_PLY; 5200 CODECHAL_KERNEL_HEADER PLY_2xDScale_2f_PLY_2f; 5201 5202 //Motion estimation kernel for the VDENC StreamIN 5203 CODECHAL_KERNEL_HEADER AVC_ME_VDENC; 5204 5205 //Weighted Prediction Kernel 5206 CODECHAL_KERNEL_HEADER AVC_WeightedPrediction; 5207 5208 // Static frame detection Kernel 5209 CODECHAL_KERNEL_HEADER AVC_StaticFrameDetection; 5210 5211 // MFE MBEnc kernel 5212 CODECHAL_KERNEL_HEADER AVCMBEnc_Qlty_MFE; 5213 } CODECHAL_ENCODE_AVC_KERNEL_HEADER_G9, *PCODECHAL_ENCODE_AVC_KERNEL_HEADER_G9; 5214 5215 typedef struct _CODECHAL_ENCODE_AVC_KERNEL_HEADER_FEI_G9 { 5216 int nKernelCount; 5217 5218 // MbEnc FEI for Frame/Field 5219 CODECHAL_KERNEL_HEADER AVCMBEnc_Fei_I; 5220 CODECHAL_KERNEL_HEADER AVCMBEnc_Fei_P; 5221 CODECHAL_KERNEL_HEADER AVCMBEnc_Fei_B; 5222 // PreProc 5223 CODECHAL_KERNEL_HEADER AVC_Fei_ProProc; 5224 // HME 5225 CODECHAL_KERNEL_HEADER AVC_ME_P; 5226 CODECHAL_KERNEL_HEADER AVC_ME_B; 5227 // DownScaling 5228 CODECHAL_KERNEL_HEADER PLY_DScale_PLY; 5229 CODECHAL_KERNEL_HEADER PLY_DScale_2f_PLY_2f; 5230 // BRC_I Frame Distortion 5231 CODECHAL_KERNEL_HEADER BRC_IFrame_Dist; 5232 // 2x DownScaling 5233 CODECHAL_KERNEL_HEADER PLY_2xDScale_PLY; 5234 CODECHAL_KERNEL_HEADER PLY_2xDScale_2f_PLY_2f; 5235 //Weighted Prediction Kernel 5236 CODECHAL_KERNEL_HEADER AVC_WeightedPrediction; 5237 } CODECHAL_ENCODE_AVC_KERNEL_HEADER_FEI_G9, *PCODECHAL_ENCODE_AVC_KERNEL_HEADER_FEI_G9; 5238 5239 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_MBENC_CM_G9 5240 { 5241 CODECHAL_ENCODE_AVC_MBENC_MFC_AVC_PAK_OBJ_CM_G9 = 0, 5242 CODECHAL_ENCODE_AVC_MBENC_IND_MV_DATA_CM_G9 = 1, 5243 CODECHAL_ENCODE_AVC_MBENC_BRC_DISTORTION_CM_G9 = 2, // For BRC distortion for I 5244 CODECHAL_ENCODE_AVC_MBENC_CURR_Y_CM_G9 = 3, 5245 CODECHAL_ENCODE_AVC_MBENC_CURR_UV_CM_G9 = 4, 5246 CODECHAL_ENCODE_AVC_MBENC_MB_SPECIFIC_DATA_CM_G9 = 5, 5247 CODECHAL_ENCODE_AVC_MBENC_AUX_VME_OUT_CM_G9 = 6, 5248 CODECHAL_ENCODE_AVC_MBENC_REFPICSELECT_L0_CM_G9 = 7, 5249 CODECHAL_ENCODE_AVC_MBENC_MV_DATA_FROM_ME_CM_G9 = 8, 5250 CODECHAL_ENCODE_AVC_MBENC_4xME_DISTORTION_CM_G9 = 9, 5251 CODECHAL_ENCODE_AVC_MBENC_REFPICSELECT_L1_CM_G9 = 10, 5252 CODECHAL_ENCODE_AVC_MBENC_FWD_MB_DATA_CM_G9 = 11, 5253 CODECHAL_ENCODE_AVC_MBENC_FWD_MV_DATA_CM_G9 = 12, 5254 CODECHAL_ENCODE_AVC_MBENC_MBQP_CM_G9 = 13, 5255 CODECHAL_ENCODE_AVC_MBENC_MBBRC_CONST_DATA_CM_G9 = 14, 5256 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_CM_G9 = 15, 5257 CODECHAL_ENCODE_AVC_MBENC_RESERVED0_CM_G9 = 21, 5258 CODECHAL_ENCODE_AVC_MBENC_RESERVED1_CM_G9 = 23, 5259 CODECHAL_ENCODE_AVC_MBENC_RESERVED2_CM_G9 = 25, 5260 CODECHAL_ENCODE_AVC_MBENC_RESERVED3_CM_G9 = 27, 5261 CODECHAL_ENCODE_AVC_MBENC_RESERVED4_CM_G9 = 29, 5262 CODECHAL_ENCODE_AVC_MBENC_RESERVED5_CM_G9 = 31, 5263 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_CM_G9 = 32, 5264 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_CM_G9 = 33, 5265 CODECHAL_ENCODE_AVC_MBENC_RESERVED6_CM_G9 = 34, 5266 CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_CM_G9 = 35, 5267 CODECHAL_ENCODE_AVC_MBENC_RESERVED7_CM_G9 = 36, 5268 CODECHAL_ENCODE_AVC_MBENC_FLATNESS_CHECK_CM_G9 = 37, 5269 CODECHAL_ENCODE_AVC_MBENC_MAD_DATA_CM_G9 = 38, 5270 CODECHAL_ENCODE_AVC_MBENC_INTER_DISTORTION_CM_G9 = 39, 5271 CODECHAL_ENCODE_AVC_MBENC_BEST_INTER_INTRA_CM_G9 = 40, 5272 CODECHAL_ENCODE_AVC_MBENC_BRC_CURBE_DATA_CM_G9 = 41, 5273 CODECHAL_ENCODE_AVC_MBENC_MV_PREDICTOR_CM_G9 = 42, 5274 CODECHAL_ENCODE_AVC_MBENC_NUM_SURFACES_CM_G9 = 43 5275 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_MBENC_CM_G9; 5276 5277 typedef struct _CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9 5278 { 5279 union 5280 { 5281 struct 5282 { 5283 uint32_t ProfileLevelMaxFrame : MOS_BITFIELD_RANGE(0, 31); 5284 }; 5285 struct 5286 { 5287 uint32_t Value; 5288 }; 5289 } DW0; 5290 5291 union 5292 { 5293 struct 5294 { 5295 uint32_t InitBufFullInBits : MOS_BITFIELD_RANGE(0, 31); 5296 }; 5297 struct 5298 { 5299 uint32_t Value; 5300 }; 5301 } DW1; 5302 5303 union 5304 { 5305 struct 5306 { 5307 uint32_t BufSizeInBits : MOS_BITFIELD_RANGE(0, 31); 5308 }; 5309 struct 5310 { 5311 uint32_t Value; 5312 }; 5313 } DW2; 5314 5315 union 5316 { 5317 struct 5318 { 5319 uint32_t AverageBitRate : MOS_BITFIELD_RANGE(0, 31); 5320 }; 5321 struct 5322 { 5323 uint32_t Value; 5324 }; 5325 } DW3; 5326 5327 union 5328 { 5329 struct 5330 { 5331 uint32_t MaxBitRate : MOS_BITFIELD_RANGE(0, 31); 5332 }; 5333 struct 5334 { 5335 uint32_t Value; 5336 }; 5337 } DW4; 5338 5339 union 5340 { 5341 struct 5342 { 5343 uint32_t MinBitRate : MOS_BITFIELD_RANGE(0, 31); 5344 }; 5345 struct 5346 { 5347 uint32_t Value; 5348 }; 5349 } DW5; 5350 5351 union 5352 { 5353 struct 5354 { 5355 uint32_t FrameRateM : MOS_BITFIELD_RANGE(0, 31); 5356 }; 5357 struct 5358 { 5359 uint32_t Value; 5360 }; 5361 } DW6; 5362 5363 union 5364 { 5365 struct 5366 { 5367 uint32_t FrameRateD : MOS_BITFIELD_RANGE(0, 31); 5368 }; 5369 struct 5370 { 5371 uint32_t Value; 5372 }; 5373 } DW7; 5374 5375 union 5376 { 5377 struct 5378 { 5379 uint32_t BRCFlag : MOS_BITFIELD_RANGE(0, 15); 5380 uint32_t GopP : MOS_BITFIELD_RANGE(16, 31); 5381 }; 5382 struct 5383 { 5384 uint32_t Value; 5385 }; 5386 } DW8; 5387 5388 union 5389 { 5390 struct 5391 { 5392 uint32_t GopB : MOS_BITFIELD_RANGE(0, 15); 5393 uint32_t FrameWidthInBytes : MOS_BITFIELD_RANGE(16, 31); 5394 }; 5395 struct 5396 { 5397 uint32_t Value; 5398 }; 5399 } DW9; 5400 5401 union 5402 { 5403 struct 5404 { 5405 uint32_t FrameHeightInBytes : MOS_BITFIELD_RANGE(0, 15); 5406 uint32_t AVBRAccuracy : MOS_BITFIELD_RANGE(16, 31); 5407 }; 5408 struct 5409 { 5410 uint32_t Value; 5411 }; 5412 } DW10; 5413 5414 union 5415 { 5416 struct 5417 { 5418 uint32_t AVBRConvergence : MOS_BITFIELD_RANGE(0, 15); 5419 uint32_t MinQP : MOS_BITFIELD_RANGE(16, 31); 5420 }; 5421 struct 5422 { 5423 uint32_t Value; 5424 }; 5425 } DW11; 5426 5427 union 5428 { 5429 struct 5430 { 5431 uint32_t MaxQP : MOS_BITFIELD_RANGE(0, 15); 5432 uint32_t NoSlices : MOS_BITFIELD_RANGE(16, 31); 5433 }; 5434 struct 5435 { 5436 uint32_t Value; 5437 }; 5438 } DW12; 5439 5440 union 5441 { 5442 struct 5443 { 5444 uint32_t InstantRateThreshold0ForP : MOS_BITFIELD_RANGE(0, 7); 5445 uint32_t InstantRateThreshold1ForP : MOS_BITFIELD_RANGE(8, 15); 5446 uint32_t InstantRateThreshold2ForP : MOS_BITFIELD_RANGE(16, 23); 5447 uint32_t InstantRateThreshold3ForP : MOS_BITFIELD_RANGE(24, 31); 5448 }; 5449 struct 5450 { 5451 uint32_t Value; 5452 }; 5453 } DW13; 5454 5455 union 5456 { 5457 struct 5458 { 5459 uint32_t InstantRateThreshold0ForB : MOS_BITFIELD_RANGE(0, 7); 5460 uint32_t InstantRateThreshold1ForB : MOS_BITFIELD_RANGE(8, 15); 5461 uint32_t InstantRateThreshold2ForB : MOS_BITFIELD_RANGE(16, 23); 5462 uint32_t InstantRateThreshold3ForB : MOS_BITFIELD_RANGE(24, 31); 5463 }; 5464 struct 5465 { 5466 uint32_t Value; 5467 }; 5468 } DW14; 5469 5470 union 5471 { 5472 struct 5473 { 5474 uint32_t InstantRateThreshold0ForI : MOS_BITFIELD_RANGE(0, 7); 5475 uint32_t InstantRateThreshold1ForI : MOS_BITFIELD_RANGE(8, 15); 5476 uint32_t InstantRateThreshold2ForI : MOS_BITFIELD_RANGE(16, 23); 5477 uint32_t InstantRateThreshold3ForI : MOS_BITFIELD_RANGE(24, 31); 5478 }; 5479 struct 5480 { 5481 uint32_t Value; 5482 }; 5483 } DW15; 5484 5485 union 5486 { 5487 struct 5488 { 5489 uint32_t DeviationThreshold0ForPandB : MOS_BITFIELD_RANGE(0, 7); // Signed byte 5490 uint32_t DeviationThreshold1ForPandB : MOS_BITFIELD_RANGE(8, 15); // Signed byte 5491 uint32_t DeviationThreshold2ForPandB : MOS_BITFIELD_RANGE(16, 23); // Signed byte 5492 uint32_t DeviationThreshold3ForPandB : MOS_BITFIELD_RANGE(24, 31); // Signed byte 5493 }; 5494 struct 5495 { 5496 uint32_t Value; 5497 }; 5498 } DW16; 5499 5500 union 5501 { 5502 struct 5503 { 5504 uint32_t DeviationThreshold4ForPandB : MOS_BITFIELD_RANGE(0, 7); // Signed byte 5505 uint32_t DeviationThreshold5ForPandB : MOS_BITFIELD_RANGE(8, 15); // Signed byte 5506 uint32_t DeviationThreshold6ForPandB : MOS_BITFIELD_RANGE(16, 23); // Signed byte 5507 uint32_t DeviationThreshold7ForPandB : MOS_BITFIELD_RANGE(24, 31); // Signed byte 5508 }; 5509 struct 5510 { 5511 uint32_t Value; 5512 }; 5513 } DW17; 5514 5515 union 5516 { 5517 struct 5518 { 5519 uint32_t DeviationThreshold0ForVBR : MOS_BITFIELD_RANGE(0, 7); // Signed byte 5520 uint32_t DeviationThreshold1ForVBR : MOS_BITFIELD_RANGE(8, 15); // Signed byte 5521 uint32_t DeviationThreshold2ForVBR : MOS_BITFIELD_RANGE(16, 23); // Signed byte 5522 uint32_t DeviationThreshold3ForVBR : MOS_BITFIELD_RANGE(24, 31); // Signed byte 5523 }; 5524 struct 5525 { 5526 uint32_t Value; 5527 }; 5528 } DW18; 5529 5530 union 5531 { 5532 struct 5533 { 5534 uint32_t DeviationThreshold4ForVBR : MOS_BITFIELD_RANGE(0, 7); // Signed byte 5535 uint32_t DeviationThreshold5ForVBR : MOS_BITFIELD_RANGE(8, 15); // Signed byte 5536 uint32_t DeviationThreshold6ForVBR : MOS_BITFIELD_RANGE(16, 23); // Signed byte 5537 uint32_t DeviationThreshold7ForVBR : MOS_BITFIELD_RANGE(24, 31); // Signed byte 5538 }; 5539 struct 5540 { 5541 uint32_t Value; 5542 }; 5543 } DW19; 5544 5545 union 5546 { 5547 struct 5548 { 5549 uint32_t DeviationThreshold0ForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte 5550 uint32_t DeviationThreshold1ForI : MOS_BITFIELD_RANGE(8, 15); // Signed byte 5551 uint32_t DeviationThreshold2ForI : MOS_BITFIELD_RANGE(16, 23); // Signed byte 5552 uint32_t DeviationThreshold3ForI : MOS_BITFIELD_RANGE(24, 31); // Signed byte 5553 }; 5554 struct 5555 { 5556 uint32_t Value; 5557 }; 5558 } DW20; 5559 5560 union 5561 { 5562 struct 5563 { 5564 uint32_t DeviationThreshold4ForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte 5565 uint32_t DeviationThreshold5ForI : MOS_BITFIELD_RANGE(8, 15); // Signed byte 5566 uint32_t DeviationThreshold6ForI : MOS_BITFIELD_RANGE(16, 23); // Signed byte 5567 uint32_t DeviationThreshold7ForI : MOS_BITFIELD_RANGE(24, 31); // Signed byte 5568 }; 5569 struct 5570 { 5571 uint32_t Value; 5572 }; 5573 } DW21; 5574 5575 union 5576 { 5577 struct 5578 { 5579 uint32_t InitialQPForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte 5580 uint32_t InitialQPForP : MOS_BITFIELD_RANGE(8, 15); // Signed byte 5581 uint32_t InitialQPForB : MOS_BITFIELD_RANGE(16, 23); // Signed byte 5582 uint32_t SlidingWindowSize : MOS_BITFIELD_RANGE(24, 31); // unsigned byte 5583 }; 5584 struct 5585 { 5586 uint32_t Value; 5587 }; 5588 } DW22; 5589 5590 union 5591 { 5592 struct 5593 { 5594 uint32_t ACQP : MOS_BITFIELD_RANGE(0, 31); 5595 }; 5596 struct 5597 { 5598 uint32_t Value; 5599 }; 5600 } DW23; 5601 } CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9, *PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9; 5602 5603 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9)) == 24); 5604 5605 class CodechalEncodeAvcEncG9 : public CodechalEncodeAvcEnc 5606 { 5607 public: 5608 //! 5609 //! \brief Constructor 5610 //! 5611 CodechalEncodeAvcEncG9( 5612 CodechalHwInterface * hwInterface, 5613 CodechalDebugInterface *debugInterface, 5614 PCODECHAL_STANDARD_INFO standardInfo); 5615 5616 ~CodechalEncodeAvcEncG9(); 5617 5618 virtual MOS_STATUS InitializeState() override; 5619 5620 virtual MOS_STATUS InitMbBrcConstantDataBuffer( 5621 PCODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS params) override; 5622 5623 virtual MOS_STATUS InitKernelStateWP() override; 5624 5625 virtual MOS_STATUS GetMbEncKernelStateIdx( 5626 CodechalEncodeIdOffsetParams* params, 5627 uint32_t* kernelOffset) override; 5628 5629 virtual MOS_STATUS SetCurbeAvcWP( 5630 PCODECHAL_ENCODE_AVC_WP_CURBE_PARAMS params) override; 5631 5632 virtual MOS_STATUS SceneChangeReport( 5633 PMOS_COMMAND_BUFFER cmdBuffer, 5634 PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params) override; 5635 5636 virtual MOS_STATUS SetCurbeAvcBrcInitReset( 5637 PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS params) override; 5638 5639 virtual MOS_STATUS SetCurbeAvcFrameBrcUpdate( 5640 PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params) override; 5641 5642 virtual MOS_STATUS SetCurbeAvcMbBrcUpdate( 5643 PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params) override; 5644 5645 virtual MOS_STATUS SetCurbeAvcBrcBlockCopy( 5646 PCODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_PARAMS params) override; 5647 5648 virtual MOS_STATUS SendAvcMbEncSurfaces( 5649 PMOS_COMMAND_BUFFER cmdBuffer, 5650 PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params) override; 5651 5652 virtual MOS_STATUS SendAvcWPSurfaces( 5653 PMOS_COMMAND_BUFFER cmdBuffer, 5654 PCODECHAL_ENCODE_AVC_WP_SURFACE_PARAMS params) override; 5655 5656 virtual MOS_STATUS SendAvcBrcFrameUpdateSurfaces( 5657 PMOS_COMMAND_BUFFER cmdBuffer, 5658 PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params) override; 5659 5660 virtual MOS_STATUS SendAvcBrcMbUpdateSurfaces( 5661 PMOS_COMMAND_BUFFER cmdBuffer, 5662 PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params) override; 5663 5664 virtual MOS_STATUS SetupROISurface() override; 5665 5666 virtual bool IsMfeMbEncEnabled(bool mbEncIFrameDistInUse = false) override; 5667 5668 MOS_STATUS GetStatusReport( 5669 void *status, 5670 uint16_t numStatus) override; 5671 using CodechalEncodeAvcEnc::GetStatusReport; 5672 5673 #if USE_CODECHAL_DEBUG_TOOL 5674 protected: 5675 virtual MOS_STATUS PopulateBrcInitParam( 5676 void *cmd) override; 5677 5678 virtual MOS_STATUS PopulateBrcUpdateParam( 5679 void *cmd) override; 5680 5681 virtual MOS_STATUS PopulateEncParam( 5682 uint8_t meMethod, 5683 void *cmd) override; 5684 #endif 5685 5686 protected: 5687 static const CODECHAL_ENCODE_AVC_IPCM_THRESHOLD IPCM_Threshold_Table[5]; 5688 static const uint32_t IntraModeCostForHighTextureMB[CODEC_AVC_NUM_QP]; 5689 }; 5690 5691 #endif // __CODECHAL_ENCODE_AVC_G9_H__ 5692