1 /* 2 * Copyright (c) 2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_encode_csc_ds_g9.h 24 //! \brief Gen9 class for CSC and Downscaling. 25 //! 26 27 #ifndef __CodechalEncodeCscDsG9__ 28 #define __CodechalEncodeCscDsG9__ 29 30 #include "codechal_encode_csc_ds.h" 31 32 class CodechalEncodeCscDsG9 : public CodechalEncodeCscDs 33 { 34 public: 35 //! 36 //! \brief 4xDS kernel Curbe data 37 //! 38 struct Ds4xKernelCurbeData 39 { Ds4xKernelCurbeDataDs4xKernelCurbeData40 Ds4xKernelCurbeData() 41 { 42 DW0 = 0; 43 DW1 = ds4xSrcYPlane; 44 DW2 = ds4xDstYPlane; 45 DW3_InputYBTIBottomField = 46 DW4_OutputYBTIBottomField = 47 DW5_FlatnessThreshold = 48 DW6 = 49 DW7_Reserved = 0; 50 DW8 = ds4xDstMbVProc; 51 DW9_MBVProcStatsBTIBottomField = 0; 52 DW10_Reserved = 53 DW11_Reserved = 54 DW12_Reserved = 55 DW13_Reserved = 56 DW14_Reserved = 57 DW15_Reserved = 0; 58 } 59 60 // DW0 61 union 62 { 63 struct 64 { 65 uint32_t DW0_InputPictureWidth : MOS_BITFIELD_RANGE(0, 15); 66 uint32_t DW0_InputPictureHeight : MOS_BITFIELD_RANGE(16, 31); 67 }; 68 uint32_t DW0; 69 }; 70 71 // DW1 72 union 73 { 74 struct 75 { 76 uint32_t DW1_InputYBTIFrame; 77 }; 78 struct 79 { 80 uint32_t DW1_InputYBTITopField; 81 }; 82 uint32_t DW1; 83 }; 84 85 // DW2 86 union 87 { 88 struct 89 { 90 uint32_t DW2_OutputYBTIFrame; 91 }; 92 struct 93 { 94 uint32_t DW2_OutputYBTITopField; 95 }; 96 uint32_t DW2; 97 }; 98 99 // DW3 100 uint32_t DW3_InputYBTIBottomField; 101 102 // DW4 103 uint32_t DW4_OutputYBTIBottomField; 104 105 // DW5 106 uint32_t DW5_FlatnessThreshold; 107 108 // DW6 109 union 110 { 111 struct 112 { 113 uint32_t DW6_EnableMBFlatnessCheck : MOS_BITFIELD_BIT(0); 114 uint32_t DW6_EnableMBVarianceOutput : MOS_BITFIELD_BIT(1); 115 uint32_t DW6_EnableMBPixelAverageOutput : MOS_BITFIELD_BIT(2); 116 uint32_t DW6_EnableBlock8x8StatisticsOutput : MOS_BITFIELD_BIT(3); 117 uint32_t: MOS_BITFIELD_RANGE(4, 31); 118 }; 119 uint32_t DW6; 120 }; 121 122 // DW7 123 uint32_t DW7_Reserved; 124 125 // DW8 126 union 127 { 128 struct 129 { 130 uint32_t DW8_MBVProcStatsBTIFrame; 131 }; 132 struct 133 { 134 uint32_t DW8_MBVProcStatsBTITopField; 135 }; 136 uint32_t DW8; 137 }; 138 139 // DW9 140 uint32_t DW9_MBVProcStatsBTIBottomField; 141 142 // DW10 143 uint32_t DW10_Reserved; 144 145 // DW11 146 uint32_t DW11_Reserved; 147 148 //DW12 149 uint32_t DW12_Reserved; 150 151 //DW13 152 uint32_t DW13_Reserved; 153 154 //DW14 155 uint32_t DW14_Reserved; 156 157 //DW15 158 uint32_t DW15_Reserved; 159 160 }; 161 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(Ds4xKernelCurbeData)) == 16); 162 163 //! 164 //! \brief Constructor 165 //! 166 CodechalEncodeCscDsG9(CodechalEncoderState* encoder); 167 168 //! 169 //! \brief Destructor 170 //! ~CodechalEncodeCscDsG9()171 ~CodechalEncodeCscDsG9() {} 172 173 protected: 174 virtual MOS_STATUS InitKernelStateDS() override; 175 virtual MOS_STATUS SetCurbeDS4x() override; 176 177 private: 178 //! 179 //! \brief CSC kernel binding table 180 //! 181 enum CscKernelBTI 182 { 183 cscSrcYPlane = 0, 184 cscSrcUVPlane = 1, 185 cscDstDsYPlane = 2, 186 cscDstDsUVPlane = 3, 187 cscDstFlatOrMbStats = 4, 188 cscDstCopyYPlane = 5, 189 cscDstCopyUVPlane = 6, 190 cscNumSurfaces = 7 191 }; 192 193 //! 194 //! \brief Csc kernel Curbe data 195 //! 196 struct CscKernelCurbeData 197 { CscKernelCurbeDataCscKernelCurbeData198 CscKernelCurbeData() 199 { 200 DW0 = 201 DW1 = 202 DW2_FlatnessThreshold = 203 DW3_EnableMBStatSurface = 204 DW4_CscCoefficientC0 = 205 DW4_CscCoefficientC1 = 206 DW5_CscCoefficientC2 = 207 DW5_CscCoefficientC3 = 208 DW6_CscCoefficientC4 = 209 DW6_CscCoefficientC5 = 210 DW7_CscCoefficientC6 = 211 DW7_CscCoefficientC7 = 212 DW8_CscCoefficientC8 = 213 DW8_CscCoefficientC9 = 214 DW9_CscCoefficientC10 = 215 DW9_CscCoefficientC11 = 216 DW10_Reserved = 217 DW11_Reserved = 218 DW12_Reserved = 219 DW13_Reserved = 220 DW14_Reserved = 221 DW15_Reserved = 0; 222 DW16_SrcNV12SurfYIndex = cscSrcYPlane; 223 DW17_DstYSurfIndex = cscDstDsYPlane; 224 DW18_MbStatDstSurfIndex = cscDstFlatOrMbStats; 225 DW19_CopyDstNV12SurfIndex = cscDstCopyYPlane; 226 DW20_SrcNV12SurfUVIndex = cscSrcUVPlane; 227 } 228 229 union 230 { 231 struct 232 { 233 // DWORD 0 - GRF R1.0 234 uint32_t DW0_InputPictureWidth : MOS_BITFIELD_RANGE(0, 15); 235 uint32_t DW0_InputPictureHeight : MOS_BITFIELD_RANGE(16, 31); 236 }; 237 uint32_t DW0; 238 }; 239 240 union 241 { 242 struct 243 { 244 // DWORD 1 - GRF R1.1 245 uint32_t DW1_CscDsCopyOpCode : MOS_BITFIELD_RANGE(0, 7); 246 uint32_t DW1_InputColorFormat : MOS_BITFIELD_RANGE(8, 15); 247 uint32_t DW1_ChromaSitting : MOS_BITFIELD_RANGE(16, 23); 248 uint32_t DW1_Reserved : MOS_BITFIELD_RANGE(24, 31); 249 }; 250 uint32_t DW1; 251 }; 252 253 // DWORD 2 - GRF R1.2: MBFlatnessThreshold 254 uint32_t DW2_FlatnessThreshold; 255 256 // DWORD 3 - GRF R1.3: EnableMBStatSurface 257 uint32_t DW3_EnableMBStatSurface; 258 259 // DWORD 4 - GRF R1.4: RGB to YUV conversion coefficients 260 uint32_t DW4_CscCoefficientC0 : MOS_BITFIELD_RANGE(0, 15); 261 uint32_t DW4_CscCoefficientC1 : MOS_BITFIELD_RANGE(16, 31); 262 263 // DWORD 5 - GRF R1.5: RGB to YUV conversion coefficients 264 uint32_t DW5_CscCoefficientC2 : MOS_BITFIELD_RANGE(0, 15); 265 uint32_t DW5_CscCoefficientC3 : MOS_BITFIELD_RANGE(16, 31); 266 267 // DWORD 6 - GRF R1.6: RGB to YUV conversion coefficients 268 uint32_t DW6_CscCoefficientC4 : MOS_BITFIELD_RANGE(0, 15); 269 uint32_t DW6_CscCoefficientC5 : MOS_BITFIELD_RANGE(16, 31); 270 271 // DWORD 7 - GRF R1.7: RGB to YUV conversion coefficients 272 uint32_t DW7_CscCoefficientC6 : MOS_BITFIELD_RANGE(0, 15); 273 uint32_t DW7_CscCoefficientC7 : MOS_BITFIELD_RANGE(16, 31); 274 275 // DWORD 8 - GRF R2.0: RGB to YUV conversion coefficients 276 uint32_t DW8_CscCoefficientC8 : MOS_BITFIELD_RANGE(0, 15); 277 uint32_t DW8_CscCoefficientC9 : MOS_BITFIELD_RANGE(16, 31); 278 279 // DWORD 9 - GRF R2.1: RGB to YUV conversion coefficients 280 uint32_t DW9_CscCoefficientC10 : MOS_BITFIELD_RANGE(0, 15); 281 uint32_t DW9_CscCoefficientC11 : MOS_BITFIELD_RANGE(16, 31); 282 283 // DWORD 10 - GRF R2.2 284 uint32_t DW10_Reserved; 285 286 // DWORD 11 - GRF R2.3 287 uint32_t DW11_Reserved; 288 289 // DWORD 12 - GRF R2.4 290 uint32_t DW12_Reserved; 291 292 // DWORD 13 - GRF R2.5 293 uint32_t DW13_Reserved; 294 295 // DWORD 14 - GRF R2.6 296 uint32_t DW14_Reserved; 297 298 // DWORD 15 - GRF R2.7 299 uint32_t DW15_Reserved; 300 301 // DWORD 16 - GRF R3.1: Surface index source linear NV12 Y Plane 302 uint32_t DW16_SrcNV12SurfYIndex; 303 304 // DWORD 17 - GRF R3.2: : Surface index downscale destination Planar Y 305 uint32_t DW17_DstYSurfIndex; 306 307 // DWORD 18 - GRF R3.3: : Surface index flatness destination 308 uint32_t DW18_MbStatDstSurfIndex; 309 310 // DWORD 19 - GRF R3.4: Surface index copy destination NV12 311 uint32_t DW19_CopyDstNV12SurfIndex; 312 313 // DWORD 20 - GRF R3.5: Surface index source linear NV12 UV Plane 314 uint32_t DW20_SrcNV12SurfUVIndex; 315 }; 316 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CscKernelCurbeData)) == 21); 317 318 //! 319 //! \brief 4xDS kernel binding table 320 //! 321 enum Ds4xKernelBTI 322 { 323 ds4xSrcYPlane = 0, 324 ds4xDstYPlane = 1, 325 ds4xSrcYPlaneTopField = 0, 326 ds4xDstYPlaneTopField = 1, 327 ds4xSrcYPlaneBtmField = 2, 328 ds4xDstYPlaneBtmField = 3, 329 ds4xDstMbVProc = 4, 330 ds4xDstMbVProcTopField = 4, 331 ds4xDstMbVProcBtmField = 5, 332 ds4xNumSurfaces = 6 333 }; 334 335 MOS_STATUS SetCurbeCsc() override; 336 }; 337 338 #endif // __CodechalEncodeCscDsG9__ 339