1 /*
2 * Copyright (c) 2018, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encode_vp8_g9.cpp
24 //! \brief VP8 dual-pipe encoder for GEN9.
25 //!
26
27 #include "codechal_encode_vp8_g9.h"
28 #include "codeckrnheader.h"
29 #ifndef _FULL_OPEN_SOURCE
30 #include "igcodeckrn_g9.h"
31 #endif
32 #include "mhw_vdbox_mfx_hwcmd_g9_kbl.h"
33
34 #define INTRA_PROBABILIY 63
35 #define INTER_LAST_PROBABILIY 255
36 #define INTER_GOLD_PROBABILIY 128
37 #define NAX_NUM_TEMPORAL_LAYERS 4
38
39 enum CodechalBindingTableOffsetVp8BrcInitResetG9
40 {
41 CODECHAL_VP8_BRC_INIT_RESET_HISTORY_G9 = 0,
42 CODECHAL_VP8_BRC_INIT_RESET_DISTORTION_G9 = 1,
43 CODECHAL_VP8_BRC_INIT_RESET_NUM_SURFACES_G9 = 2
44 };
45
46 enum CodechalBindingTableOffsetVp8BrcUpdateG9
47 {
48 CODECHAL_VP8_BRC_UPDATE_HISTORY_G9 = 1,
49 CODECHAL_VP8_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G9 = 2,
50 CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_READ_G9 = 3,
51 CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_WRITE_G9 = 4,
52 CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_READ_G9 = 5,
53 CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_WRITE_G9 = 6,
54 CODECHAL_VP8_BRC_UPDATE_DISTORTION_SURFACE_G9 = 7,
55 CODECHAL_VP8_BRC_UPDATE_CONSTANT_DATA_G9 = 8,
56 CODECHAL_VP8_BRC_UPDATE_SEGMENT_MAP_G9 = 9,
57 CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_READ_G9 = 10,
58 CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_WRITE_G9 = 11,
59 CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_READ_G9 = 12,
60 CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_WRITE_G9 = 13,
61 CODECHAL_VP8_BRC_UPDATE_NUM_SURFACES_G9 = 14
62 };
63
64 enum CodechalBindingTableOffsetVp8MeG9
65 {
66 CODECHAL_VP8_ME_MV_DATA_G9 = 0,
67 CODECHAL_VP8_16xME_MV_DATA_G9 = 2,
68 CODECHAL_VP8_ME_DISTORTION_G9 = 3,
69 CODECHAL_VP8_ME_MIN_DIST_BRC_DATA_G9 = 4,
70 CODECHAL_VP8_VME_INTER_PRED_G9 = 5,
71 CODECHAL_VP8_ME_REF1_PIC_G9 = 6,
72 CODECHAL_VP8_ME_REF2_PIC_G9 = 8,
73 CODECHAL_VP8_ME_REF3_PIC_G9 = 10,
74 CODECHAL_VP8_ME_NUM_SURFACES_G9 = 11
75 };
76
77 enum CodechalBindingTableOffsetVp8MbencG9
78 {
79 CODECHAL_VP8_MBENC_PER_MB_OUT_G9 = 0,
80 CODECHAL_VP8_MBENC_CURR_Y_G9 = 1,
81 CODECHAL_VP8_MBENC_CURR_UV_G9 = 2,
82 };
83
84 enum CodechalBindingTableOffsetVp8MbencIFrameG9
85 {
86 CODECHAL_VP8_MBENC_MB_MODE_COST_LUMA_G9 = 3,
87 CODECHAL_VP8_MBENC_BLOCK_MODE_COST_G9 = 4,
88 CODECHAL_VP8_MBENC_CHROMA_RECON_G9 = 5,
89 CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G9 = 6,
90 CODECHAL_VP8_MBENC_HISTOGRAM_G9 = 7,
91 CODECHAL_VP8_MBENC_I_VME_DEBUG_STREAMOUT_G9 = 8,
92 CODECHAL_VP8_MBENC_VME_G9 = 9,
93 CODECHAL_VP8_MBENC_IDIST_G9 = 10,
94 CODECHAL_VP8_MBENC_CURR_Y_DOWNSCALED_G9 = 11,
95 CODECHAL_VP8_MBENC_VME_Coarse_Intra_G9 = 12
96 };
97
98 enum CodechalBindingTableOffsetVp8MbencPFrameG9
99 {
100 CODECHAL_VP8_MBENC_MV_DATA_FROM_ME_G9 = 3,
101 CODECHAL_VP8_MBENC_IND_MV_DATA_G9 = 4,
102 CODECHAL_VP8_MBENC_REF_MB_COUNT_G9 = 5,
103 CODECHAL_VP8_MBENC_INTER_PRED_G9 = 8,
104 CODECHAL_VP8_MBENC_REF1_PIC_G9 = 9,
105 CODECHAL_VP8_MBENC_REF2_PIC_G9 = 11,
106 CODECHAL_VP8_MBENC_REF3_PIC_G9 = 13,
107 CODECHAL_VP8_MBENC_P_PER_MB_QUANT_G9 = 14,
108 CODECHAL_VP8_MBEBC_INTER_PRED_DISTORTION_G9 = 15,
109 CODECHAL_VP8_MBEBC_PER_MV_DATA_G9 = 16,
110 CODECHAL_VP8_MBENC_MODE_COST_UPDATE_G9 = 17,
111 CODECHAL_VP8_MBENC_P_VME_DEBUG_STREAMOUT_G9 = 18,
112 CODECHAL_VP8_MBENC_NUM_SURFACES_G9 = 19
113 };
114
115 enum CodechalBindingTableOffsetVp8MpuFhbG9
116 {
117 CODECHAL_VP8_MPU_FHB_HISTOGRAM_G9 = 0,
118 CODECHAL_VP8_MPU_FHB_REF_MODE_PROBABILITY_G9 = 1,
119 CODECHAL_VP8_MPU_FHB_CURR_MODE_PROBABILITY_G9 = 2,
120 CODECHAL_VP8_MPU_FHB_REF_TOKEN_PROBABILITY_G9 = 3,
121 CODECHAL_VP8_MPU_FHB_CURR_TOKEN_PROBABILITY_G9 = 4,
122 CODECHAL_VP8_MPU_FHB_HEADER_BITSTREAM_G9 = 5,
123 CODECHAL_VP8_MPU_FHB_HEADER_METADATA_G9 = 6,
124 CODECHAL_VP8_MPU_FHB_PICTURE_STATE_G9 = 7,
125 CODECHAL_VP8_MPU_FHB_MPU_BITSTREAM_G9 = 8,
126 CODECHAL_VP8_MPU_FHB_TOKEN_BITS_DATA_TABLE_G9 = 9,
127 CODECHAL_VP8_MPU_FHB_VME_DEBUG_STREAMOUT_G9 = 10,
128 CODECHAL_VP8_MPU_FHB_ENTROPY_COST_TABLE_G9 = 11,
129 CODECHAL_VP8_MPU_MODE_COST_UPDATE_G9 = 12,
130 CODECHAL_VP8_MPU_FHB_NUM_SURFACES_G9 = 13
131 };
132
133 enum CodechalBindingTableOffsetVp8TpuFhbG9
134 {
135 CODECHAL_VP8_TPU_FHB_PAK_TOKEN_STATISTICS_G9 = 0,
136 CODECHAL_VP8_TPU_FHB_TOKEN_UPDATE_FLAGS_G9 = 1,
137 CODECHAL_VP8_TPU_FHB_ENTROPY_COST_TABLE_G9 = 2,
138 CODECHAL_VP8_TPU_FHB_HEADER_BITSTREAM_G9 = 3,
139 CODECHAL_VP8_TPU_FHB_DEFAULT_TOKEN_PROBABILITY_G9 = 4,
140 CODECHAL_VP8_TPU_FHB_PICTURE_STATE_G9 = 5,
141 CODECHAL_VP8_TPU_FHB_MPU_CURBE_DATA_G9 = 6,
142 CODECHAL_VP8_TPU_FHB_HEADER_METADATA_G9 = 7,
143 CODECHAL_VP8_TPU_FHB_TOKEN_PROBABILITY_G9 = 8,
144 CODECHAL_VP8_TPU_FHB_PAK_HW_PASS1_PROBABILITY_G9 = 9,
145 CODECHAL_VP8_TPU_FHB_KEY_TOKEN_PROBABILITY_G9 = 10,
146 CODECHAL_VP8_TPU_FHB_UPDATED_TOKEN_PROBABILITY_G9 = 11,
147 CODECHAL_VP8_TPU_FHB_PAK_HW_PASS2_PROBABILITY_G9 = 12,
148 CODECHAL_VP8_TPU_FHB_VME_DEBUG_STREAMOUT_G9 = 13,
149 CODECHAL_VP8_TPU_FHB_REPAK_DECISION_G9 = 14,
150 CODECHAL_VP8_TPU_FHB_NUM_SURFACES_G9 = 15
151 };
152
153 struct MediaObjectVp8BrcInitResetStaticDataG9
154 {
155 union
156 {
157 struct
158 {
159 uint32_t ProfileLevelMaxFrame : 32;
160 };
161 struct
162 {
163 uint32_t Value;
164 };
165 } DW0;
166
167 union
168 {
169 struct
170 {
171 uint32_t InitBufFullInBits : 32;
172 };
173 struct
174 {
175 uint32_t Value;
176 };
177 } DW1;
178
179 union
180 {
181 struct
182 {
183 uint32_t BufSizeInBits : 32;
184 };
185 struct
186 {
187 uint32_t Value;
188 };
189 } DW2;
190
191 union
192 {
193 struct
194 {
195 uint32_t AverageBitRate : 32;
196 };
197 struct
198 {
199 uint32_t Value;
200 };
201 } DW3;
202
203 union
204 {
205 struct
206 {
207 uint32_t MaxBitRate : 32;
208 };
209 struct
210 {
211 uint32_t Value;
212 };
213 } DW4;
214
215 union
216 {
217 struct
218 {
219 uint32_t MinBitRate : 32;
220 };
221 struct
222 {
223 uint32_t Value;
224 };
225 } DW5;
226
227 union
228 {
229 struct
230 {
231 uint32_t FrameRateM : 32;
232 };
233 struct
234 {
235 uint32_t Value;
236 };
237 } DW6;
238
239 union
240 {
241 struct
242 {
243 uint32_t FrameRateD : 32;
244 };
245 struct
246 {
247 uint32_t Value;
248 };
249 } DW7;
250
251 union
252 {
253 struct
254 {
255 uint32_t BRCFlag : 16;
256 uint32_t GopP : 16;
257 };
258 struct
259 {
260 uint32_t Value;
261 };
262 } DW8;
263
264 union
265 {
266 struct
267 {
268 uint32_t Reserved : 16;
269 uint32_t FrameWidthInBytes : 16;
270 };
271 struct
272 {
273 uint32_t Value;
274 };
275 } DW9;
276
277 union
278 {
279 struct
280 {
281 uint32_t FrameHeightInBytes : 16;
282 uint32_t AVBRAccuracy : 16;
283 };
284 struct
285 {
286 uint32_t Value;
287 };
288 } DW10;
289
290 union
291 {
292 struct
293 {
294 uint32_t AVBRConvergence : 16;
295 uint32_t MinQP : 16;
296 };
297 struct
298 {
299 uint32_t Value;
300 };
301 } DW11;
302
303 union
304 {
305 struct
306 {
307 uint32_t MaxQP : 16;
308 uint32_t LevelQP : 16;
309 };
310 struct
311 {
312 uint32_t Value;
313 };
314 } DW12;
315
316 union
317 {
318 struct
319 {
320 uint32_t MaxSection_pct : 16;
321 uint32_t OverShootCBR_pct : 16;
322 };
323 struct
324 {
325 uint32_t Value;
326 };
327 } DW13;
328
329 union
330 {
331 struct
332 {
333 uint32_t VBRBias_pct : 16;
334 uint32_t MinSection_pct : 16;
335 };
336 struct
337 {
338 uint32_t Value;
339 };
340 } DW14;
341
342 union
343 {
344 struct
345 {
346 uint32_t InstantRateThreshold0ForP : 8;
347 uint32_t InstantRateThreshold1ForP : 8;
348 uint32_t InstantRateThreshold2ForP : 8;
349 uint32_t InstantRateThreshold3ForP : 8;
350 };
351 struct
352 {
353 uint32_t Value;
354 };
355 } DW15;
356
357 union
358 {
359 struct
360 {
361 uint32_t Reserved : 32;
362 };
363 struct
364 {
365 uint32_t Value;
366 };
367 } DW16;
368
369 union
370 {
371 struct
372 {
373 uint32_t InstantRateThreshold0ForI : 8;
374 uint32_t InstantRateThreshold1ForI : 8;
375 uint32_t InstantRateThreshold2ForI : 8;
376 uint32_t InstantRateThreshold3ForI : 8;
377 };
378 struct
379 {
380 uint32_t Value;
381 };
382 } DW17;
383
384 union
385 {
386 struct
387 {
388 uint32_t DeviationThreshold0ForP : 8; // Signed byte
389 uint32_t DeviationThreshold1ForP : 8; // Signed byte
390 uint32_t DeviationThreshold2ForP : 8; // Signed byte
391 uint32_t DeviationThreshold3ForP : 8; // Signed byte
392 };
393 struct
394 {
395 uint32_t Value;
396 };
397 } DW18;
398
399 union
400 {
401 struct
402 {
403 uint32_t DeviationThreshold4ForP : 8; // Signed byte
404 uint32_t DeviationThreshold5ForP : 8; // Signed byte
405 uint32_t DeviationThreshold6ForP : 8; // Signed byte
406 uint32_t DeviationThreshold7ForP : 8; // Signed byte
407 };
408 struct
409 {
410 uint32_t Value;
411 };
412 } DW19;
413
414 union
415 {
416 struct
417 {
418 uint32_t DeviationThreshold0ForVBR : 8; // Signed byte
419 uint32_t DeviationThreshold1ForVBR : 8; // Signed byte
420 uint32_t DeviationThreshold2ForVBR : 8; // Signed byte
421 uint32_t DeviationThreshold3ForVBR : 8; // Signed byte
422 };
423 struct
424 {
425 uint32_t Value;
426 };
427 } DW20;
428
429 union
430 {
431 struct
432 {
433 uint32_t DeviationThreshold4ForVBR : 8; // Signed byte
434 uint32_t DeviationThreshold5ForVBR : 8; // Signed byte
435 uint32_t DeviationThreshold6ForVBR : 8; // Signed byte
436 uint32_t DeviationThreshold7ForVBR : 8; // Signed byte
437 };
438 struct
439 {
440 uint32_t Value;
441 };
442 } DW21;
443
444 union
445 {
446 struct
447 {
448 uint32_t DeviationThreshold0ForI : 8; // Signed byte
449 uint32_t DeviationThreshold1ForI : 8; // Signed byte
450 uint32_t DeviationThreshold2ForI : 8; // Signed byte
451 uint32_t DeviationThreshold3ForI : 8; // Signed byte
452 };
453 struct
454 {
455 uint32_t Value;
456 };
457 } DW22;
458
459 union
460 {
461 struct
462 {
463 uint32_t DeviationThreshold4ForI : 8; // Signed byte
464 uint32_t DeviationThreshold5ForI : 8; // Signed byte
465 uint32_t DeviationThreshold6ForI : 8; // Signed byte
466 uint32_t DeviationThreshold7ForI : 8; // Signed byte
467 };
468 struct
469 {
470 uint32_t Value;
471 };
472 } DW23;
473
474 union
475 {
476 struct
477 {
478 uint32_t NumTLevels : 8;
479 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer0 : 8;
480 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer1 : 8;
481 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer2 : 8;
482 };
483 struct
484 {
485 uint32_t Value;
486 };
487 } DW24;
488
489 union
490 {
491 struct
492 {
493 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer3 : 8;
494 uint32_t Reserved : 24;
495 };
496 struct
497 {
498 uint32_t Value;
499 };
500 } DW25;
501
502 union
503 {
504 struct
505 {
506 uint32_t HistoryBufferBTI : 32; // Signed byte
507 };
508 struct
509 {
510 uint32_t Value;
511 };
512 } DW26;
513
514 union
515 {
516 struct
517 {
518 uint32_t DistortionBufferBTI : 32; // Signed byte
519 };
520 struct
521 {
522 uint32_t Value;
523 };
524 } DW27;
525
526 };
527
528 struct MediaObjectVp8BrcUpdateStaticDataG9
529 {
530 union
531 {
532 struct
533 {
534 uint32_t TargetSize : 32;
535 };
536 struct
537 {
538 uint32_t Value;
539 };
540 } DW0;
541
542 union
543 {
544 struct
545 {
546 uint32_t FrameNumber : 32;
547 };
548 struct
549 {
550 uint32_t Value;
551 };
552 } DW1;
553
554 union
555 {
556 struct
557 {
558 uint32_t PictureHeaderSize : 32;
559 };
560 struct
561 {
562 uint32_t Value;
563 };
564 } DW2;
565
566 union
567 {
568 struct
569 {
570 uint32_t startGAdjFrame0 : 16;
571 uint32_t startGAdjFrame1 : 16;
572 };
573 struct
574 {
575 uint32_t Value;
576 };
577 } DW3;
578
579 union
580 {
581 struct
582 {
583 uint32_t startGAdjFrame2 : 16;
584 uint32_t startGAdjFrame3 : 16;
585 };
586 struct
587 {
588 uint32_t Value;
589 };
590 } DW4;
591
592 union
593 {
594 struct
595 {
596 uint32_t TargetSizeFlag : 8;
597 uint32_t BRCFlag : 8;
598 uint32_t MaxNumPAKs : 8;
599 uint32_t CurrFrameType : 8;
600 };
601 struct
602 {
603 uint32_t Value;
604 };
605 } DW5;
606
607 // This offset indicates the byte position of the q_scale_type bit
608 // in the 2nd level batch buffer containing the INSERT_OBJ command
609 // for inserting the picture header data into the bitstream.
610 // This offset includes the 8 bytes of the INSERT command at the
611 // beginning of the buffer.
612 // Similarly for the VbvDelay field.
613 union
614 {
615 struct
616 {
617 uint32_t TID : 8;
618 uint32_t NumTLevels : 8;
619 uint32_t Reserved : 16;
620 };
621 struct
622 {
623 uint32_t Value;
624 };
625 } DW6;
626
627 // This size is the size of the entire 2nd level batch buffer
628 // containing the INSERT_OBJ command for inserting the
629 // picture header data into the bitstream. It includes the batch buffer end
630 // command at the end of the buffer.
631 union
632 {
633 struct
634 {
635 uint32_t Reserved0 : 32;
636 };
637 struct
638 {
639 uint32_t Value;
640 };
641
642 } DW7;
643
644 union
645 {
646 struct
647 {
648 uint32_t StartGlobalAdjustMult0 : 8;
649 uint32_t StartGlobalAdjustMult1 : 8;
650 uint32_t StartGlobalAdjustMult2 : 8;
651 uint32_t StartGlobalAdjustMult3 : 8;
652 };
653 struct
654 {
655 uint32_t Value;
656 };
657 } DW8;
658
659 union
660 {
661 struct
662 {
663 uint32_t StartGlobalAdjustMult4 : 8;
664 uint32_t StartGlobalAdjustDiv0 : 8;
665 uint32_t StartGlobalAdjustDiv1 : 8;
666 uint32_t StartGlobalAdjustDiv2 : 8;
667 };
668 struct
669 {
670 uint32_t Value;
671 };
672 } DW9;
673
674 union
675 {
676 struct
677 {
678 uint32_t StartGlobalAdjustDiv3 : 8;
679 uint32_t StartGlobalAdjustDiv4 : 8;
680 uint32_t QPThreshold0 : 8;
681 uint32_t QPThreshold1 : 8;
682 };
683 struct
684 {
685 uint32_t Value;
686 };
687 } DW10;
688
689 union
690 {
691 struct
692 {
693 uint32_t QPThreshold2 : 8;
694 uint32_t QPThreshold3 : 8;
695 uint32_t gRateRatioThreshold0 : 8;
696 uint32_t gRateRatioThreshold1 : 8;
697 };
698 struct
699 {
700 uint32_t Value;
701 };
702 } DW11;
703
704 union
705 {
706 struct
707 {
708 uint32_t gRateRatioThreshold2 : 8;
709 uint32_t gRateRatioThreshold3 : 8;
710 uint32_t gRateRatioThreshold4 : 8;
711 uint32_t gRateRatioThreshold5 : 8;
712 };
713 struct
714 {
715 uint32_t Value;
716 };
717 } DW12;
718
719 union
720 {
721 struct
722 {
723 uint32_t gRateRatioThresholdQP0 : 8;
724 uint32_t gRateRatioThresholdQP1 : 8;
725 uint32_t gRateRatioThresholdQP2 : 8;
726 uint32_t gRateRatioThresholdQP3 : 8;
727 };
728 struct
729 {
730 uint32_t Value;
731 };
732 } DW13;
733
734 union
735 {
736 struct
737 {
738 uint32_t gRateRatioThresholdQP4 : 8;
739 uint32_t gRateRatioThresholdQP5 : 8;
740 uint32_t gRateRatioThresholdQP6 : 8;
741 uint32_t IndexOfPreviousQP : 8;
742 };
743 struct
744 {
745 uint32_t Value;
746 };
747 } DW14;
748
749 union
750 {
751 struct
752 {
753 uint32_t FrameWidthInMB : 16;
754 uint32_t FrameHeightInMB : 16;
755 };
756 struct
757 {
758 uint32_t Value;
759 };
760 } DW15;
761
762 union
763 {
764 struct
765 {
766 uint32_t PFrameQPSeg0 : 8;
767 uint32_t PFrameQPSeg1 : 8;
768 uint32_t PFrameQPSeg2 : 8;
769 uint32_t PFrameQPSeg3 : 8;
770 };
771 struct
772 {
773 uint32_t Value;
774 };
775 } DW16;
776
777 union
778 {
779 struct
780 {
781 uint32_t KeyFrameQPSeg0 : 8;
782 uint32_t KeyFrameQPSeg1 : 8;
783 uint32_t KeyFrameQPSeg2 : 8;
784 uint32_t KeyFrameQPSeg3 : 8;
785 };
786 struct
787 {
788 uint32_t Value;
789 };
790 } DW17;
791
792 union
793 {
794 struct
795 {
796 uint32_t QDeltaPlane0 : 8;
797 uint32_t QDeltaPlane1 : 8;
798 uint32_t QDeltaPlane2 : 8;
799 uint32_t QDeltaPlane3 : 8;
800 };
801 struct
802 {
803 uint32_t Value;
804 };
805 } DW18;
806
807 union
808 {
809 struct
810 {
811 uint32_t QDeltaPlane4 : 8;
812 uint32_t QIndex : 8;
813 uint32_t MainRef : 8;
814 uint32_t RefFrameFlags : 8;
815 };
816 struct
817 {
818 uint32_t Value;
819 };
820 } DW19;
821
822 union
823 {
824 struct
825 {
826 uint32_t SegOn : 8;
827 uint32_t MBRC : 8;
828 uint32_t BRCMethod : 8;
829 uint32_t VMEIntraPrediction : 8;
830 };
831 struct
832 {
833 uint32_t Value;
834 };
835 } DW20;
836
837 union
838 {
839 struct
840 {
841 uint32_t CurrentFrameQPIndex : 8;
842 uint32_t LastFrameQPIndex : 8;
843 uint32_t GoldFrameQPIndex : 8;
844 uint32_t AltFrameQPIndex : 8;
845 };
846 struct
847 {
848 uint32_t Value;
849 };
850 } DW21;
851
852 union
853 {
854 struct
855 {
856 uint32_t HistorytBufferBTI : 32;
857 };
858 struct
859 {
860 uint32_t Value;
861 };
862 } DW22;
863
864 union
865 {
866 struct
867 {
868 uint32_t PakStatisticsBTI : 32;
869 };
870 struct
871 {
872 uint32_t Value;
873 };
874 } DW23;
875
876 union
877 {
878 struct
879 {
880 uint32_t MfxVp8EncoderCfgReadBTI :32;
881 };
882 struct
883 {
884 uint32_t Value;
885 };
886 } DW24;
887
888 union
889 {
890 struct
891 {
892 uint32_t MfxVp8EncoderCfgWriteBTI : 32;
893 };
894 struct
895 {
896 uint32_t Value;
897 };
898 } DW25;
899
900 union
901 {
902 struct
903 {
904 uint32_t MBEncCurbeReadBTI : 32;
905 };
906 struct
907 {
908 uint32_t Value;
909 };
910 } DW26;
911
912 union
913 {
914 struct
915 {
916 uint32_t MBEncCurbeWriteBTI : 32;
917 };
918 struct
919 {
920 uint32_t Value;
921 };
922 } DW27;
923
924 union
925 {
926 struct
927 {
928 uint32_t DistortionBTI : 32;
929 };
930 struct
931 {
932 uint32_t Value;
933 };
934 } DW28;
935
936 union
937 {
938 struct
939 {
940 uint32_t ConstantDataBTI : 32;
941 };
942 struct
943 {
944 uint32_t Value;
945 };
946 } DW29;
947
948 union
949 {
950 struct
951 {
952 uint32_t SegmentMapBTI : 32;
953 };
954 struct
955 {
956 uint32_t Value;
957 };
958 } DW30;
959
960 union
961 {
962 struct
963 {
964 uint32_t MpuCurbeReadBTI : 32;
965 };
966 struct
967 {
968 uint32_t Value;
969 };
970 } DW31;
971
972 union
973 {
974 struct
975 {
976 uint32_t MpuCurbeWriteBTI : 32;
977 };
978 struct
979 {
980 uint32_t Value;
981 };
982 } DW32;
983
984 union
985 {
986 struct
987 {
988 uint32_t TpuCurbeReadBTI : 32;
989 };
990 struct
991 {
992 uint32_t Value;
993 };
994 } DW33;
995
996 union
997 {
998 struct
999 {
1000 uint32_t TpuCurbeWriteBTI : 32;
1001 };
1002 struct
1003 {
1004 uint32_t Value;
1005 };
1006 } DW34;
1007
1008 };
1009
1010 struct MediaObjectVp8MeStaticDataG9
1011 {
1012 // DW0
1013 union
1014 {
1015 struct
1016 {
1017 uint32_t SkipModeEn : MOS_BITFIELD_BIT(0);
1018 uint32_t AdaptiveEn : MOS_BITFIELD_BIT(1);
1019 uint32_t BiMixDis : MOS_BITFIELD_BIT(2);
1020 uint32_t Reserved0 : MOS_BITFIELD_RANGE(3, 4);
1021 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT(5);
1022 uint32_t Reserved1 : MOS_BITFIELD_BIT(6);
1023 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT(7);
1024 uint32_t Reserved2 : MOS_BITFIELD_RANGE(8,23);
1025 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE(24,31);
1026 };
1027 struct
1028 {
1029 uint32_t Value;
1030 };
1031 } DW0;
1032
1033 // DW1
1034 union
1035 {
1036 struct
1037 {
1038 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE(0,5);
1039 uint32_t Reserved0 : MOS_BITFIELD_RANGE(6,15);
1040 uint32_t BiWeight : MOS_BITFIELD_RANGE(16,21);
1041 uint32_t Reserved1 : MOS_BITFIELD_RANGE(22,27);
1042 uint32_t UniMixDisable : MOS_BITFIELD_BIT(28);
1043 uint32_t Reserved2 : MOS_BITFIELD_RANGE(29,31);
1044 };
1045 struct
1046 {
1047 uint32_t Value;
1048 };
1049 } DW1;
1050
1051 // DW2
1052 union
1053 {
1054 struct
1055 {
1056 uint32_t MaxLenSP : MOS_BITFIELD_RANGE(0,7);
1057 uint32_t MaxNumSU : MOS_BITFIELD_RANGE(8,15);
1058 uint32_t Reserved0 : MOS_BITFIELD_RANGE(16,31);
1059 };
1060 struct
1061 {
1062 uint32_t Value;
1063 };
1064 } DW2;
1065
1066 // DW3
1067 union
1068 {
1069 struct
1070 {
1071 uint32_t SrcSize : MOS_BITFIELD_RANGE(0,1);
1072 uint32_t Reserved0 : MOS_BITFIELD_RANGE(2,3);
1073 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE(4,5);
1074 uint32_t SrcAccess : MOS_BITFIELD_BIT(6);
1075 uint32_t RefAccess : MOS_BITFIELD_BIT(7);
1076 uint32_t SearchCtrl : MOS_BITFIELD_RANGE(8,10);
1077 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT(11);
1078 uint32_t SubPelMode : MOS_BITFIELD_RANGE(12,13);
1079 uint32_t SkipType : MOS_BITFIELD_BIT(14);
1080 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT(15);
1081 uint32_t InterChromaMode : MOS_BITFIELD_BIT(16);
1082 uint32_t FTEnable : MOS_BITFIELD_BIT(17);
1083 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT(18);
1084 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT(19);
1085 uint32_t InterSAD : MOS_BITFIELD_RANGE(20,21);
1086 uint32_t IntraSAD : MOS_BITFIELD_RANGE(22,23);
1087 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE(24,30);
1088 uint32_t Reserved1 : MOS_BITFIELD_BIT(31);
1089 };
1090 struct
1091 {
1092 uint32_t Value;
1093 };
1094 } DW3;
1095
1096 // DW4
1097 union
1098 {
1099 struct
1100 {
1101 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,7);
1102 uint32_t PictureHeightMinus1 : MOS_BITFIELD_RANGE(8,15);
1103 uint32_t PictureWidth : MOS_BITFIELD_RANGE(16,23);
1104 uint32_t Reserved1 : MOS_BITFIELD_RANGE(24,31);
1105 };
1106 struct
1107 {
1108 uint32_t Value;
1109 };
1110 } DW4;
1111
1112 // DW5
1113 union
1114 {
1115 struct
1116 {
1117 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,7);
1118 uint32_t QpPrimeY : MOS_BITFIELD_RANGE(8,15);
1119 uint32_t RefWidth : MOS_BITFIELD_RANGE(16,23);
1120 uint32_t RefHeight : MOS_BITFIELD_RANGE(24,31);
1121
1122 };
1123 struct
1124 {
1125 uint32_t Value;
1126 };
1127 } DW5;
1128
1129 // DW6
1130 union
1131 {
1132 struct
1133 {
1134 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,2);
1135 uint32_t MEModes : MOS_BITFIELD_RANGE(3,4);
1136 uint32_t Reserved1 : MOS_BITFIELD_RANGE(5,7);
1137 uint32_t SuperCombineDist : MOS_BITFIELD_RANGE(8,15);
1138 uint32_t MaxVmvR : MOS_BITFIELD_RANGE(16,31);
1139 };
1140 struct
1141 {
1142 uint32_t Value;
1143 };
1144 } DW6;
1145
1146 // DW7
1147 union
1148 {
1149 struct
1150 {
1151 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,15);
1152 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE(16,17);
1153 uint32_t BilinearEnable : MOS_BITFIELD_BIT(18);
1154 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT(19);
1155 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT(20);
1156 uint32_t AConlyHAAR : MOS_BITFIELD_BIT(21);
1157 uint32_t RefIDCostMode : MOS_BITFIELD_BIT(22);
1158 uint32_t Reserved1 : MOS_BITFIELD_BIT(23);
1159 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE(24,31);
1160 };
1161 struct
1162 {
1163 uint32_t Value;
1164 };
1165 } DW7;
1166
1167 // DW8
1168 union
1169 {
1170 struct
1171 {
1172 uint32_t Mode0Cost : MOS_BITFIELD_RANGE(0,7);
1173 uint32_t Mode1Cost : MOS_BITFIELD_RANGE(8,15);
1174 uint32_t Mode2Cost : MOS_BITFIELD_RANGE(16,23);
1175 uint32_t Mode3Cost : MOS_BITFIELD_RANGE(24,31);
1176 };
1177 struct
1178 {
1179 uint32_t Value;
1180 };
1181 } DW8;
1182
1183 // DW9
1184 union
1185 {
1186 struct
1187 {
1188 uint32_t Mode4Cost : MOS_BITFIELD_RANGE(0,7);
1189 uint32_t Mode5Cost : MOS_BITFIELD_RANGE(8,15);
1190 uint32_t Mode6Cost : MOS_BITFIELD_RANGE(16,23);
1191 uint32_t Mode7Cost : MOS_BITFIELD_RANGE(24,31);
1192 };
1193 struct
1194 {
1195 uint32_t Value;
1196 };
1197 } DW9;
1198
1199 // DW10
1200 union
1201 {
1202 struct
1203 {
1204 uint32_t Mode8Cost : MOS_BITFIELD_RANGE(0,7);
1205 uint32_t Mode9Cost : MOS_BITFIELD_RANGE(8,15);
1206 uint32_t RefIDCost : MOS_BITFIELD_RANGE(16,23);
1207 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE(24,31);
1208 };
1209 struct
1210 {
1211 uint32_t Value;
1212 };
1213 } DW10;
1214
1215 // DW11
1216 union
1217 {
1218 struct
1219 {
1220 uint32_t MV0Cost : MOS_BITFIELD_RANGE(0,7);
1221 uint32_t MV1Cost : MOS_BITFIELD_RANGE(8,15);
1222 uint32_t MV2Cost : MOS_BITFIELD_RANGE(16,23);
1223 uint32_t MV3Cost : MOS_BITFIELD_RANGE(24,31);
1224 };
1225 struct
1226 {
1227 uint32_t Value;
1228 };
1229 } DW11;
1230
1231 // DW12
1232 union
1233 {
1234 struct
1235 {
1236 uint32_t MV4Cost : MOS_BITFIELD_RANGE(0,7);
1237 uint32_t MV5Cost : MOS_BITFIELD_RANGE(8,15);
1238 uint32_t MV6Cost : MOS_BITFIELD_RANGE(16,23);
1239 uint32_t MV7Cost : MOS_BITFIELD_RANGE(24,31);
1240 };
1241 struct
1242 {
1243 uint32_t Value;
1244 };
1245 } DW12;
1246
1247 // DW13
1248 union
1249 {
1250 struct
1251 {
1252 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE(0,7);
1253 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE(8,15);
1254 uint32_t ActualMBWidth : MOS_BITFIELD_RANGE(16,23);
1255 uint32_t ActualMBHeight : MOS_BITFIELD_RANGE(24,31);
1256 };
1257 struct
1258 {
1259 uint32_t Value;
1260 };
1261 } DW13;
1262
1263 // DW14
1264 union
1265 {
1266 struct
1267 {
1268 uint32_t L0RefPicPolarityBits : MOS_BITFIELD_RANGE(0,7);
1269 uint32_t L1RefPicPolarityBits : MOS_BITFIELD_RANGE(8,9);
1270 uint32_t Reserved : MOS_BITFIELD_RANGE(10,31);
1271 };
1272 struct
1273 {
1274 uint32_t Value;
1275 };
1276 } DW14;
1277
1278 // DW15
1279 union
1280 {
1281 struct
1282 {
1283 uint32_t Reserved : MOS_BITFIELD_RANGE(0,31);
1284 };
1285 struct
1286 {
1287 uint32_t Value;
1288 };
1289 } DW15;
1290
1291 struct
1292 {
1293 // DW16
1294 union
1295 {
1296 struct
1297 {
1298 SearchPathDelta SPDelta_0;
1299 SearchPathDelta SPDelta_1;
1300 SearchPathDelta SPDelta_2;
1301 SearchPathDelta SPDelta_3;
1302 };
1303 struct
1304 {
1305 uint32_t Value;
1306 };
1307 } DW16;
1308
1309 // DW17
1310 union
1311 {
1312 struct
1313 {
1314 SearchPathDelta SPDelta_4;
1315 SearchPathDelta SPDelta_5;
1316 SearchPathDelta SPDelta_6;
1317 SearchPathDelta SPDelta_7;
1318 };
1319 struct
1320 {
1321 uint32_t Value;
1322 };
1323 } DW17;
1324
1325 // DW18
1326 union
1327 {
1328 struct
1329 {
1330 SearchPathDelta SPDelta_8;
1331 SearchPathDelta SPDelta_9;
1332 SearchPathDelta SPDelta_10;
1333 SearchPathDelta SPDelta_11;
1334 };
1335 struct
1336 {
1337 uint32_t Value;
1338 };
1339 } DW18;
1340
1341 // DW19
1342 union
1343 {
1344 struct
1345 {
1346 SearchPathDelta SPDelta_12;
1347 SearchPathDelta SPDelta_13;
1348 SearchPathDelta SPDelta_14;
1349 SearchPathDelta SPDelta_15;
1350 };
1351 struct
1352 {
1353 uint32_t Value;
1354 };
1355 } DW19;
1356
1357 // DW20
1358 union
1359 {
1360 struct
1361 {
1362 SearchPathDelta SPDelta_16;
1363 SearchPathDelta SPDelta_17;
1364 SearchPathDelta SPDelta_18;
1365 SearchPathDelta SPDelta_19;
1366 };
1367 struct
1368 {
1369 uint32_t Value;
1370 };
1371 } DW20;
1372
1373 // DW21
1374 union
1375 {
1376 struct
1377 {
1378 SearchPathDelta SPDelta_20;
1379 SearchPathDelta SPDelta_21;
1380 SearchPathDelta SPDelta_22;
1381 SearchPathDelta SPDelta_23;
1382 };
1383 struct
1384 {
1385 uint32_t Value;
1386 };
1387 } DW21;
1388
1389 // DW22
1390 union
1391 {
1392 struct
1393 {
1394 SearchPathDelta SPDelta_24;
1395 SearchPathDelta SPDelta_25;
1396 SearchPathDelta SPDelta_26;
1397 SearchPathDelta SPDelta_27;
1398 };
1399 struct
1400 {
1401 uint32_t Value;
1402 };
1403 } DW22;
1404
1405 // DW23
1406 union
1407 {
1408 struct
1409 {
1410 SearchPathDelta SPDelta_28;
1411 SearchPathDelta SPDelta_29;
1412 SearchPathDelta SPDelta_30;
1413 SearchPathDelta SPDelta_31;
1414 };
1415 struct
1416 {
1417 uint32_t Value;
1418 };
1419 } DW23;
1420
1421 // DW24
1422 union
1423 {
1424 struct
1425 {
1426 SearchPathDelta SPDelta_32;
1427 SearchPathDelta SPDelta_33;
1428 SearchPathDelta SPDelta_34;
1429 SearchPathDelta SPDelta_35;
1430 };
1431 struct
1432 {
1433 uint32_t Value;
1434 };
1435 } DW24;
1436
1437 // DW25
1438 union
1439 {
1440 struct
1441 {
1442 SearchPathDelta SPDelta_36;
1443 SearchPathDelta SPDelta_37;
1444 SearchPathDelta SPDelta_38;
1445 SearchPathDelta SPDelta_39;
1446 };
1447 struct
1448 {
1449 uint32_t Value;
1450 };
1451 } DW25;
1452
1453 // DW26
1454 union
1455 {
1456 struct
1457 {
1458 SearchPathDelta SPDelta_40;
1459 SearchPathDelta SPDelta_41;
1460 SearchPathDelta SPDelta_42;
1461 SearchPathDelta SPDelta_43;
1462 };
1463 struct
1464 {
1465 uint32_t Value;
1466 };
1467 } DW26;
1468
1469 // DW27
1470 union
1471 {
1472 struct
1473 {
1474 SearchPathDelta SPDelta_44;
1475 SearchPathDelta SPDelta_45;
1476 SearchPathDelta SPDelta_46;
1477 SearchPathDelta SPDelta_47;
1478 };
1479 struct
1480 {
1481 uint32_t Value;
1482 };
1483 } DW27;
1484
1485 // DW28
1486 union
1487 {
1488 struct
1489 {
1490 SearchPathDelta SPDelta_48;
1491 SearchPathDelta SPDelta_49;
1492 SearchPathDelta SPDelta_50;
1493 SearchPathDelta SPDelta_51;
1494 };
1495 struct
1496 {
1497 uint32_t Value;
1498 };
1499 } DW28;
1500
1501 // DW29
1502 union
1503 {
1504 struct
1505 {
1506 SearchPathDelta SPDelta_52;
1507 SearchPathDelta SPDelta_53;
1508 SearchPathDelta SPDelta_54;
1509 SearchPathDelta SPDelta_55;
1510 };
1511 struct
1512 {
1513 uint32_t Value;
1514 };
1515 } DW29;
1516 } SpDelta;
1517
1518 // DW30
1519 union
1520 {
1521 struct
1522 {
1523 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,31);
1524 };
1525 struct
1526 {
1527 uint32_t Value;
1528 };
1529 } DW30;
1530
1531 // DW31
1532 union
1533 {
1534 struct
1535 {
1536 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,31);
1537 };
1538 struct
1539 {
1540 uint32_t Value;
1541 };
1542 } DW31;
1543
1544 // DW32
1545 union
1546 {
1547 struct
1548 {
1549 uint32_t VP8MeMVOutputDataBTI : MOS_BITFIELD_RANGE(0,31);
1550 };
1551 struct
1552 {
1553 uint32_t Value;
1554 };
1555 } DW32;
1556
1557 // DW33
1558 union
1559 {
1560 struct
1561 {
1562 uint32_t VP8MeMVInputDataBTI : MOS_BITFIELD_RANGE(0,31);
1563 };
1564 struct
1565 {
1566 uint32_t Value;
1567 };
1568 } DW33;
1569
1570 // DW34
1571 union
1572 {
1573 struct
1574 {
1575 uint32_t VP8MeDistortionBTI : MOS_BITFIELD_RANGE(0,31);
1576 };
1577 struct
1578 {
1579 uint32_t Value;
1580 };
1581 } DW34;
1582
1583 // DW35
1584 union
1585 {
1586 struct
1587 {
1588 uint32_t VP8MeMinDistBrcBTI : MOS_BITFIELD_RANGE(0,31);
1589 };
1590 struct
1591 {
1592 uint32_t Value;
1593 };
1594 } DW35;
1595
1596 // DW36
1597 union
1598 {
1599 struct
1600 {
1601 uint32_t ForwardRefBTI : MOS_BITFIELD_RANGE(0,31);
1602 };
1603 struct
1604 {
1605 uint32_t Value;
1606 };
1607 } DW36;
1608
1609 // DW37
1610 union
1611 {
1612 struct
1613 {
1614 uint32_t BackwardRefBTI : MOS_BITFIELD_RANGE(0,31);
1615 };
1616 struct
1617 {
1618 uint32_t Value;
1619 };
1620 } DW37;
1621 };
1622 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct MediaObjectVp8MeStaticDataG9)) == 38);
1623
1624 struct MediaObjectVp8MbencIStaticDataG9
1625 {
1626 // DW0
1627 union
1628 {
1629 struct
1630 {
1631 uint32_t FrameWidth : 16;
1632 uint32_t FrameHeight : 16;
1633 };
1634 struct
1635 {
1636 uint32_t Value;
1637 };
1638 } DW0;
1639
1640 // DW1
1641 union
1642 {
1643 struct
1644 {
1645 uint32_t FrameType : 1;
1646 uint32_t EnableSegmentation : 1;
1647 uint32_t EnableHWIntraPrediction : 1;
1648 uint32_t EnableDebugDumps : 1;
1649 uint32_t EnableCoeffClamp : 1;
1650 uint32_t EnableEnableChromaIPEnhancement : 1;
1651 uint32_t EnableMPUHistogramUpdate : 1;
1652 uint32_t ReservedMBZ : 1;
1653 uint32_t VMEEnableTMCheck : 1;
1654 uint32_t VMEDistortionMeasure : 2;
1655 uint32_t : 21;
1656 };
1657 struct
1658 {
1659 uint32_t Value;
1660 };
1661 } DW1;
1662
1663 // DW2
1664 union
1665 {
1666 struct
1667 {
1668 uint32_t LambdaSegment0 : 16;
1669 uint32_t LambdaSegment1 : 16;
1670 };
1671 struct
1672 {
1673 uint32_t Value;
1674 };
1675 } DW2;
1676
1677 // DW3
1678 union
1679 {
1680 struct
1681 {
1682 uint32_t LambdaSegment2 : 16;
1683 uint32_t LambdaSegment3 : 16;
1684 };
1685 struct
1686 {
1687 uint32_t Value;
1688 };
1689 } DW3;
1690
1691 // DW4
1692 union
1693 {
1694 struct
1695 {
1696 uint32_t AllDCBiasSegment0 : 16;
1697 uint32_t AllDCBiasSegment1 : 16;
1698 };
1699 struct
1700 {
1701 uint32_t Value;
1702 };
1703 } DW4;
1704
1705 // DW5
1706 union
1707 {
1708 struct
1709 {
1710 uint32_t AllDCBiasSegment2 : 16;
1711 uint32_t AllDCBiasSegment3 : 16;
1712 };
1713 struct
1714 {
1715 uint32_t Value;
1716 };
1717 } DW5;
1718
1719 // DW6
1720 union
1721 {
1722 struct
1723 {
1724 uint32_t ChromaDCDeQuantSegment0 : 16;
1725 uint32_t ChromaDCDeQuantSegment1 : 16;
1726 };
1727 struct
1728 {
1729 uint32_t Value;
1730 };
1731 } DW6;
1732
1733 // DW7
1734 union
1735 {
1736 struct
1737 {
1738 uint32_t ChromaDCDeQuantSegment2 : 16;
1739 uint32_t ChromaDCDeQuantSegment3 : 16;
1740 };
1741 struct
1742 {
1743 uint32_t Value;
1744 };
1745 } DW7;
1746
1747 // DW8
1748 union
1749 {
1750 struct
1751 {
1752 uint32_t ChromaACDeQuantSegment0 : 16;
1753 uint32_t ChromaACDeQuantSegment1 : 16;
1754 };
1755 struct
1756 {
1757 uint32_t Value;
1758 };
1759 } DW8;
1760
1761 // DW9
1762 union
1763 {
1764 struct
1765 {
1766 uint32_t ChromaACDeQuantSegment2 : 16;
1767 uint32_t ChromaACDeQuantSegment3 : 16;
1768 };
1769 struct
1770 {
1771 uint32_t Value;
1772 };
1773 } DW9;
1774
1775 // DW10
1776 union
1777 {
1778 struct
1779 {
1780 uint32_t ChromaAC0Threshold0Segment0 : 16;
1781 uint32_t ChromaAC0Threshold1Segment0 : 16;
1782 };
1783 struct
1784 {
1785 uint32_t Value;
1786 };
1787 } DW10;
1788
1789 // DW11
1790 union
1791 {
1792 struct
1793 {
1794 uint32_t ChromaAC0Threshold0Segment1 : 16;
1795 uint32_t ChromaAC0Threshold1Segment1 : 16;
1796 };
1797 struct
1798 {
1799 uint32_t Value;
1800 };
1801 } DW11;
1802
1803 // DW12
1804 union
1805 {
1806 struct
1807 {
1808 uint32_t ChromaAC0Threshold0Segment2 : 16;
1809 uint32_t ChromaAC0Threshold1Segment2 : 16;
1810 };
1811 struct
1812 {
1813 uint32_t Value;
1814 };
1815 } DW12;
1816
1817 // DW13
1818 union
1819 {
1820 struct
1821 {
1822 uint32_t ChromaAC0Threshold0Segment3 : 16;
1823 uint32_t ChromaAC0Threshold1Segment3 : 16;
1824 };
1825 struct
1826 {
1827 uint32_t Value;
1828 };
1829 } DW13;
1830
1831 // DW14
1832 union
1833 {
1834 struct
1835 {
1836 uint32_t ChromaDCThreshold0Segment0 : 16;
1837 uint32_t ChromaDCThreshold1Segment0 : 16;
1838 };
1839 struct
1840 {
1841 uint32_t Value;
1842 };
1843 } DW14;
1844
1845 // DW15
1846 union
1847 {
1848 struct
1849 {
1850 uint32_t ChromaDCThreshold2Segment0 : 16;
1851 uint32_t ChromaDCThreshold3Segment0 : 16;
1852 };
1853 struct
1854 {
1855 uint32_t Value;
1856 };
1857 } DW15;
1858
1859 // DW16
1860 union
1861 {
1862 struct
1863 {
1864 uint32_t ChromaDCThreshold0Segment1 : 16;
1865 uint32_t ChromaDCThreshold1Segment1 : 16;
1866 };
1867 struct
1868 {
1869 uint32_t Value;
1870 };
1871 } DW16;
1872
1873 // DW17
1874 union
1875 {
1876 struct
1877 {
1878 uint32_t ChromaDCThreshold2Segment1 : 16;
1879 uint32_t ChromaDCThreshold3Segment1 : 16;
1880 };
1881 struct
1882 {
1883 uint32_t Value;
1884 };
1885 } DW17;
1886
1887 // DW18
1888 union
1889 {
1890 struct
1891 {
1892 uint32_t ChromaDCThreshold0Segment2 : 16;
1893 uint32_t ChromaDCThreshold1Segment2 : 16;
1894 };
1895 struct
1896 {
1897 uint32_t Value;
1898 };
1899 } DW18;
1900
1901 // DW19
1902 union
1903 {
1904 struct
1905 {
1906 uint32_t ChromaDCThreshold2Segment2 : 16;
1907 uint32_t ChromaDCThreshold3Segment2 : 16;
1908 };
1909 struct
1910 {
1911 uint32_t Value;
1912 };
1913 } DW19;
1914
1915 // DW20
1916 union
1917 {
1918 struct
1919 {
1920 uint32_t ChromaDCThreshold0Segment3 : 16;
1921 uint32_t ChromaDCThreshold1Segment3 : 16;
1922 };
1923 struct
1924 {
1925 uint32_t Value;
1926 };
1927 } DW20;
1928
1929 // DW21
1930 union
1931 {
1932 struct
1933 {
1934 uint32_t ChromaDCThreshold2Segment3 : 16;
1935 uint32_t ChromaDCThreshold3Segment3 : 16;
1936 };
1937 struct
1938 {
1939 uint32_t Value;
1940 };
1941 } DW21;
1942
1943 // DW22
1944 union
1945 {
1946 struct
1947 {
1948 uint32_t ChromaAC1ThresholdSegment0 : 16;
1949 uint32_t ChromaAC1ThresholdSegment1 : 16;
1950 };
1951 struct
1952 {
1953 uint32_t Value;
1954 };
1955 } DW22;
1956
1957 // DW23
1958 union
1959 {
1960 struct
1961 {
1962 uint32_t ChromaAC1ThresholdSegment2 : 16;
1963 uint32_t ChromaAC1ThresholdSegment3 : 16;
1964 };
1965 struct
1966 {
1967 uint32_t Value;
1968 };
1969 } DW23;
1970
1971 // DW24
1972 union
1973 {
1974 struct
1975 {
1976 uint32_t VME16x16CostSegment0 : 8;
1977 uint32_t VME16x16CostSegment1 : 8;
1978 uint32_t VME16x16CostSegment2 : 8;
1979 uint32_t VME16x16CostSegment3 : 8;
1980 };
1981 struct
1982 {
1983 uint32_t Value;
1984 };
1985 } DW24;
1986
1987 // DW25
1988 union
1989 {
1990 struct
1991 {
1992 uint32_t VME4x4CostSegment0 : 8;
1993 uint32_t VME4x4CostSegment1 : 8;
1994 uint32_t VME4x4CostSegment2 : 8;
1995 uint32_t VME4x4CostSegment3 : 8;
1996 };
1997 struct
1998 {
1999 uint32_t Value;
2000 };
2001 } DW25;
2002
2003 // DW26
2004 union
2005 {
2006 struct
2007 {
2008 uint32_t VME16x16NonDCPenaltySegment0 : 8;
2009 uint32_t VME16x16NonDCPenaltySegment1 : 8;
2010 uint32_t VME16x16NonDCPenaltySegment2 : 8;
2011 uint32_t VME16x16NonDCPenaltySegment3 : 8;
2012 };
2013 struct
2014 {
2015 uint32_t Value;
2016 };
2017 } DW26;
2018
2019 // DW27
2020 union
2021 {
2022 struct
2023 {
2024 uint32_t VME4x4NonDCPenaltySegment0 : 8;
2025 uint32_t VME4x4NonDCPenaltySegment1 : 8;
2026 uint32_t VME4x4NonDCPenaltySegment2 : 8;
2027 uint32_t VME4x4NonDCPenaltySegment3 : 8;
2028 };
2029 struct
2030 {
2031 uint32_t Value;
2032 };
2033 } DW27;
2034
2035 // DW28
2036 union
2037 {
2038 struct
2039 {
2040 uint32_t : 32;
2041 };
2042 struct
2043 {
2044 uint32_t Value;
2045 };
2046 } DW28;
2047
2048 // DW29
2049 union
2050 {
2051 struct
2052 {
2053 uint32_t : 32;
2054 };
2055 struct
2056 {
2057 uint32_t Value;
2058 };
2059 } DW29;
2060
2061 // DW30
2062 union
2063 {
2064 struct
2065 {
2066 uint32_t : 32;
2067 };
2068 struct
2069 {
2070 uint32_t Value;
2071 };
2072 } DW30;
2073
2074 // DW31
2075 union
2076 {
2077 struct
2078 {
2079 uint32_t : 32;
2080 };
2081 struct
2082 {
2083 uint32_t Value;
2084 };
2085 } DW31;
2086
2087 // DW32
2088 union
2089 {
2090 struct
2091 {
2092 uint32_t MBEncPerMBOutDataSurfBTI : 32;
2093 };
2094 struct
2095 {
2096 uint32_t Value;
2097 };
2098 } DW32;
2099
2100 // DW33
2101 union
2102 {
2103 struct
2104 {
2105 uint32_t MBEncCurrYBTI : 32;
2106 };
2107 struct
2108 {
2109 uint32_t Value;
2110 };
2111 } DW33;
2112
2113 // DW34
2114 union
2115 {
2116 struct
2117 {
2118 uint32_t MBEncCurrUVBTI : 32;
2119 };
2120 struct
2121 {
2122 uint32_t Value;
2123 };
2124 } DW34;
2125
2126 // DW35
2127 union
2128 {
2129 struct
2130 {
2131 uint32_t MBModeCostLumaBTI : 32;
2132 };
2133 struct
2134 {
2135 uint32_t Value;
2136 };
2137 } DW35;
2138
2139 // DW36
2140 union
2141 {
2142 struct
2143 {
2144 uint32_t MBEncBlockModeCostBTI : 32;
2145 };
2146 struct
2147 {
2148 uint32_t Value;
2149 };
2150 } DW36;
2151
2152 // DW37
2153 union
2154 {
2155 struct
2156 {
2157 uint32_t ChromaReconSurfBTI : 32;
2158 };
2159 struct
2160 {
2161 uint32_t Value;
2162 };
2163 } DW37;
2164
2165 // DW38
2166 union
2167 {
2168 struct
2169 {
2170 uint32_t SegmentationMapBTI : 32;
2171 };
2172 struct
2173 {
2174 uint32_t Value;
2175 };
2176 } DW38;
2177
2178 // DW39
2179 union
2180 {
2181 struct
2182 {
2183 uint32_t HistogramBTI : 32;
2184 };
2185 struct
2186 {
2187 uint32_t Value;
2188 };
2189 } DW39;
2190
2191 // DW40
2192 union
2193 {
2194 struct
2195 {
2196 uint32_t MBEncVMEDebugStreamOutBTI : 32;
2197 };
2198 struct
2199 {
2200 uint32_t Value;
2201 };
2202 } DW40;
2203
2204 // DW41
2205 union
2206 {
2207 struct
2208 {
2209 uint32_t VmeBTI : 32;
2210 };
2211 struct
2212 {
2213 uint32_t Value;
2214 };
2215 } DW41;
2216
2217 // DW42
2218 union
2219 {
2220 struct
2221 {
2222 uint32_t IDistortionSurfaceBTI : 32;
2223 };
2224 struct
2225 {
2226 uint32_t Value;
2227 };
2228 } DW42;
2229
2230 // DW43
2231 union
2232 {
2233 struct
2234 {
2235 uint32_t MBEncCurrYDownScaledBTI : 32;
2236 };
2237 struct
2238 {
2239 uint32_t Value;
2240 };
2241 } DW43;
2242
2243 // DW44
2244 union
2245 {
2246 struct
2247 {
2248 uint32_t MBEncVMECoarseIntraBTI : 32;
2249 };
2250 struct
2251 {
2252 uint32_t Value;
2253 };
2254 } DW44;
2255 } ;
2256 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct MediaObjectVp8MbencIStaticDataG9)) == 45);
2257
2258 struct MediaObjectVp8MbencPStaticDataG9
2259 {
2260 // DW0
2261 union
2262 {
2263 struct
2264 {
2265 uint32_t FrameWidth : 16;
2266 uint32_t FrameHeight : 16;
2267 };
2268 struct
2269 {
2270 uint32_t Value;
2271 };
2272 } DW0;
2273 //DW1
2274 union
2275 {
2276 struct
2277 {
2278 uint32_t FrameType :1;
2279 uint32_t MultiplePred :2;
2280 uint32_t HMEEnable :1;
2281 uint32_t HMECombineOverlap :2;
2282 uint32_t AllFractional :1;
2283 uint32_t EnableTemporalScalability :1;
2284 uint32_t HMECombinedExtraSU :8;
2285 uint32_t RefFrameFlags :4;
2286 uint32_t EnableSegmentation :1;
2287 uint32_t EnableSegmentationInfoUpdate :1;
2288 uint32_t EnableCoeffClamp :1;
2289 uint32_t MultiReferenceQPCheck :1;
2290 uint32_t ModecostEnableFlag :1;
2291 uint32_t MainRef :6;
2292 uint32_t EnableDebugDumps :1;
2293 };
2294 struct
2295 {
2296 uint32_t Value;
2297 };
2298
2299 } DW1;
2300
2301 //DW2
2302 union
2303 {
2304 struct
2305 {
2306 uint32_t LambdaIntraSegment0 :16;
2307 uint32_t LambdaInterSegment0 :16;
2308 };
2309 struct
2310 {
2311 uint32_t Value;
2312 };
2313 } DW2;
2314
2315 //DW3
2316 union
2317 {
2318 struct
2319 {
2320 uint32_t LambdaIntraSegment1 :16;
2321 uint32_t LambdaInterSegment1 :16;
2322 };
2323 struct
2324 {
2325 uint32_t Value;
2326 };
2327 } DW3;
2328
2329 //DW4
2330 union
2331 {
2332 struct
2333 {
2334 uint32_t LambdaIntraSegment2 :16;
2335 uint32_t LambdaInterSegment2 :16;
2336 };
2337 struct
2338 {
2339 uint32_t Value;
2340 };
2341 } DW4;
2342
2343 //DW5
2344 union
2345 {
2346 struct
2347 {
2348 uint32_t LambdaIntraSegment3 :16;
2349 uint32_t LambdaInterSegment3 :16;
2350 };
2351 struct
2352 {
2353 uint32_t Value;
2354 };
2355 } DW5;
2356
2357 // DW6
2358 union
2359 {
2360 struct
2361 {
2362 uint32_t ReferenceFrameSignBias_0 : 8;
2363 uint32_t ReferenceFrameSignBias_1 : 8;
2364 uint32_t ReferenceFrameSignBias_2 : 8;
2365 uint32_t ReferenceFrameSignBias_3 : 8;
2366 };
2367 struct
2368 {
2369 uint32_t Value;
2370 };
2371 } DW6;
2372
2373 //DW7
2374 union
2375 {
2376 struct
2377 {
2378 uint32_t RawDistThreshold :16;
2379 uint32_t TemporalLayerID :8;
2380 uint32_t ReservedMBZ :8;
2381 };
2382 struct
2383 {
2384 uint32_t Value;
2385 };
2386 } DW7;
2387
2388 //DW8
2389 union
2390 {
2391 struct
2392 {
2393 uint32_t SkipModeEnable :1;
2394 uint32_t AdaptiveSearchEnable :1;
2395 uint32_t BidirectionalMixDisbale :1;
2396 uint32_t ReservedMBZ1 :2;
2397 uint32_t EarlyIMESuccessEnable :1;
2398 uint32_t ReservedMBZ2 :1;
2399 uint32_t Transform8x8FlagForInterEnable :1;
2400 uint32_t ReservedMBZ3 :16;
2401 uint32_t EarlyIMESuccessfulStopThreshold :8;
2402 };
2403 struct
2404 {
2405 uint32_t Value;
2406 };
2407 } DW8;
2408
2409 //DW9
2410 union
2411 {
2412 struct
2413 {
2414 uint32_t MaximumNumberOfMotionVectors :6;
2415 uint32_t ReservedMBZ1 :2;
2416 uint32_t RefIDPolarityBits :8;
2417 uint32_t BidirectionalWeight :6;
2418 uint32_t ReservedMBZ2 :6;
2419 uint32_t UnidirectionMixEnable :1;
2420 uint32_t RefPixelBiasEnable :1;
2421 uint32_t ReservedMBZ3 :2;
2422 };
2423 struct
2424 {
2425 uint32_t Value;
2426 };
2427 } DW9;
2428
2429 //DW10
2430 union
2431 {
2432 struct
2433 {
2434 uint32_t MaxFixedSearchPathLength :8;
2435 uint32_t MaximumSearchPathLength :8;
2436 uint32_t ReservedMBZ :16;
2437 };
2438 struct
2439 {
2440 uint32_t Value;
2441 };
2442 } DW10;
2443
2444 //DW11
2445 union
2446 {
2447 struct
2448 {
2449 uint32_t SourceBlockSize :2;
2450 uint32_t ReservedMBZ1 :2;
2451 uint32_t InterMbTypeRoadMap :2;
2452 uint32_t SourceAccess :1;
2453 uint32_t ReferenceAccess :1;
2454 uint32_t SearchControl :3;
2455 uint32_t DualSearchPathOption :1;
2456 uint32_t SubPelMode :2;
2457 uint32_t SkipModeType :1;
2458 uint32_t DisableFieldCacheAllocation :1;
2459 uint32_t ProcessInterChromaPixelsMode :1;
2460 uint32_t ForwardTransformSkipCheckEnable :1;
2461 uint32_t BMEdisableforFBRMessage :1;
2462 uint32_t BlockBasedSkipEnable :1;
2463 uint32_t InterSADMeasureAdjustment :2;
2464 uint32_t IntraSADMeasureAdjustment :2;
2465 uint32_t SubMacroBlockSubPartitionMask :6;
2466 uint32_t ReservedMBZ2 :1;
2467 };
2468 struct
2469 {
2470 uint32_t Value;
2471 };
2472 } DW11;
2473
2474 //DW12
2475 union
2476 {
2477 struct
2478 {
2479 uint32_t ReservedMBZ :16;
2480 uint32_t ReferenceSearchWindowsWidth :8;
2481 uint32_t ReferenceSearchWindowsHeight :8;
2482 };
2483 struct
2484 {
2485 uint32_t Value;
2486 };
2487 } DW12;
2488
2489 // DW13
2490 union
2491 {
2492 struct
2493 {
2494 uint32_t Mode0CostSegment0 :8;
2495 uint32_t Mode1CostSegment0 :8;
2496 uint32_t Mode2CostSegment0 :8;
2497 uint32_t Mode3CostSegment0 :8;
2498 };
2499 struct
2500 {
2501 uint32_t Value;
2502 };
2503 } DW13;
2504
2505 // DW14
2506 union
2507 {
2508 struct
2509 {
2510 uint32_t Mode4CostSegment0 :8;
2511 uint32_t Mode5CostSegment0 :8;
2512 uint32_t Mode6CostSegment0 :8;
2513 uint32_t Mode7CostSegment0 :8;
2514 };
2515 struct
2516 {
2517 uint32_t Value;
2518 };
2519 } DW14;
2520
2521 // DW15
2522 union
2523 {
2524 struct
2525 {
2526 uint32_t Mode8CostSegment0 :8;
2527 uint32_t Mode9CostSegment0 :8;
2528 uint32_t RefIDCostSegment0 :8;
2529 uint32_t ChromaCostSegment0 :8;
2530 };
2531 struct
2532 {
2533 uint32_t Value;
2534 };
2535 } DW15;
2536
2537 // DW16
2538 union
2539 {
2540 struct
2541 {
2542 SearchPathDelta SPDelta_0;
2543 SearchPathDelta SPDelta_1;
2544 SearchPathDelta SPDelta_2;
2545 SearchPathDelta SPDelta_3;
2546 };
2547 struct
2548 {
2549 uint32_t Value;
2550 };
2551 } DW16;
2552
2553 // DW17
2554 union
2555 {
2556 struct
2557 {
2558 SearchPathDelta SPDelta_4;
2559 SearchPathDelta SPDelta_5;
2560 SearchPathDelta SPDelta_6;
2561 SearchPathDelta SPDelta_7;
2562 };
2563 struct
2564 {
2565 uint32_t Value;
2566 };
2567 } DW17;
2568
2569 // DW18
2570 union
2571 {
2572 struct
2573 {
2574 SearchPathDelta SPDelta_8;
2575 SearchPathDelta SPDelta_9;
2576 SearchPathDelta SPDelta_10;
2577 SearchPathDelta SPDelta_11;
2578 };
2579 struct
2580 {
2581 uint32_t Value;
2582 };
2583 } DW18;
2584
2585 // DW19
2586 union
2587 {
2588 struct
2589 {
2590 SearchPathDelta SPDelta_12;
2591 SearchPathDelta SPDelta_13;
2592 SearchPathDelta SPDelta_14;
2593 SearchPathDelta SPDelta_15;
2594 };
2595 struct
2596 {
2597 uint32_t Value;
2598 };
2599 } DW19;
2600
2601 // DW20
2602 union
2603 {
2604 struct
2605 {
2606 SearchPathDelta SPDelta_16;
2607 SearchPathDelta SPDelta_17;
2608 SearchPathDelta SPDelta_18;
2609 SearchPathDelta SPDelta_19;
2610 };
2611 struct
2612 {
2613 uint32_t Value;
2614 };
2615 } DW20;
2616
2617 // DW21
2618 union
2619 {
2620 struct
2621 {
2622 SearchPathDelta SPDelta_20;
2623 SearchPathDelta SPDelta_21;
2624 SearchPathDelta SPDelta_22;
2625 SearchPathDelta SPDelta_23;
2626 };
2627 struct
2628 {
2629 uint32_t Value;
2630 };
2631 } DW21;
2632
2633 // DW22
2634 union
2635 {
2636 struct
2637 {
2638 SearchPathDelta SPDelta_24;
2639 SearchPathDelta SPDelta_25;
2640 SearchPathDelta SPDelta_26;
2641 SearchPathDelta SPDelta_27;
2642 };
2643 struct
2644 {
2645 uint32_t Value;
2646 };
2647 } DW22;
2648
2649 // DW23
2650 union
2651 {
2652 struct
2653 {
2654 SearchPathDelta SPDelta_28;
2655 SearchPathDelta SPDelta_29;
2656 SearchPathDelta SPDelta_30;
2657 SearchPathDelta SPDelta_31;
2658 };
2659 struct
2660 {
2661 uint32_t Value;
2662 };
2663 } DW23;
2664
2665 // DW24
2666 union
2667 {
2668 struct
2669 {
2670 SearchPathDelta SPDelta_32;
2671 SearchPathDelta SPDelta_33;
2672 SearchPathDelta SPDelta_34;
2673 SearchPathDelta SPDelta_35;
2674 };
2675 struct
2676 {
2677 uint32_t Value;
2678 };
2679 } DW24;
2680
2681 // DW25
2682 union
2683 {
2684 struct
2685 {
2686 SearchPathDelta SPDelta_36;
2687 SearchPathDelta SPDelta_37;
2688 SearchPathDelta SPDelta_38;
2689 SearchPathDelta SPDelta_39;
2690 };
2691 struct
2692 {
2693 uint32_t Value;
2694 };
2695 } DW25;
2696
2697 // DW26
2698 union
2699 {
2700 struct
2701 {
2702 SearchPathDelta SPDelta_40;
2703 SearchPathDelta SPDelta_41;
2704 SearchPathDelta SPDelta_42;
2705 SearchPathDelta SPDelta_43;
2706 };
2707 struct
2708 {
2709 uint32_t Value;
2710 };
2711 } DW26;
2712
2713 // DW27
2714 union
2715 {
2716 struct
2717 {
2718 SearchPathDelta SPDelta_44;
2719 SearchPathDelta SPDelta_45;
2720 SearchPathDelta SPDelta_46;
2721 SearchPathDelta SPDelta_47;
2722 };
2723 struct
2724 {
2725 uint32_t Value;
2726 };
2727 } DW27;
2728
2729 // DW28
2730 union
2731 {
2732 struct
2733 {
2734 SearchPathDelta SPDelta_48;
2735 SearchPathDelta SPDelta_49;
2736 SearchPathDelta SPDelta_50;
2737 SearchPathDelta SPDelta_51;
2738 };
2739 struct
2740 {
2741 uint32_t Value;
2742 };
2743 } DW28;
2744
2745 // DW29
2746 union
2747 {
2748 struct
2749 {
2750 SearchPathDelta SPDelta_52;
2751 SearchPathDelta SPDelta_53;
2752 SearchPathDelta SPDelta_54;
2753 SearchPathDelta SPDelta_55;
2754 };
2755 struct
2756 {
2757 uint32_t Value;
2758 };
2759 } DW29;
2760
2761 // DW30
2762 union
2763 {
2764 struct
2765 {
2766 uint32_t MV0CostSegment0 :8;
2767 uint32_t MV1CostSegment0 :8;
2768 uint32_t MV2CostSegment0 :8;
2769 uint32_t MV3CostSegment0 :8;
2770 };
2771 struct
2772 {
2773 uint32_t Value;
2774 };
2775 } DW30;
2776
2777 // DW31
2778 union
2779 {
2780 struct
2781 {
2782 uint32_t MV4CostSegment0 :8;
2783 uint32_t MV5CostSegment0 :8;
2784 uint32_t MV6CostSegment0 :8;
2785 uint32_t MV7CostSegment0 :8;
2786 };
2787 struct
2788 {
2789 uint32_t Value;
2790 };
2791 } DW31;
2792
2793 // DW32
2794 union
2795 {
2796 struct
2797 {
2798 uint32_t Intra16x16NoDCPenaltySegment0 :8;
2799 uint32_t Intra16x16NoDCPenaltySegment1 :8;
2800 uint32_t ReservedMBZ1 :7;
2801 uint32_t BilinearEnable :1;
2802 uint32_t ReservedMBZ2 :8;
2803 };
2804 struct
2805 {
2806 uint32_t Value;
2807 };
2808 } DW32;
2809
2810 // DW33
2811 union
2812 {
2813 struct
2814 {
2815 uint32_t HMECombineLen :16;
2816 uint32_t Intra16x16NoDCPenaltySegment2 :8;
2817 uint32_t Intra16x16NoDCPenaltySegment3 :8;
2818
2819 };
2820 struct
2821 {
2822 uint32_t Value;
2823 };
2824 } DW33;
2825
2826 // DW34
2827 union
2828 {
2829 struct
2830 {
2831 uint32_t MvRefCostContext_0_0_0 : 16;
2832 uint32_t MvRefCostContext_0_0_1 : 16;
2833 };
2834 struct
2835 {
2836 uint32_t Value;
2837 };
2838 } DW34;
2839
2840 // DW35
2841 union
2842 {
2843 struct
2844 {
2845 uint32_t MvRefCostContext_0_1_0 : 16;
2846 uint32_t MvRefCostContext_0_1_1 : 16;
2847 };
2848 struct
2849 {
2850 uint32_t Value;
2851 };
2852 } DW35;
2853
2854 // DW36
2855 union
2856 {
2857 struct
2858 {
2859 uint32_t MvRefCostContext_0_2_0 : 16;
2860 uint32_t MvRefCostContext_0_2_1 : 16;
2861 };
2862 struct
2863 {
2864 uint32_t Value;
2865 };
2866 } DW36;
2867
2868 // DW37
2869 union
2870 {
2871 struct
2872 {
2873 uint32_t MvRefCostContext_0_3_0 : 16;
2874 uint32_t MvRefCostContext_0_3_1 : 16;
2875 };
2876 struct
2877 {
2878 uint32_t Value;
2879 };
2880 } DW37;
2881
2882 // DW38
2883 union
2884 {
2885 struct
2886 {
2887 uint32_t MvRefCostContext_1_0_0 : 16;
2888 uint32_t MvRefCostContext_1_0_1 : 16;
2889 };
2890 struct
2891 {
2892 uint32_t Value;
2893 };
2894 } DW38;
2895
2896 // DW39
2897 union
2898 {
2899 struct
2900 {
2901 uint32_t MvRefCostContext_1_1_0 : 16;
2902 uint32_t MvRefCostContext_1_1_1 : 16;
2903 };
2904 struct
2905 {
2906 uint32_t Value;
2907 };
2908 } DW39;
2909
2910 // DW40
2911 union
2912 {
2913 struct
2914 {
2915 uint32_t MvRefCostContext_1_2_0 : 16;
2916 uint32_t MvRefCostContext_1_2_1 : 16;
2917 };
2918 struct
2919 {
2920 uint32_t Value;
2921 };
2922 } DW40;
2923
2924 // DW41
2925 union
2926 {
2927 struct
2928 {
2929 uint32_t MvRefCostContext_1_3_0 : 16;
2930 uint32_t MvRefCostContext_1_3_1 : 16;
2931 };
2932 struct
2933 {
2934 uint32_t Value;
2935 };
2936 } DW41;
2937
2938 // DW42
2939 union
2940 {
2941 struct
2942 {
2943 uint32_t MvRefCostContext_2_0_0 : 16;
2944 uint32_t MvRefCostContext_2_0_1 : 16;
2945 };
2946 struct
2947 {
2948 uint32_t Value;
2949 };
2950 } DW42;
2951
2952 // DW43
2953 union
2954 {
2955 struct
2956 {
2957 uint32_t MvRefCostContext_2_1_0 : 16;
2958 uint32_t MvRefCostContext_2_1_1 : 16;
2959 };
2960 struct
2961 {
2962 uint32_t Value;
2963 };
2964 } DW43;
2965
2966 // DW44
2967 union
2968 {
2969 struct
2970 {
2971 uint32_t MvRefCostContext_2_2_0 : 16;
2972 uint32_t MvRefCostContext_2_2_1 : 16;
2973 };
2974 struct
2975 {
2976 uint32_t Value;
2977 };
2978 } DW44;
2979
2980 // DW45
2981 union
2982 {
2983 struct
2984 {
2985 uint32_t MvRefCostContext_2_3_0 : 16;
2986 uint32_t MvRefCostContext_2_3_1 : 16;
2987 };
2988 struct
2989 {
2990 uint32_t Value;
2991 };
2992 } DW45;
2993
2994 // DW46
2995 union
2996 {
2997 struct
2998 {
2999 uint32_t MvRefCostContext_3_0_0 : 16;
3000 uint32_t MvRefCostContext_3_0_1 : 16;
3001 };
3002 struct
3003 {
3004 uint32_t Value;
3005 };
3006 } DW46;
3007
3008 // DW47
3009 union
3010 {
3011 struct
3012 {
3013 uint32_t MvRefCostContext_3_1_0 : 16;
3014 uint32_t MvRefCostContext_3_1_1 : 16;
3015 };
3016 struct
3017 {
3018 uint32_t Value;
3019 };
3020 } DW47;
3021
3022 // DW48
3023 union
3024 {
3025 struct
3026 {
3027 uint32_t MvRefCostContext_3_2_0 : 16;
3028 uint32_t MvRefCostContext_3_2_1 : 16;
3029 };
3030 struct
3031 {
3032 uint32_t Value;
3033 };
3034 } DW48;
3035
3036 // DW49
3037 union
3038 {
3039 struct
3040 {
3041 uint32_t MvRefCostContext_3_3_0 : 16;
3042 uint32_t MvRefCostContext_3_3_1 : 16;
3043 };
3044 struct
3045 {
3046 uint32_t Value;
3047 };
3048 } DW49;
3049
3050 // DW50
3051 union
3052 {
3053 struct
3054 {
3055 uint32_t MvRefCostContext_4_0_0 : 16;
3056 uint32_t MvRefCostContext_4_0_1 : 16;
3057 };
3058 struct
3059 {
3060 uint32_t Value;
3061 };
3062 } DW50;
3063
3064 // DW51
3065 union
3066 {
3067 struct
3068 {
3069 uint32_t MvRefCostContext_4_1_0 : 16;
3070 uint32_t MvRefCostContext_4_1_1 : 16;
3071 };
3072 struct
3073 {
3074 uint32_t Value;
3075 };
3076 } DW51;
3077
3078 // DW52
3079 union
3080 {
3081 struct
3082 {
3083 uint32_t MvRefCostContext_4_2_0 : 16;
3084 uint32_t MvRefCostContext_4_2_1 : 16;
3085 };
3086 struct
3087 {
3088 uint32_t Value;
3089 };
3090 } DW52;
3091
3092 // DW53
3093 union
3094 {
3095 struct
3096 {
3097 uint32_t MvRefCostContext_4_3_0 : 16;
3098 uint32_t MvRefCostContext_4_3_1 : 16;
3099 };
3100 struct
3101 {
3102 uint32_t Value;
3103 };
3104 } DW53;
3105
3106 // DW54
3107 union
3108 {
3109 struct
3110 {
3111 uint32_t MvRefCostContext_5_0_0 : 16;
3112 uint32_t MvRefCostContext_5_0_1 : 16;
3113 };
3114 struct
3115 {
3116 uint32_t Value;
3117 };
3118 } DW54;
3119
3120 // DW55
3121 union
3122 {
3123 struct
3124 {
3125 uint32_t MvRefCostContext_5_1_0 : 16;
3126 uint32_t MvRefCostContext_5_1_1 : 16;
3127 };
3128 struct
3129 {
3130 uint32_t Value;
3131 };
3132 } DW55;
3133
3134 // DW56
3135 union
3136 {
3137 struct
3138 {
3139 uint32_t MvRefCostContext_5_2_0 : 16;
3140 uint32_t MvRefCostContext_5_2_1 : 16;
3141 };
3142 struct
3143 {
3144 uint32_t Value;
3145 };
3146 } DW56;
3147
3148 // DW57
3149 union
3150 {
3151 struct
3152 {
3153 uint32_t MvRefCostContext_5_3_0 : 16;
3154 uint32_t MvRefCostContext_5_3_1 : 16;
3155 };
3156 struct
3157 {
3158 uint32_t Value;
3159 };
3160 } DW57;
3161
3162 // DW58
3163 union
3164 {
3165 struct
3166 {
3167 uint32_t EncCost16x16 : 16;
3168 uint32_t EncCost16x8 : 16;
3169 };
3170 struct
3171 {
3172 uint32_t Value;
3173 };
3174 } DW58;
3175
3176 // DW59
3177 union
3178 {
3179 struct
3180 {
3181 uint32_t EncCost8x8 : 16;
3182 uint32_t EncCost4x4 : 16;
3183 };
3184 struct
3185 {
3186 uint32_t Value;
3187 };
3188 } DW59;
3189
3190 // DW60
3191 union
3192 {
3193 struct
3194 {
3195 uint32_t FrameCountProbabilityRefFrameCost_0 : 16;
3196 uint32_t FrameCountProbabilityRefFrameCost_1 : 16;
3197 };
3198 struct
3199 {
3200 uint32_t Value;
3201 };
3202 } DW60;
3203
3204 // DW61
3205 union
3206 {
3207 struct
3208 {
3209 uint32_t FrameCountProbabilityRefFrameCost_2 : 16;
3210 uint32_t FrameCountProbabilityRefFrameCost_3 : 16;
3211 };
3212 struct
3213 {
3214 uint32_t Value;
3215 };
3216 } DW61;
3217
3218 // DW62
3219 union
3220 {
3221 struct
3222 {
3223 uint32_t AverageQPOfLastRefFrame :8;
3224 uint32_t AverageQPOfGoldRefFrame :8;
3225 uint32_t AverageQPOfAltRefFrame :8;
3226 uint32_t ReservedMBZ :8;
3227 };
3228 struct
3229 {
3230 uint32_t Value;
3231 };
3232
3233 } DW62;
3234
3235 // DW63
3236 union
3237 {
3238 struct
3239 {
3240 uint32_t Intra4x4NoDCPenaltySegment0 :8;
3241 uint32_t Intra4x4NoDCPenaltySegment1 :8;
3242 uint32_t Intra4x4NoDCPenaltySegment2 :8;
3243 uint32_t Intra4x4NoDCPenaltySegment3 :8;
3244 };
3245 struct
3246 {
3247 uint32_t Value;
3248 };
3249
3250 } DW63;
3251
3252 // DW64
3253 union
3254 {
3255 struct
3256 {
3257 uint32_t Mode0CostSegment1 :8;
3258 uint32_t Mode1CostSegment1 :8;
3259 uint32_t Mode2CostSegment1 :8;
3260 uint32_t Mode3CostSegment1 :8;
3261 };
3262 struct
3263 {
3264 uint32_t Value;
3265 };
3266 } DW64;
3267
3268 // DW65
3269 union
3270 {
3271 struct
3272 {
3273 uint32_t Mode4CostSegment1 :8;
3274 uint32_t Mode5CostSegment1 :8;
3275 uint32_t Mode6CostSegment1 :8;
3276 uint32_t Mode7CostSegment1 :8;
3277 };
3278 struct
3279 {
3280 uint32_t Value;
3281 };
3282 } DW65;
3283
3284 // DW66
3285 union
3286 {
3287 struct
3288 {
3289 uint32_t Mode8CostSegment1 :8;
3290 uint32_t Mode9CostSegment1 :8;
3291 uint32_t RefIDCostSegment1 :8;
3292 uint32_t ChromaCostSegment1 :8;
3293 };
3294 struct
3295 {
3296 uint32_t Value;
3297 };
3298 } DW66;
3299
3300 // DW67
3301 union
3302 {
3303 struct
3304 {
3305 uint32_t MV0CostSegment1 :8;
3306 uint32_t MV1CostSegment1 :8;
3307 uint32_t MV2CostSegment1 :8;
3308 uint32_t MV3CostSegment1 :8;
3309 };
3310 struct
3311 {
3312 uint32_t Value;
3313 };
3314 } DW67;
3315
3316 // DW68
3317 union
3318 {
3319 struct
3320 {
3321 uint32_t MV4CostSegment1 :8;
3322 uint32_t MV5CostSegment1 :8;
3323 uint32_t MV6CostSegment1 :8;
3324 uint32_t MV7CostSegment1 :8;
3325 };
3326 struct
3327 {
3328 uint32_t Value;
3329 };
3330 } DW68;
3331
3332 // DW69
3333 union
3334 {
3335 struct
3336 {
3337 uint32_t Mode0CostSegment2 :8;
3338 uint32_t Mode1CostSegment2 :8;
3339 uint32_t Mode2CostSegment2 :8;
3340 uint32_t Mode3CostSegment2 :8;
3341 };
3342 struct
3343 {
3344 uint32_t Value;
3345 };
3346 } DW69;
3347
3348 // DW70
3349 union
3350 {
3351 struct
3352 {
3353 uint32_t Mode4CostSegment2 :8;
3354 uint32_t Mode5CostSegment2 :8;
3355 uint32_t Mode6CostSegment2 :8;
3356 uint32_t Mode7CostSegment2 :8;
3357 };
3358 struct
3359 {
3360 uint32_t Value;
3361 };
3362 } DW70;
3363
3364 // DW71
3365 union
3366 {
3367 struct
3368 {
3369 uint32_t Mode8CostSegment2 :8;
3370 uint32_t Mode9CostSegment2 :8;
3371 uint32_t RefIDCostSegment2 :8;
3372 uint32_t ChromaCostSegment2 :8;
3373 };
3374 struct
3375 {
3376 uint32_t Value;
3377 };
3378 } DW71;
3379
3380 // DW72
3381 union
3382 {
3383 struct
3384 {
3385 uint32_t MV0CostSegment2 :8;
3386 uint32_t MV1CostSegment2 :8;
3387 uint32_t MV2CostSegment2 :8;
3388 uint32_t MV3CostSegment2 :8;
3389 };
3390 struct
3391 {
3392 uint32_t Value;
3393 };
3394 } DW72;
3395
3396 // DW73
3397 union
3398 {
3399 struct
3400 {
3401 uint32_t MV4CostSegment2 :8;
3402 uint32_t MV5CostSegment2 :8;
3403 uint32_t MV6CostSegment2 :8;
3404 uint32_t MV7CostSegment2 :8;
3405 };
3406 struct
3407 {
3408 uint32_t Value;
3409 };
3410 } DW73;
3411
3412 // DW74
3413 union
3414 {
3415 struct
3416 {
3417 uint32_t Mode0CostSegment3 :8;
3418 uint32_t Mode1CostSegment3 :8;
3419 uint32_t Mode2CostSegment3 :8;
3420 uint32_t Mode3CostSegment3 :8;
3421 };
3422 struct
3423 {
3424 uint32_t Value;
3425 };
3426 } DW74;
3427
3428 // DW75
3429 union
3430 {
3431 struct
3432 {
3433 uint32_t Mode4CostSegment3 :8;
3434 uint32_t Mode5CostSegment3 :8;
3435 uint32_t Mode6CostSegment3 :8;
3436 uint32_t Mode7CostSegment3 :8;
3437 };
3438 struct
3439 {
3440 uint32_t Value;
3441 };
3442 } DW75;
3443
3444 // DW76
3445 union
3446 {
3447 struct
3448 {
3449 uint32_t Mode8CostSegment3 :8;
3450 uint32_t Mode9CostSegment3 :8;
3451 uint32_t RefIDCostSegment3 :8;
3452 uint32_t ChromaCostSegment3 :8;
3453 };
3454 struct
3455 {
3456 uint32_t Value;
3457 };
3458 } DW76;
3459
3460 // DW77
3461 union
3462 {
3463 struct
3464 {
3465 uint32_t MV0CostSegment3 :8;
3466 uint32_t MV1CostSegment3 :8;
3467 uint32_t MV2CostSegment3 :8;
3468 uint32_t MV3CostSegment3 :8;
3469 };
3470 struct
3471 {
3472 uint32_t Value;
3473 };
3474 } DW77;
3475
3476 // DW78
3477 union
3478 {
3479 struct
3480 {
3481 uint32_t MV4CostSegment3 :8;
3482 uint32_t MV5CostSegment3 :8;
3483 uint32_t MV6CostSegment3 :8;
3484 uint32_t MV7CostSegment3 :8;
3485 };
3486 struct
3487 {
3488 uint32_t Value;
3489 };
3490 } DW78;
3491
3492 // DW79
3493 union
3494 {
3495 struct
3496 {
3497 uint32_t NewMVSkipThresholdSegment0 :16;
3498 uint32_t NewMVSkipThresholdSegment1 :16;
3499 };
3500 struct
3501 {
3502 uint32_t Value;
3503 };
3504 } DW79;
3505
3506 // DW80
3507 union
3508 {
3509 struct
3510 {
3511 uint32_t NewMVSkipThresholdSegment2 :16;
3512 uint32_t NewMVSkipThresholdSegment3 :16;
3513 };
3514 struct
3515 {
3516 uint32_t Value;
3517 };
3518 } DW80;
3519
3520 // DW81
3521 union
3522 {
3523 struct
3524 {
3525 uint32_t PerMbOutputDataSurfaceBTI :32;
3526 };
3527 struct
3528 {
3529 uint32_t Value;
3530 };
3531 } DW81;
3532
3533 // DW82
3534 union
3535 {
3536 struct
3537 {
3538 uint32_t CurrentPictureYSurfaceBTI :32;
3539 };
3540 struct
3541 {
3542 uint32_t Value;
3543 };
3544 } DW82;
3545
3546 // DW83
3547 union
3548 {
3549 struct
3550 {
3551 uint32_t CurrentPictureInterleavedUVSurfaceBTI :32;
3552 };
3553 struct
3554 {
3555 uint32_t Value;
3556 };
3557 } DW83;
3558
3559 // DW84
3560 union
3561 {
3562 struct
3563 {
3564 uint32_t HMEMVDataSurfaceBTI :32;
3565 };
3566 struct
3567 {
3568 uint32_t Value;
3569 };
3570 } DW84;
3571
3572 // DW85
3573 union
3574 {
3575 struct
3576 {
3577 uint32_t MVDataSurfaceBTI :32;
3578 };
3579 struct
3580 {
3581 uint32_t Value;
3582 };
3583 } DW85;
3584
3585 // DW86
3586 union
3587 {
3588 struct
3589 {
3590 uint32_t MbCountPerReferenceFrameBTI :32;
3591 };
3592 struct
3593 {
3594 uint32_t Value;
3595 };
3596 } DW86;
3597
3598 // DW87
3599 union
3600 {
3601 struct
3602 {
3603 uint32_t VMEInterPredictionBTI :32;
3604 };
3605 struct
3606 {
3607 uint32_t Value;
3608 };
3609 } DW87;
3610
3611 // DW88
3612 union
3613 {
3614 struct
3615 {
3616 uint32_t ActiveRef1BTI : 32;
3617 };
3618 struct
3619 {
3620 uint32_t Value;
3621 };
3622 } DW88;
3623
3624 // DW89
3625 union
3626 {
3627 struct
3628 {
3629 uint32_t ActiveRef2BTI : 32;
3630 };
3631 struct
3632 {
3633 uint32_t Value;
3634 };
3635 } DW89;
3636
3637 // DW90
3638 union
3639 {
3640 struct
3641 {
3642 uint32_t ActiveRef3BTI : 32;
3643 };
3644 struct
3645 {
3646 uint32_t Value;
3647 };
3648 } DW90;
3649
3650 // DW91
3651 union
3652 {
3653 struct
3654 {
3655 uint32_t PerMbQuantDataBTI :32;
3656 };
3657 struct
3658 {
3659 uint32_t Value;
3660 };
3661 } DW91;
3662
3663 // DW92
3664 union
3665 {
3666 struct
3667 {
3668 uint32_t SegmentMapBTI :32;
3669 };
3670 struct
3671 {
3672 uint32_t Value;
3673 };
3674 } DW92;
3675
3676 // DW93
3677 union
3678 {
3679 struct
3680 {
3681 uint32_t InterPredictionDistortionBTI :32;
3682 };
3683 struct
3684 {
3685 uint32_t Value;
3686 };
3687 } DW93;
3688
3689 // DW94
3690 union
3691 {
3692 struct
3693 {
3694 uint32_t HistogramBTI :32;
3695 };
3696 struct
3697 {
3698 uint32_t Value;
3699 };
3700 } DW94;
3701
3702 // DW95
3703 union
3704 {
3705 struct
3706 {
3707 uint32_t PredMVDataBTI :32;
3708 };
3709 struct
3710 {
3711 uint32_t Value;
3712 };
3713 } DW95;
3714
3715 // DW96
3716 union
3717 {
3718 struct
3719 {
3720 uint32_t ModeCostUpdateBTI :32;
3721 };
3722 struct
3723 {
3724 uint32_t Value;
3725 };
3726 } DW96;
3727
3728 // DW97
3729 union
3730 {
3731 struct
3732 {
3733 uint32_t KernelDebugDumpBTI :32;
3734 };
3735 struct
3736 {
3737 uint32_t Value;
3738 };
3739 } DW97;
3740 };
3741 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct MediaObjectVp8MbencPStaticDataG9)) == 98);
3742
3743 struct MediaObjectVp8MpuFhbStaticDataG9
3744 {
3745 // uint32_t 0
3746 union {
3747 struct {
3748 uint32_t FrameWidth : MOS_BITFIELD_RANGE( 0,15 ); //
3749 uint32_t FrameHeight : MOS_BITFIELD_RANGE( 16,31 ); //
3750 };
3751 uint32_t Value;
3752 } DW0;
3753
3754 // uint32_t 1
3755 union {
3756 struct {
3757 uint32_t FrameType : MOS_BITFIELD_BIT( 0 ); //
3758 uint32_t Version : MOS_BITFIELD_RANGE( 1, 3 ); //
3759 uint32_t ShowFrame : MOS_BITFIELD_BIT( 4 ); //
3760 uint32_t HorizontalScaleCode : MOS_BITFIELD_RANGE( 5, 6 ); //
3761 uint32_t VerticalScaleCode : MOS_BITFIELD_RANGE( 7, 8 ); //
3762 uint32_t ColorSpaceType : MOS_BITFIELD_BIT( 9 ); //
3763 uint32_t ClampType : MOS_BITFIELD_BIT( 10 ); //
3764 uint32_t PartitionNumL2 : MOS_BITFIELD_RANGE( 11,12 ); //
3765 uint32_t EnableSegmentation : MOS_BITFIELD_BIT( 13 ); //
3766 uint32_t SegMapUpdate : MOS_BITFIELD_BIT( 14 ); //
3767 uint32_t SegmentationFeatureUpdate : MOS_BITFIELD_BIT( 15 ); //
3768 uint32_t SegmentationFeatureMode : MOS_BITFIELD_BIT( 16 ); //
3769 uint32_t LoopFilterType : MOS_BITFIELD_BIT( 17 ); //
3770 uint32_t SharpnessLevel : MOS_BITFIELD_RANGE( 18,20 ); //
3771 uint32_t LoopFilterAdjustmentOn : MOS_BITFIELD_BIT( 21 ); //
3772 uint32_t MBNoCoeffiscientSkip : MOS_BITFIELD_BIT( 22 ); //
3773 uint32_t GoldenReferenceCopyFlag : MOS_BITFIELD_RANGE( 23,24 ); //
3774 uint32_t AlternateReferenceCopyFlag : MOS_BITFIELD_RANGE( 25,26 ); //
3775 uint32_t LastFrameUpdate : MOS_BITFIELD_BIT( 27 ); //
3776 uint32_t SignBiasGolden : MOS_BITFIELD_BIT( 28 ); //
3777 uint32_t SignBiasAltRef : MOS_BITFIELD_BIT( 29 ); //
3778 uint32_t RefreshEntropyP : MOS_BITFIELD_BIT( 30 ); //
3779 uint32_t ForcedLFUpdateForKeyFrame : MOS_BITFIELD_BIT( 31 ); //
3780 };
3781 uint32_t Value;
3782 } DW1;
3783
3784 // uint32_t 2
3785 union {
3786 struct {
3787 uint32_t LoopFilterLevel : MOS_BITFIELD_RANGE( 0, 5 ); //
3788 uint32_t : MOS_BITFIELD_RANGE( 6, 7 ); //
3789 uint32_t Qindex : MOS_BITFIELD_RANGE( 8,14 ); //
3790 uint32_t : MOS_BITFIELD_BIT( 15 ); //
3791 uint32_t Y1DCQindex : MOS_BITFIELD_RANGE( 16,23 ); //
3792 uint32_t Y2DCQindex : MOS_BITFIELD_RANGE( 24,31 ); //
3793 };
3794 uint32_t Value;
3795 } DW2;
3796
3797 // uint32_t 3
3798 union {
3799 struct {
3800 uint32_t Y2ACQindex : MOS_BITFIELD_RANGE( 0, 7 ); //
3801 uint32_t UVDCQindex : MOS_BITFIELD_RANGE( 8,15 ); //
3802 uint32_t UVACQindex : MOS_BITFIELD_RANGE( 16,23 ); //
3803 uint32_t FeatureData0Segment0 : MOS_BITFIELD_RANGE( 24,31 ); //
3804 };
3805 uint32_t Value;
3806 } DW3;
3807
3808 // uint32_t 4
3809 union {
3810 struct {
3811 uint32_t FeatureData0Segment1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3812 uint32_t FeatureData0Segment2 : MOS_BITFIELD_RANGE( 8,15 ); //
3813 uint32_t FeatureData0Segment3 : MOS_BITFIELD_RANGE( 16,23 ); //
3814 uint32_t FeatureData1Segment0 : MOS_BITFIELD_RANGE( 24,31 ); //
3815 };
3816 uint32_t Value;
3817 } DW4;
3818
3819 // uint32_t 5
3820 union {
3821 struct {
3822 uint32_t FeatureData1Segment1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3823 uint32_t FeatureData1Segment2 : MOS_BITFIELD_RANGE( 8,15 ); //
3824 uint32_t FeatureData1Segment3 : MOS_BITFIELD_RANGE( 16,23 ); //
3825 uint32_t RefLFDelta0 : MOS_BITFIELD_RANGE( 24,31 ); //
3826 };
3827 uint32_t Value;
3828 } DW5;
3829
3830 // uint32_t 6
3831 union {
3832 struct {
3833 uint32_t RefLFDelta1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3834 uint32_t RefLFDelta2 : MOS_BITFIELD_RANGE( 8,15 ); //
3835 uint32_t RefLFDelta3 : MOS_BITFIELD_RANGE( 16,23 ); //
3836 uint32_t ModeLFDelta0 : MOS_BITFIELD_RANGE( 24,31 ); //
3837 };
3838 uint32_t Value;
3839 } DW6;
3840
3841 // uint32_t 7
3842 union {
3843 struct {
3844 uint32_t ModeLFDelta1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3845 uint32_t ModeLFDelta2 : MOS_BITFIELD_RANGE( 8,15 ); //
3846 uint32_t ModeLFDelta3 : MOS_BITFIELD_RANGE( 16,23 ); //
3847 uint32_t ForcedTokenSurfaceRead : MOS_BITFIELD_BIT( 24 );
3848 uint32_t ModecostEnableFlag : MOS_BITFIELD_BIT( 25 );
3849 uint32_t MCFilterSelect : MOS_BITFIELD_BIT( 26 );
3850 uint32_t ChromaFullPixelMCFilterMode : MOS_BITFIELD_BIT(27);
3851 uint32_t MaxNumPakPasses : MOS_BITFIELD_RANGE(28, 31); //
3852
3853 };
3854 uint32_t Value;
3855 } DW7;
3856
3857 // uint32_t 8
3858 union {
3859 struct {
3860 uint32_t TemporalLayerID : MOS_BITFIELD_RANGE(0, 7); //
3861 uint32_t NumTLevels : MOS_BITFIELD_RANGE(8, 15); //
3862 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(16, 31); //
3863 };
3864 uint32_t Value;
3865 } DW8;
3866
3867 // uint32_t 9
3868 union {
3869 struct {
3870 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(0, 31); //
3871 };
3872 uint32_t Value;
3873 } DW9;
3874
3875 // uint32_t 10
3876 union {
3877 struct {
3878 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(0, 31); //
3879 };
3880 uint32_t Value;
3881 } DW10;
3882
3883 // uint32_t 11
3884 union {
3885 struct {
3886 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(0, 31); //
3887 };
3888 uint32_t Value;
3889 } DW11;
3890
3891 // uint32_t 12
3892 union {
3893 struct {
3894 uint32_t HistogramBTI : MOS_BITFIELD_RANGE( 0, 31); //
3895 };
3896 uint32_t Value;
3897 } DW12;
3898
3899 // uint32_t 13
3900 union {
3901 struct {
3902 uint32_t ReferenceModeProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3903 };
3904 uint32_t Value;
3905 } DW13;
3906
3907 // uint32_t 14
3908 union {
3909 struct {
3910 uint32_t ModeProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3911 };
3912 uint32_t Value;
3913 } DW14;
3914
3915 // uint32_t 15
3916 union {
3917 struct {
3918 uint32_t ReferenceTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3919 };
3920 uint32_t Value;
3921 } DW15;
3922
3923 // uint32_t 16
3924 union {
3925 struct {
3926 uint32_t TokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3927 };
3928 uint32_t Value;
3929 } DW16;
3930
3931 // uint32_t 17
3932 union {
3933 struct {
3934 uint32_t FrameHeaderBitstreamBTI : MOS_BITFIELD_RANGE( 0, 31); //
3935 };
3936 uint32_t Value;
3937 } DW17;
3938
3939 // uint32_t 18
3940 union {
3941 struct {
3942 uint32_t HeaderMetaDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
3943 };
3944 uint32_t Value;
3945 } DW18;
3946
3947 // uint32_t 19
3948 union {
3949 struct {
3950 uint32_t PictureStateBTI : MOS_BITFIELD_RANGE( 0, 31); //
3951 };
3952 uint32_t Value;
3953 } DW19;
3954
3955 // uint32_t 20
3956 union {
3957 struct {
3958 uint32_t MPUBitStreamBTI : MOS_BITFIELD_RANGE( 0, 31); //
3959 };
3960 uint32_t Value;
3961 } DW20;
3962
3963 union {
3964 struct {
3965 uint32_t TokenBitsDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
3966 };
3967 uint32_t Value;
3968 } DW21;
3969 union {
3970 struct {
3971 uint32_t KernelDebugDumpBTI : MOS_BITFIELD_RANGE( 0, 31); //
3972 };
3973 uint32_t Value;
3974 } DW22;
3975 union {
3976 struct {
3977 uint32_t EntropyCostBTI : MOS_BITFIELD_RANGE( 0, 31); //
3978 };
3979 uint32_t Value;
3980 } DW23;
3981 union {
3982 struct {
3983 uint32_t ModeCostUpdateBTI : MOS_BITFIELD_RANGE( 0, 31); //
3984 };
3985 uint32_t Value;
3986 } DW24;
3987 };
3988 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct MediaObjectVp8MpuFhbStaticDataG9)) == 25);
3989
3990 struct MediaObjectVp8TpuFhbStaticDataG9
3991 {
3992 // uint32_t 0
3993 union {
3994 struct {
3995 uint32_t MBsInFrame : MOS_BITFIELD_RANGE( 0, 31); //
3996 };
3997 uint32_t Value;
3998 } DW0;
3999
4000 // uint32_t 1
4001 union {
4002 struct {
4003 uint32_t FrameType : MOS_BITFIELD_BIT( 0 ); //
4004 uint32_t EnableSegmentation : MOS_BITFIELD_BIT( 1 ); //
4005 uint32_t RebinarizationFrameHdr : MOS_BITFIELD_BIT( 2 ); //
4006 uint32_t RefreshEntropyP : MOS_BITFIELD_BIT( 3 ); //
4007 uint32_t MBNoCoeffiscientSkip : MOS_BITFIELD_BIT( 4 ); //
4008 uint32_t : MOS_BITFIELD_RANGE( 5,31 ); //
4009 };
4010 uint32_t Value;
4011 } DW1;
4012
4013 // uint32_t 2
4014 union {
4015 struct {
4016 uint32_t TokenProbabilityStatOffset : MOS_BITFIELD_RANGE( 0,15 ); //
4017 uint32_t TokenProbabilityEndOffset : MOS_BITFIELD_RANGE( 16,31 ); //
4018 };
4019 uint32_t Value;
4020 } DW2;
4021
4022 // uint32_t 3
4023 union {
4024 struct {
4025 uint32_t FrameHeaderBitCount : MOS_BITFIELD_RANGE( 0,15 ); //
4026 uint32_t MaxQP : MOS_BITFIELD_RANGE( 16,23 ); //
4027 uint32_t MinQP : MOS_BITFIELD_RANGE( 24,31 ); //
4028 };
4029 uint32_t Value;
4030 } DW3;
4031
4032 // uint32_t 4
4033 union {
4034 struct {
4035 uint32_t LoopFilterLevelSegment0 : MOS_BITFIELD_RANGE( 0, 7 ); //
4036 uint32_t LoopFilterLevelSegment1 : MOS_BITFIELD_RANGE( 8,15 ); //
4037 uint32_t LoopFilterLevelSegment2 : MOS_BITFIELD_RANGE( 16,23 ); //
4038 uint32_t LoopFilterLevelSegment3 : MOS_BITFIELD_RANGE( 24,31 ); //
4039 };
4040 uint32_t Value;
4041 } DW4;
4042
4043 // uint32_t 5
4044 union {
4045 struct {
4046 uint32_t QuantizationIndexSegment0 : MOS_BITFIELD_RANGE( 0, 7 ); //
4047 uint32_t QuantizationIndexSegment1 : MOS_BITFIELD_RANGE( 8,15 ); //
4048 uint32_t QuantizationIndexSegment2 : MOS_BITFIELD_RANGE( 16,23 ); //
4049 uint32_t QuantizationIndexSegment3 : MOS_BITFIELD_RANGE( 24,31 ); //
4050 };
4051 uint32_t Value;
4052 } DW5;
4053
4054 // uint32_t 6
4055 union {
4056 struct {
4057 uint32_t PakPassNum : MOS_BITFIELD_RANGE( 0, 31); //
4058 };
4059 uint32_t Value;
4060 } DW6;
4061
4062 // uint32_t 7
4063 union {
4064 struct {
4065 uint32_t TokenCostDeltaThreshold : MOS_BITFIELD_RANGE(0, 15); //
4066 uint32_t SkipCostDeltaThreshold : MOS_BITFIELD_RANGE(16, 31); //
4067 };
4068 uint32_t Value;
4069 } DW7;
4070
4071 // uint32_t 8
4072 union {
4073 struct {
4074 uint32_t CumulativeDQIndex01 : MOS_BITFIELD_RANGE( 0, 31); //
4075 };
4076 uint32_t Value;
4077 } DW8;
4078
4079 // uint32_t 9
4080 union {
4081 struct {
4082 uint32_t CumulativeDQIndex02 : MOS_BITFIELD_RANGE( 0, 31); //
4083 };
4084 uint32_t Value;
4085 } DW9;
4086
4087 // uint32_t 10
4088 union {
4089 struct {
4090 uint32_t CumulativeLoopFilter01 : MOS_BITFIELD_RANGE( 0, 31); //
4091 };
4092 uint32_t Value;
4093 } DW10;
4094
4095 // uint32_t 11
4096 union {
4097 struct {
4098 uint32_t CumulativeLoopFilter02 : MOS_BITFIELD_RANGE( 0, 31); //
4099 };
4100 uint32_t Value;
4101 } DW11;
4102
4103 // uint32_t 12
4104 union {
4105 struct {
4106 uint32_t PakTokenStatisticsBTI : MOS_BITFIELD_RANGE( 0, 31); //
4107 };
4108 uint32_t Value;
4109 } DW12;
4110
4111 // uint32_t 13
4112 union {
4113 struct {
4114 uint32_t TokenUpdateFlagsBTI : MOS_BITFIELD_RANGE( 0, 31); //
4115 };
4116 uint32_t Value;
4117 } DW13;
4118
4119 // uint32_t 14
4120 union {
4121 struct {
4122 uint32_t EntropyCostTableBTI : MOS_BITFIELD_RANGE( 0, 31); //
4123 };
4124 uint32_t Value;
4125 } DW14;
4126
4127 // uint32_t 15
4128 union {
4129 struct {
4130 uint32_t FrameHeaderBitstreamBTI : MOS_BITFIELD_RANGE( 0, 31); //
4131 };
4132 uint32_t Value;
4133 } DW15;
4134 // uint32_t 16
4135 union {
4136 struct {
4137 uint32_t DefaultTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4138 };
4139 uint32_t Value;
4140 } DW16;
4141
4142 // uint32_t 17
4143 union {
4144 struct {
4145 uint32_t PictureStateBTI : MOS_BITFIELD_RANGE( 0, 31); //
4146 };
4147 uint32_t Value;
4148 } DW17;
4149
4150 // uint32_t 18
4151 union {
4152 struct {
4153 uint32_t MpuCurbeDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
4154 };
4155 uint32_t Value;
4156 } DW18;
4157
4158 // uint32_t 19
4159 union {
4160 struct {
4161 uint32_t HeaderMetaDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
4162 };
4163 uint32_t Value;
4164 } DW19;
4165
4166 // uint32_t 20
4167 union {
4168 struct {
4169 uint32_t TokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4170 };
4171 uint32_t Value;
4172 } DW20;
4173
4174 // uint32_t 21
4175 union {
4176 struct {
4177 uint32_t PakHardwareTokenProbabilityPass1BTI : MOS_BITFIELD_RANGE( 0, 31); //
4178 };
4179 uint32_t Value;
4180 } DW21;
4181
4182 // uint32_t 22
4183 union {
4184 struct {
4185 uint32_t KeyFrameTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4186 };
4187 uint32_t Value;
4188 } DW22;
4189
4190 // uint32_t 23
4191 union {
4192 struct {
4193 uint32_t UpdatedTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4194 };
4195 uint32_t Value;
4196 } DW23;
4197
4198 // uint32_t 24
4199 union {
4200 struct {
4201 uint32_t PakHardwareTokenProbabilityPass2BTI : MOS_BITFIELD_RANGE( 0, 31); //
4202 };
4203 uint32_t Value;
4204 } DW24;
4205
4206 // uint32_t 25
4207 union {
4208 struct {
4209 uint32_t KernelDebugDumpBTI : MOS_BITFIELD_RANGE( 0, 31); //
4210 };
4211 uint32_t Value;
4212 } DW25;
4213
4214 // uint32_t 26
4215 union {
4216 struct {
4217 uint32_t RepakDecisionSurfaceBTI : MOS_BITFIELD_RANGE(0, 31); //
4218 };
4219 uint32_t Value;
4220 } DW26;
4221 };
4222 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct MediaObjectVp8TpuFhbStaticDataG9)) == 27);
4223
4224 struct CodechalVp8KernelHeaderG9 {
4225 int nKernelCount;
4226
4227 // Normal mode
4228 CODECHAL_KERNEL_HEADER VP8MBEnc_Norm_Frm_I;
4229 CODECHAL_KERNEL_HEADER VP8MBEnc_Norm_Frm_P;
4230
4231 // MPU/FHB
4232 CODECHAL_KERNEL_HEADER VP8_MPU;
4233
4234 // TPU
4235 CODECHAL_KERNEL_HEADER VP8_TPU;
4236
4237 // Intra prediction mode search for only luma components of key-frame.
4238 // To be used when HW intra prediction is disabled.
4239 CODECHAL_KERNEL_HEADER VP8MBEnc_I_Luma;
4240
4241 // HME
4242 CODECHAL_KERNEL_HEADER VP8_ME_P;
4243
4244 // DownScaling
4245 CODECHAL_KERNEL_HEADER PLY_DScale_PLY;
4246
4247 // MBEnc I Dist
4248 CODECHAL_KERNEL_HEADER VP8MBEnc_I_Dist;
4249
4250 // BRC Init
4251 CODECHAL_KERNEL_HEADER VP8_BRC_InitFrame;
4252
4253 // BRC Reset
4254 CODECHAL_KERNEL_HEADER VP8_BRC_ResetFrame;
4255
4256 // BRC Update
4257 CODECHAL_KERNEL_HEADER VP8_BRC_FrameEncUpdate;
4258 };
4259
4260 const uint8_t VP8_IFRAME_VME_COSTS_G9[128][4] =
4261 {
4262 {0x05, 0x1f, 0x02, 0x09},
4263 {0x05, 0x1f, 0x02, 0x09},
4264 {0x08, 0x2b, 0x03, 0x0e},
4265 {0x08, 0x2b, 0x03, 0x0e},
4266 {0x0a, 0x2f, 0x04, 0x12},
4267 {0x0a, 0x2f, 0x04, 0x12},
4268 {0x0d, 0x39, 0x05, 0x17},
4269 {0x0d, 0x39, 0x05, 0x17},
4270 {0x0d, 0x39, 0x05, 0x17},
4271 {0x0f, 0x3b, 0x06, 0x1b},
4272 {0x0f, 0x3b, 0x06, 0x1b},
4273 {0x19, 0x3d, 0x07, 0x20},
4274 {0x19, 0x3d, 0x07, 0x20},
4275 {0x1a, 0x3f, 0x08, 0x24},
4276 {0x1a, 0x3f, 0x08, 0x24},
4277 {0x1a, 0x3f, 0x08, 0x24},
4278 {0x1b, 0x48, 0x09, 0x29},
4279 {0x1b, 0x48, 0x09, 0x29},
4280 {0x1d, 0x49, 0x09, 0x2d},
4281 {0x1d, 0x49, 0x09, 0x2d},
4282 {0x1d, 0x49, 0x09, 0x2d},
4283 {0x1d, 0x49, 0x09, 0x2d},
4284 {0x1e, 0x4a, 0x0a, 0x32},
4285 {0x1e, 0x4a, 0x0a, 0x32},
4286 {0x1e, 0x4a, 0x0a, 0x32},
4287 {0x1e, 0x4a, 0x0a, 0x32},
4288 {0x1f, 0x4b, 0x0b, 0x36},
4289 {0x1f, 0x4b, 0x0b, 0x36},
4290 {0x1f, 0x4b, 0x0b, 0x36},
4291 {0x28, 0x4c, 0x0c, 0x3b},
4292 {0x28, 0x4c, 0x0c, 0x3b},
4293 {0x29, 0x4d, 0x0d, 0x3f},
4294 {0x29, 0x4d, 0x0d, 0x3f},
4295 {0x29, 0x4e, 0x0e, 0x44},
4296 {0x29, 0x4e, 0x0e, 0x44},
4297 {0x2a, 0x4f, 0x0f, 0x48},
4298 {0x2a, 0x4f, 0x0f, 0x48},
4299 {0x2b, 0x58, 0x10, 0x4d},
4300 {0x2b, 0x58, 0x10, 0x4d},
4301 {0x2b, 0x58, 0x11, 0x51},
4302 {0x2b, 0x58, 0x11, 0x51},
4303 {0x2b, 0x58, 0x11, 0x51},
4304 {0x2c, 0x58, 0x12, 0x56},
4305 {0x2c, 0x58, 0x12, 0x56},
4306 {0x2c, 0x59, 0x13, 0x5a},
4307 {0x2c, 0x59, 0x13, 0x5a},
4308 {0x2d, 0x59, 0x14, 0x5f},
4309 {0x2d, 0x59, 0x14, 0x5f},
4310 {0x2e, 0x5a, 0x15, 0x63},
4311 {0x2e, 0x5a, 0x15, 0x63},
4312 {0x2e, 0x5a, 0x16, 0x68},
4313 {0x2e, 0x5a, 0x16, 0x68},
4314 {0x2e, 0x5a, 0x16, 0x68},
4315 {0x2f, 0x5b, 0x17, 0x6c},
4316 {0x2f, 0x5b, 0x17, 0x6c},
4317 {0x38, 0x5b, 0x18, 0x71},
4318 {0x38, 0x5b, 0x18, 0x71},
4319 {0x38, 0x5c, 0x19, 0x76},
4320 {0x38, 0x5c, 0x19, 0x76},
4321 {0x38, 0x5c, 0x1a, 0x7a},
4322 {0x38, 0x5c, 0x1a, 0x7a},
4323 {0x39, 0x5d, 0x1a, 0x7f},
4324 {0x39, 0x5d, 0x1a, 0x7f},
4325 {0x39, 0x5d, 0x1b, 0x83},
4326 {0x39, 0x5d, 0x1b, 0x83},
4327 {0x39, 0x5e, 0x1c, 0x88},
4328 {0x39, 0x5e, 0x1c, 0x88},
4329 {0x3a, 0x5e, 0x1d, 0x8c},
4330 {0x3a, 0x5e, 0x1d, 0x8c},
4331 {0x3a, 0x5f, 0x1e, 0x91},
4332 {0x3a, 0x5f, 0x1e, 0x91},
4333 {0x3a, 0x5f, 0x1f, 0x95},
4334 {0x3a, 0x5f, 0x1f, 0x95},
4335 {0x3a, 0x68, 0x20, 0x9a},
4336 {0x3a, 0x68, 0x20, 0x9a},
4337 {0x3b, 0x68, 0x21, 0x9e},
4338 {0x3b, 0x68, 0x21, 0x9e},
4339 {0x3b, 0x68, 0x22, 0xa3},
4340 {0x3b, 0x68, 0x22, 0xa3},
4341 {0x3b, 0x68, 0x23, 0xa7},
4342 {0x3b, 0x68, 0x23, 0xa7},
4343 {0x3c, 0x68, 0x24, 0xac},
4344 {0x3c, 0x68, 0x24, 0xac},
4345 {0x3c, 0x68, 0x24, 0xac},
4346 {0x3c, 0x69, 0x25, 0xb0},
4347 {0x3c, 0x69, 0x25, 0xb0},
4348 {0x3c, 0x69, 0x26, 0xb5},
4349 {0x3c, 0x69, 0x26, 0xb5},
4350 {0x3d, 0x69, 0x27, 0xb9},
4351 {0x3d, 0x69, 0x27, 0xb9},
4352 {0x3d, 0x69, 0x28, 0xbe},
4353 {0x3d, 0x69, 0x28, 0xbe},
4354 {0x3d, 0x6a, 0x29, 0xc2},
4355 {0x3d, 0x6a, 0x29, 0xc2},
4356 {0x3e, 0x6a, 0x2a, 0xc7},
4357 {0x3e, 0x6a, 0x2a, 0xc7},
4358 {0x3e, 0x6a, 0x2b, 0xcb},
4359 {0x3e, 0x6a, 0x2b, 0xd0},
4360 {0x3f, 0x6b, 0x2c, 0xd4},
4361 {0x3f, 0x6b, 0x2d, 0xd9},
4362 {0x3f, 0x6b, 0x2e, 0xdd},
4363 {0x48, 0x6b, 0x2f, 0xe2},
4364 {0x48, 0x6b, 0x2f, 0xe2},
4365 {0x48, 0x6c, 0x30, 0xe6},
4366 {0x48, 0x6c, 0x31, 0xeb},
4367 {0x48, 0x6c, 0x32, 0xf0},
4368 {0x48, 0x6c, 0x33, 0xf4},
4369 {0x48, 0x6c, 0x34, 0xf9},
4370 {0x49, 0x6d, 0x35, 0xfd},
4371 {0x49, 0x6d, 0x36, 0xff},
4372 {0x49, 0x6d, 0x37, 0xff},
4373 {0x49, 0x6d, 0x38, 0xff},
4374 {0x49, 0x6e, 0x3a, 0xff},
4375 {0x49, 0x6e, 0x3b, 0xff},
4376 {0x4a, 0x6e, 0x3c, 0xff},
4377 {0x4a, 0x6f, 0x3d, 0xff},
4378 {0x4a, 0x6f, 0x3d, 0xff},
4379 {0x4a, 0x6f, 0x3e, 0xff},
4380 {0x4a, 0x6f, 0x3f, 0xff},
4381 {0x4a, 0x6f, 0x40, 0xff},
4382 {0x4b, 0x78, 0x41, 0xff},
4383 {0x4b, 0x78, 0x42, 0xff},
4384 {0x4b, 0x78, 0x43, 0xff},
4385 {0x4b, 0x78, 0x44, 0xff},
4386 {0x4b, 0x78, 0x46, 0xff},
4387 {0x4c, 0x78, 0x47, 0xff},
4388 {0x4c, 0x79, 0x49, 0xff},
4389 {0x4c, 0x79, 0x4a, 0xff}
4390 };
4391
4392 const uint32_t VP8_NewMVSkipThreshold_G9[128] =
4393 {
4394 111, 120, 129, 137, 146, 155, 163, 172, 180, 189, 198, 206, 215, 224, 232, 241,
4395 249, 258, 267, 275, 284, 293, 301, 310, 318, 327, 336, 344, 353, 362, 370, 379,
4396 387, 396, 405, 413, 422, 431, 439, 448, 456, 465, 474, 482, 491, 500, 508, 517,
4397 525, 534, 543, 551, 560, 569, 577, 586, 594, 603, 612, 620, 629, 638, 646, 655,
4398 663, 672, 681, 689, 698, 707, 715, 724, 733, 741, 750, 758, 767, 776, 784, 793,
4399 802, 810, 819, 827, 836, 845, 853, 862, 871, 879, 888, 896, 905, 914, 922, 931,
4400 940, 948, 957, 965, 974, 983, 991, 1000, 1009, 1017, 1026, 1034, 1043, 1052, 1060, 1069,
4401 1078, 1086, 1095, 1103, 1112, 1121, 1129, 1138, 1147, 1155, 1164, 1172, 1181, 1190, 1198, 1208
4402 };
4403
4404 const uint32_t VP8_COST_TABLE_G9[128][7] =
4405 {
4406 {0x398f0500, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x08, 0x0e},
4407 {0x3b8f0600, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x0a, 0x11},
4408 {0x3e8f0700, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x0c, 0x14},
4409 {0x488f0800, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x0f, 0x18},
4410 {0x498f0a00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x11, 0x1b},
4411 {0x4a8f0b00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x13, 0x1e},
4412 {0x4b8f0c00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x15, 0x22},
4413 {0x4b8f0c00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x15, 0x22},
4414 {0x4d8f0d00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x17, 0x25},
4415 {0x4e8f0e00, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x19, 0x29},
4416 {0x4f8f0f00, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x1b, 0x2c},
4417 {0x588f1800, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x1d, 0x2f},
4418 {0x588f1900, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x1f, 0x33},
4419 {0x598f1900, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x21, 0x36},
4420 {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x23, 0x3a},
4421 {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x23, 0x3a},
4422 {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x25, 0x3d},
4423 {0x5b8f1b00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x27, 0x40},
4424 {0x5b8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2a, 0x44},
4425 {0x5b8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2a, 0x44},
4426 {0x5c8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2c, 0x47},
4427 {0x5c8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2c, 0x47},
4428 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2e, 0x4a},
4429 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2e, 0x4a},
4430 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x30, 0x4e},
4431 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x30, 0x4e},
4432 {0x5e8f1e00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x32, 0x51},
4433 {0x5e8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x34, 0x55},
4434 {0x5e8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x34, 0x55},
4435 {0x5f8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x36, 0x58},
4436 {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x38, 0x5b},
4437 {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x3a, 0x5f},
4438 {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x3c, 0x62},
4439 {0x688f2900, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x3e, 0x65},
4440 {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x40, 0x69},
4441 {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x43, 0x6c},
4442 {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x45, 0x70},
4443 {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x47, 0x73},
4444 {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x49, 0x76},
4445 {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4b, 0x7a},
4446 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4d, 0x7d},
4447 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4d, 0x7d},
4448 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4f, 0x81},
4449 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x51, 0x84},
4450 {0x6b8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x53, 0x87},
4451 {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x55, 0x8b},
4452 {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x57, 0x8e},
4453 {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x59, 0x91},
4454 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x5b, 0x95},
4455 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x5e, 0x98},
4456 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x60, 0x9c},
4457 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x60, 0x9c},
4458 {0x6d8f2e00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x62, 0x9f},
4459 {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x64, 0xa2},
4460 {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x66, 0xa6},
4461 {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x68, 0xa9},
4462 {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x6a, 0xad},
4463 {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x6c, 0xb0},
4464 {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x6e, 0xb3},
4465 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x70, 0xb7},
4466 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x72, 0xba},
4467 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x74, 0xbd},
4468 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x76, 0xc1},
4469 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x79, 0xc4},
4470 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x7b, 0xc8},
4471 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x7d, 0xcb},
4472 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x7f, 0xce},
4473 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x81, 0xd2},
4474 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x83, 0xd5},
4475 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x85, 0xd9},
4476 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x87, 0xdc},
4477 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x89, 0xdf},
4478 {0x798f3a00, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x8b, 0xe3},
4479 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x8d, 0xe6},
4480 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x8f, 0xe9},
4481 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x91, 0xed},
4482 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x94, 0xf0},
4483 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x96, 0xf4},
4484 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x98, 0xf7},
4485 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x9a, 0xfa},
4486 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x9c, 0xfe},
4487 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0x9e, 0xff},
4488 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0x9e, 0xff},
4489 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0xa0, 0xff},
4490 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0xa2, 0xff},
4491 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0xa4, 0xff},
4492 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xa6, 0xff},
4493 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xa8, 0xff},
4494 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xaa, 0xff},
4495 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xac, 0xff},
4496 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xaf, 0xff},
4497 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xb1, 0xff},
4498 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xb3, 0xff},
4499 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xb5, 0xff},
4500 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x5d584c49, 0xb7, 0xff},
4501 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x5d584c49, 0xb9, 0xff},
4502 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x5d584c49, 0xbd, 0xff},
4503 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x493a3b2e, 0x5e584d4a, 0xc1, 0xff},
4504 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493a3b2e, 0x5e584d4a, 0xc5, 0xff},
4505 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3b2e, 0x5e584e4a, 0xc8, 0xff},
4506 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3b2e, 0x5e584e4a, 0xcc, 0xff},
4507 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x5f594e4b, 0xd0, 0xff},
4508 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x5f594e4b, 0xd2, 0xff},
4509 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x5f594e4b, 0xd4, 0xff},
4510 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x4a3c3c2f, 0x5f594f4b, 0xd8, 0xff},
4511 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x4a3c3c2f, 0x5f594f4b, 0xdc, 0xff},
4512 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4a3c3d38, 0x68594f4c, 0xe0, 0xff},
4513 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4a3c3d38, 0x68594f4c, 0xe5, 0xff},
4514 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3d38, 0x685a584c, 0xe9, 0xff},
4515 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3d38, 0x685a584c, 0xed, 0xff},
4516 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3e38, 0x685a584c, 0xf1, 0xff},
4517 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3e38, 0x685a584c, 0xf5, 0xff},
4518 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4b3e3e39, 0x695b584d, 0xfe, 0xff},
4519 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3e3e39, 0x695b594d, 0xff, 0xff},
4520 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3e3e39, 0x695b594d, 0xff, 0xff},
4521 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3f3f39, 0x695b594e, 0xff, 0xff},
4522 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3f3f39, 0x695b594e, 0xff, 0xff},
4523 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4d3f3f3a, 0x6a5c594e, 0xff, 0xff},
4524 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4d3f3f3a, 0x6a5c594e, 0xff, 0xff},
4525 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c594f, 0xff, 0xff},
4526 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c594f, 0xff, 0xff},
4527 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c5a4f, 0xff, 0xff},
4528 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c5a4f, 0xff, 0xff},
4529 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4e48483a, 0x6a5d5a58, 0xff, 0xff},
4530 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4e48483b, 0x6b5d5a58, 0xff, 0xff},
4531 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4e48483b, 0x6b5d5a58, 0xff, 0xff},
4532 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4f48493b, 0x6b5d5b58, 0xff, 0xff},
4533 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4f49493b, 0x6b5e5b58, 0xff, 0xff}
4534 };
4535
4536 const uint32_t VP8_SINGLESU[56] =
4537 {
4538 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4539 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4540 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4541 0x00000000, 0x00000000
4542 };
4543
4544 const uint8_t VP8_FULLSPIRAL_48x40[56] =
4545 {
4546 // L -> U -> R -> D
4547 0x0F,
4548 0xF0,
4549 0x01, 0x01,
4550 0x10, 0x10,
4551 0x0F, 0x0F, 0x0F,
4552 0xF0, 0xF0, 0xF0,
4553 0x01, 0x01, 0x01, 0x01,
4554 0x10, 0x10, 0x10, 0x10,
4555 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
4556 0xF0, 0xF0, 0xF0, 0xF0, 0xF0,
4557 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
4558 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, // The last 0x10 steps outside the search window.
4559 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, // These are outside the search window.
4560 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0
4561 };
4562
4563 const uint8_t VP8_RASTERSCAN_48x40[56] =
4564 {
4565 0x11, 0x01, 0x01, 0x01,
4566 0x11, 0x01, 0x01, 0x01,
4567 0x11, 0x01, 0x01, 0x01,
4568 0x11, 0x01, 0x01, 0x01,
4569 0x11, 0x01, 0x01, 0x01,
4570 0x01, 0x01, 0x01, 0x01,
4571 0x00, 0x00, 0x00, 0x00,
4572 0x00, 0x00, 0x00, 0x00,
4573 0x00, 0x00, 0x00, 0x00,
4574 0x00, 0x00, 0x00, 0x00,
4575 0x00, 0x00, 0x00, 0x00,
4576 0x00, 0x00, 0x00, 0x00,
4577 0x00, 0x00, 0x00, 0x00,
4578 0x00, 0x00, 0x00, 0x00
4579 };
4580
4581 const uint8_t VP8_DIAMOND[56] =
4582 {
4583 0x0F, 0xF1, 0x0F, 0x12,//5
4584 0x0D, 0xE2, 0x22, 0x1E,//9
4585 0x10, 0xFF, 0xE2, 0x20,//13
4586 0xFC, 0x06, 0xDD,//16
4587 0x2E, 0xF1, 0x3F, 0xD3, 0x11, 0x3D, 0xF3, 0x1F,//24
4588 0xEB, 0xF1, 0xF1, 0xF1,//28
4589 0x4E, 0x11, 0x12, 0xF2, 0xF1,//33
4590 0xE0, 0xFF, 0xFF, 0x0D, 0x1F, 0x1F,//39
4591 0x20, 0x11, 0xCF, 0xF1, 0x05, 0x11,//45
4592 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,//51
4593 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
4594 };
4595
4596 const uint8_t VP8_MAINREF_TABLE_G9[8] =
4597 {
4598 0, 1, 2, 9, 3, 13, 14, 57
4599 };
4600
4601 const uint8_t VP8_NUM_REFS_G9[8] =
4602 {
4603 0, 1, 1, 2, 1, 2, 2, 3
4604 };
4605
4606 const uint8_t VP8_BRC_IFRAME_COST_TABLE_G9[128][4] =
4607 {
4608 { 0x5, 0x5, 0x8, 0x8},
4609 { 0xa, 0xa, 0xd, 0xd},
4610 { 0xd, 0xf, 0xf, 0x19},
4611 {0x19, 0x1a, 0x1a, 0x1a},
4612 {0x1b, 0x1b, 0x1d, 0x1d},
4613 {0x1d, 0x1d, 0x1e, 0x1e},
4614 {0x1e, 0x1e, 0x1f, 0x1f},
4615 {0x1f, 0x28, 0x28, 0x29},
4616 {0x29, 0x29, 0x29, 0x2a},
4617 {0x2a, 0x2b, 0x2b, 0x2b},
4618 {0x2b, 0x2b, 0x2c, 0x2c},
4619 {0x2c, 0x2c, 0x2d, 0x2d},
4620 {0x2e, 0x2e, 0x2e, 0x2e},
4621 {0x2e, 0x2f, 0x2f, 0x38},
4622 {0x38, 0x38, 0x38, 0x38},
4623 {0x38, 0x39, 0x39, 0x39},
4624 {0x39, 0x39, 0x39, 0x3a},
4625 {0x3a, 0x3a, 0x3a, 0x3a},
4626 {0x3a, 0x3a, 0x3a, 0x3b},
4627 {0x3b, 0x3b, 0x3b, 0x3b},
4628 {0x3b, 0x3c, 0x3c, 0x3c},
4629 {0x3c, 0x3c, 0x3c, 0x3c},
4630 {0x3d, 0x3d, 0x3d, 0x3d},
4631 {0x3d, 0x3d, 0x3e, 0x3e},
4632 {0x3e, 0x3e, 0x3f, 0x3f},
4633 {0x3f, 0x48, 0x48, 0x48},
4634 {0x48, 0x48, 0x48, 0x48},
4635 {0x49, 0x49, 0x49, 0x49},
4636 {0x49, 0x49, 0x4a, 0x4a},
4637 {0x4a, 0x4a, 0x4a, 0x4a},
4638 {0x4b, 0x4b, 0x4b, 0x4b},
4639 {0x4b, 0x4c, 0x4c, 0x4c},
4640 {0x1f, 0x1f, 0x2b, 0x2b},
4641 {0x2f, 0x2f, 0x39, 0x39},
4642 {0x39, 0x3b, 0x3b, 0x3d},
4643 {0x3d, 0x3f, 0x3f, 0x3f},
4644 {0x48, 0x48, 0x49, 0x49},
4645 {0x49, 0x49, 0x4a, 0x4a},
4646 {0x4a, 0x4a, 0x4b, 0x4b},
4647 {0x4b, 0x4c, 0x4c, 0x4d},
4648 {0x4d, 0x4e, 0x4e, 0x4f},
4649 {0x4f, 0x58, 0x58, 0x58},
4650 {0x58, 0x58, 0x58, 0x58},
4651 {0x59, 0x59, 0x59, 0x59},
4652 {0x5a, 0x5a, 0x5a, 0x5a},
4653 {0x5a, 0x5b, 0x5b, 0x5b},
4654 {0x5b, 0x5c, 0x5c, 0x5c},
4655 {0x5c, 0x5d, 0x5d, 0x5d},
4656 {0x5d, 0x5e, 0x5e, 0x5e},
4657 {0x5e, 0x5f, 0x5f, 0x5f},
4658 {0x5f, 0x68, 0x68, 0x68},
4659 {0x68, 0x68, 0x68, 0x68},
4660 {0x68, 0x68, 0x68, 0x68},
4661 {0x69, 0x69, 0x69, 0x69},
4662 {0x69, 0x69, 0x69, 0x69},
4663 {0x6a, 0x6a, 0x6a, 0x6a},
4664 {0x6a, 0x6a, 0x6b, 0x6b},
4665 {0x6b, 0x6b, 0x6b, 0x6c},
4666 {0x6c, 0x6c, 0x6c, 0x6c},
4667 {0x6d, 0x6d, 0x6d, 0x6d},
4668 {0x6e, 0x6e, 0x6e, 0x6f},
4669 {0x6f, 0x6f, 0x6f, 0x6f},
4670 {0x78, 0x78, 0x78, 0x78},
4671 {0x78, 0x78, 0x79, 0x79},
4672 { 0x2, 0x2, 0x3, 0x3},
4673 { 0x4, 0x4, 0x5, 0x5},
4674 { 0x5, 0x6, 0x6, 0x7},
4675 { 0x7, 0x8, 0x8, 0x8},
4676 { 0x9, 0x9, 0x9, 0x9},
4677 { 0x9, 0x9, 0xa, 0xa},
4678 { 0xa, 0xa, 0xb, 0xb},
4679 { 0xb, 0xc, 0xc, 0xd},
4680 { 0xd, 0xe, 0xe, 0xf},
4681 { 0xf, 0x10, 0x10, 0x11},
4682 {0x11, 0x11, 0x12, 0x12},
4683 {0x13, 0x13, 0x14, 0x14},
4684 {0x15, 0x15, 0x16, 0x16},
4685 {0x16, 0x17, 0x17, 0x18},
4686 {0x18, 0x19, 0x19, 0x1a},
4687 {0x1a, 0x1a, 0x1a, 0x1b},
4688 {0x1b, 0x1c, 0x1c, 0x1d},
4689 {0x1d, 0x1e, 0x1e, 0x1f},
4690 {0x1f, 0x20, 0x20, 0x21},
4691 {0x21, 0x22, 0x22, 0x23},
4692 {0x23, 0x24, 0x24, 0x24},
4693 {0x25, 0x25, 0x26, 0x26},
4694 {0x27, 0x27, 0x28, 0x28},
4695 {0x29, 0x29, 0x2a, 0x2a},
4696 {0x2b, 0x2b, 0x2c, 0x2d},
4697 {0x2e, 0x2f, 0x2f, 0x30},
4698 {0x31, 0x32, 0x33, 0x34},
4699 {0x35, 0x36, 0x37, 0x38},
4700 {0x3a, 0x3b, 0x3c, 0x3d},
4701 {0x3d, 0x3e, 0x3f, 0x40},
4702 {0x41, 0x42, 0x43, 0x44},
4703 {0x46, 0x47, 0x49, 0x4a},
4704 { 0x9, 0x9, 0xe, 0xe},
4705 {0x12, 0x12, 0x17, 0x17},
4706 {0x17, 0x1b, 0x1b, 0x20},
4707 {0x20, 0x24, 0x24, 0x24},
4708 {0x29, 0x29, 0x2d, 0x2d},
4709 {0x2d, 0x2d, 0x32, 0x32},
4710 {0x32, 0x32, 0x36, 0x36},
4711 {0x36, 0x3b, 0x3b, 0x3f},
4712 {0x3f, 0x44, 0x44, 0x48},
4713 {0x48, 0x4d, 0x4d, 0x51},
4714 {0x51, 0x51, 0x56, 0x56},
4715 {0x5a, 0x5a, 0x5f, 0x5f},
4716 {0x63, 0x63, 0x68, 0x68},
4717 {0x68, 0x6c, 0x6c, 0x71},
4718 {0x71, 0x76, 0x76, 0x7a},
4719 {0x7a, 0x7f, 0x7f, 0x83},
4720 {0x83, 0x88, 0x88, 0x8c},
4721 {0x8c, 0x91, 0x91, 0x95},
4722 {0x95, 0x9a, 0x9a, 0x9e},
4723 {0x9e, 0xa3, 0xa3, 0xa7},
4724 {0xa7, 0xac, 0xac, 0xac},
4725 {0xb0, 0xb0, 0xb5, 0xb5},
4726 {0xb9, 0xb9, 0xbe, 0xbe},
4727 {0xc2, 0xc2, 0xc7, 0xc7},
4728 {0xcb, 0xd0, 0xd4, 0xd9},
4729 {0xdd, 0xe2, 0xe2, 0xe6},
4730 {0xeb, 0xf0, 0xf4, 0xf9},
4731 {0xfd, 0xff, 0xff, 0xff},
4732 {0xff, 0xff, 0xff, 0xff},
4733 {0xff, 0xff, 0xff, 0xff},
4734 {0xff, 0xff, 0xff, 0xff},
4735 {0xff, 0xff, 0xff, 0xff}
4736 };
4737
4738 const uint32_t VP8_BRC_PFRAME_COST_TABLE_G9[256] =
4739 {
4740 0x06040402,
4741 0x06040402,
4742 0x06040402,
4743 0x06040402,
4744 0x0d080805,
4745 0x0d080805,
4746 0x0d080805,
4747 0x0d080805,
4748 0x0d080805,
4749 0x190b0c07,
4750 0x190b0c07,
4751 0x190b0c07,
4752 0x190b0c07,
4753 0x1c0f0f0a,
4754 0x1c0f0f0a,
4755 0x1c0f0f0a,
4756 0x1c0f0f0a,
4757 0x1c0f0f0a,
4758 0x2819190c,
4759 0x2819190c,
4760 0x2819190c,
4761 0x2819190c,
4762 0x2819190c,
4763 0x2819190c,
4764 0x2819190c,
4765 0x2819190c,
4766 0x291b1b0f,
4767 0x291b1b0f,
4768 0x291b1b0f,
4769 0x291b1b0f,
4770 0x291b1b0f,
4771 0x2b1d1d18,
4772 0x2b1d1d18,
4773 0x2b1d1d18,
4774 0x2b1d1d18,
4775 0x2c1f1f19,
4776 0x2c1f1f19,
4777 0x2c1f1f19,
4778 0x2c1f1f19,
4779 0x2e28281b,
4780 0x2e28281b,
4781 0x2e28281b,
4782 0x2e28281b,
4783 0x2e28281b,
4784 0x2f29291c,
4785 0x2f29291c,
4786 0x2f29291c,
4787 0x2f29291c,
4788 0x382a2a1d,
4789 0x382a2a1d,
4790 0x382a2a1d,
4791 0x382a2a1d,
4792 0x382a2a1d,
4793 0x392b2b1e,
4794 0x392b2b1e,
4795 0x392b2b1e,
4796 0x392b2b1e,
4797 0x3a2c2c1f,
4798 0x3a2c2c1f,
4799 0x3a2c2c1f,
4800 0x3a2c2c1f,
4801 0x3b2d2d28,
4802 0x3b2d2d28,
4803 0x3b2d2d28,
4804 0x3b2d2d28,
4805 0x3b2e2e29,
4806 0x3b2e2e29,
4807 0x3b2e2e29,
4808 0x3b2e2e29,
4809 0x3c2f2f29,
4810 0x3c2f2f29,
4811 0x3c2f2f29,
4812 0x3c2f2f29,
4813 0x3d38382a,
4814 0x3d38382a,
4815 0x3d38382a,
4816 0x3d38382a,
4817 0x3e38382b,
4818 0x3e38382b,
4819 0x3e38382b,
4820 0x3e38382b,
4821 0x3f38392b,
4822 0x3f38392b,
4823 0x3f38392b,
4824 0x3f38392b,
4825 0x3f38392b,
4826 0x3f39392c,
4827 0x3f39392c,
4828 0x3f39392c,
4829 0x3f39392c,
4830 0x48393a2c,
4831 0x48393a2c,
4832 0x48393a2c,
4833 0x48393a2c,
4834 0x483a3a2d,
4835 0x483a3a2d,
4836 0x483a3a2d,
4837 0x493a3b2e,
4838 0x493a3b2e,
4839 0x493b3b2e,
4840 0x493b3b2e,
4841 0x493b3c2f,
4842 0x493b3c2f,
4843 0x493b3c2f,
4844 0x4a3c3c2f,
4845 0x4a3c3c2f,
4846 0x4a3c3d38,
4847 0x4a3c3d38,
4848 0x4b3d3d38,
4849 0x4b3d3d38,
4850 0x4b3d3e38,
4851 0x4b3d3e38,
4852 0x4b3e3e39,
4853 0x4c3e3e39,
4854 0x4c3e3e39,
4855 0x4c3f3f39,
4856 0x4c3f3f39,
4857 0x4d3f3f3a,
4858 0x4d3f3f3a,
4859 0x4d48483a,
4860 0x4d48483a,
4861 0x4d48483a,
4862 0x4d48483a,
4863 0x4e48483a,
4864 0x4e48483b,
4865 0x4e48483b,
4866 0x4f48493b,
4867 0x4f49493b,
4868 0x1a0c0907,
4869 0x1a0c0907,
4870 0x1a0c0907,
4871 0x1a0c0907,
4872 0x291b190e,
4873 0x291b190e,
4874 0x291b190e,
4875 0x291b190e,
4876 0x291b190e,
4877 0x2e281e1a,
4878 0x2e281e1a,
4879 0x2e281e1a,
4880 0x2e281e1a,
4881 0x392b291e,
4882 0x392b291e,
4883 0x392b291e,
4884 0x392b291e,
4885 0x392b291e,
4886 0x3c2e2b29,
4887 0x3c2e2b29,
4888 0x3c2e2b29,
4889 0x3c2e2b29,
4890 0x3c2e2b29,
4891 0x3c2e2b29,
4892 0x3c2e2b29,
4893 0x3c2e2b29,
4894 0x3e382e2a,
4895 0x3e382e2a,
4896 0x3e382e2a,
4897 0x3e382e2a,
4898 0x3e382e2a,
4899 0x483a382c,
4900 0x483a382c,
4901 0x483a382c,
4902 0x483a382c,
4903 0x493b392e,
4904 0x493b392e,
4905 0x493b392e,
4906 0x493b392e,
4907 0x4b3d3a38,
4908 0x4b3d3a38,
4909 0x4b3d3a38,
4910 0x4b3d3a38,
4911 0x4b3d3a38,
4912 0x4c3e3b38,
4913 0x4c3e3b38,
4914 0x4c3e3b38,
4915 0x4c3e3b38,
4916 0x4d483c39,
4917 0x4d483c39,
4918 0x4d483c39,
4919 0x4d483c39,
4920 0x4d483c39,
4921 0x4e483e3a,
4922 0x4e483e3a,
4923 0x4e483e3a,
4924 0x4e483e3a,
4925 0x4f493f3b,
4926 0x4f493f3b,
4927 0x4f493f3b,
4928 0x4f493f3b,
4929 0x584a483c,
4930 0x584a483c,
4931 0x584a483c,
4932 0x584a483c,
4933 0x594b483d,
4934 0x594b483d,
4935 0x594b483d,
4936 0x594b483d,
4937 0x594b493e,
4938 0x594b493e,
4939 0x594b493e,
4940 0x594b493e,
4941 0x5a4c493f,
4942 0x5a4c493f,
4943 0x5a4c493f,
4944 0x5a4c493f,
4945 0x5b4d4a48,
4946 0x5b4d4a48,
4947 0x5b4d4a48,
4948 0x5b4d4a48,
4949 0x5b4d4b48,
4950 0x5b4d4b48,
4951 0x5b4d4b48,
4952 0x5b4d4b48,
4953 0x5b4d4b48,
4954 0x5c4e4b48,
4955 0x5c4e4b48,
4956 0x5c4e4b48,
4957 0x5c4e4b48,
4958 0x5c4f4c49,
4959 0x5c4f4c49,
4960 0x5c4f4c49,
4961 0x5c4f4c49,
4962 0x5d584c49,
4963 0x5d584c49,
4964 0x5d584c49,
4965 0x5e584d4a,
4966 0x5e584d4a,
4967 0x5e584e4a,
4968 0x5e584e4a,
4969 0x5f594e4b,
4970 0x5f594e4b,
4971 0x5f594e4b,
4972 0x5f594f4b,
4973 0x5f594f4b,
4974 0x68594f4c,
4975 0x68594f4c,
4976 0x685a584c,
4977 0x685a584c,
4978 0x685a584c,
4979 0x685a584c,
4980 0x695b584d,
4981 0x695b594d,
4982 0x695b594d,
4983 0x695b594e,
4984 0x695b594e,
4985 0x6a5c594e,
4986 0x6a5c594e,
4987 0x6a5c594f,
4988 0x6a5c594f,
4989 0x6a5c5a4f,
4990 0x6a5c5a4f,
4991 0x6a5d5a58,
4992 0x6b5d5a58,
4993 0x6b5d5a58,
4994 0x6b5d5b58,
4995 0x6b5e5b58,
4996 };
4997
4998 const uint16_t VP8_MvRefCostContext_G9[6][4][2] =
4999 {
5000 { { 1328, 10 },
5001 { 2047, 1 },
5002 { 2047, 1 },
5003 { 214, 304 },
5004 },
5005 { { 1072, 21 },
5006 { 979, 27 },
5007 { 1072, 21 },
5008 { 321, 201 },
5009 },
5010 { { 235, 278 },
5011 { 511, 107 },
5012 { 553, 93 },
5013 { 488, 115 },
5014 },
5015 { { 534, 99 },
5016 { 560, 92 },
5017 { 255, 257 },
5018 { 505, 109 },
5019 },
5020 { { 174, 361 },
5021 { 238, 275 },
5022 { 255, 257 },
5023 { 744, 53 },
5024 },
5025 { { 32, 922 },
5026 { 113, 494 },
5027 { 255, 257 },
5028 { 816, 43 },
5029 },
5030 };
5031
5032 const uint16_t VP8_QUANT_DC_G9[CODECHAL_VP8_MAX_QP] =
5033 {
5034 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 17,
5035 18, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 28,
5036 29, 30, 31, 32, 33, 34, 35, 36, 37, 37, 38, 39, 40, 41, 42, 43,
5037 44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
5038 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
5039 75, 76, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
5040 91, 93, 95, 96, 98, 100, 101, 102, 104, 106, 108, 110, 112, 114, 116, 118,
5041 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 143, 145, 148, 151, 154, 157
5042 };
5043
5044 const uint16_t VP8_QUANT_AC_G9[CODECHAL_VP8_MAX_QP/* + 1 + 32*/] =
5045 {
5046 /*4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,*/
5047 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
5048 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
5049 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
5050 52, 53, 54, 55, 56, 57, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76,
5051 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108,
5052 110, 112, 114, 116, 119, 122, 125, 128, 131, 134, 137, 140, 143, 146, 149, 152,
5053 155, 158, 161, 164, 167, 170, 173, 177, 181, 185, 189, 193, 197, 201, 205, 209,
5054 213, 217, 221, 225, 229, 234, 239, 245, 249, 254, 259, 264, 269, 274, 279, 284/*,
5055 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284*/
5056 };
5057
5058 extern const uint16_t VP8_MB_MODE_COST_LUMA_G9[10] =
5059 { 657, 869, 915, 917, 208, 0, 0, 0, 0, 0};
5060
5061 static const uint16_t VP8_BLOCK_MODE_COST_G9[10][10][10] =
5062 {
5063 { {37, 1725, 1868, 1151, 1622, 2096, 2011, 1770, 2218, 2128 },
5064 {139, 759, 1683, 911, 1455, 1846, 1570, 1295, 1792, 1648 },
5065 {560, 1383, 408, 639, 1612, 1174, 1562, 1736, 847, 991 },
5066 {191, 1293, 1299, 466, 1774, 1840, 1784, 1691, 1698, 1505 },
5067 {211, 1624, 1294, 779, 714, 1622, 2222, 1554, 1706, 903 },
5068 {297, 1259, 1098, 1062, 1583, 618, 1053, 1889, 851, 1127 },
5069 {275, 703, 1356, 1111, 1597, 1075, 656, 1529, 1531, 1275 },
5070 {150, 1046, 1760, 1039, 1353, 1981, 2174, 728, 1730, 1379 },
5071 {516, 1414, 741, 1045, 1495, 738, 1288, 1619, 442, 1200 },
5072 {424, 1365, 706, 825, 1197, 1453, 1191, 1462, 1186, 519 },
5073
5074 },
5075 { {393, 515, 1491, 549, 1598, 1524, 964, 1126, 1651, 2172 },
5076 {693, 237, 1954, 641, 1525, 2073, 1183, 971, 1973, 2235 },
5077 {560, 739, 855, 836, 1224, 1115, 966, 839, 1076, 767 },
5078 {657, 368, 1406, 425, 1672, 1853, 1210, 1125, 1969, 1542 },
5079 {321, 1056, 1776, 774, 803, 3311, 1265, 1177, 1366, 636 },
5080 {693, 510, 949, 877, 1049, 658, 882, 1178, 1515, 1111 },
5081 {744, 377, 1278, 958, 1576, 1168, 477, 1146, 1838, 1501 },
5082 {488, 477, 1767, 973, 1107, 1511, 1773, 486, 1527, 1449 },
5083 {744, 1004, 695, 1012, 1326, 834, 1215, 774, 724, 704 },
5084 {522, 567, 1036, 1082, 1039, 1333, 873, 1135, 1189, 677 },
5085
5086 },
5087 { {103, 1441, 1000, 864, 1513, 1928, 1832, 1916, 1663, 1567 },
5088 {304, 872, 1100, 515, 1416, 1417, 3463, 1051, 1305, 1227 },
5089 {684, 2176, 242, 729, 1867, 1496, 2056, 1544, 1038, 930 },
5090 {534, 1198, 669, 300, 1805, 1377, 2165, 1894, 1249, 1153 },
5091 {346, 1602, 1178, 612, 997, 3381, 1335, 1328, 997, 646 },
5092 {393, 1027, 649, 813, 1276, 945, 1545, 1278, 875, 1031 },
5093 {528, 996, 930, 617, 1086, 1190, 621, 2760, 787, 1347 },
5094 {216, 873, 1595, 738, 1339, 3896, 3898, 743, 1343, 1605 },
5095 {675, 1580, 543, 749, 1859, 1245, 1589, 2377, 384, 1075 },
5096 {594, 1163, 415, 684, 1474, 1080, 1491, 1478, 1077, 801 },
5097 },
5098 { {238, 1131, 1483, 398, 1510, 1651, 1495, 1545, 1970, 2090 },
5099 {499, 456, 1499, 449, 1558, 1691, 1272, 969, 2114, 2116 },
5100 {675, 1386, 318, 645, 1449, 1588, 1666, 1925, 979, 859 },
5101 {467, 957, 1223, 238, 1825, 1704, 1608, 1560, 1665, 1376 },
5102 {331, 1460, 1238, 627, 787, 1882, 3928, 1544, 1897, 579 },
5103 {457, 1038, 903, 784, 1158, 725, 955, 1517, 842, 1016 },
5104 {505, 497, 1131, 812, 1508, 1206, 703, 1072, 1254, 1256 },
5105 {397, 741, 1336, 642, 1506, 1852, 1340, 599, 1854, 1000 },
5106 {625, 1212, 597, 750, 1291, 1057, 1401, 1401, 527, 954 },
5107 {499, 1041, 654, 752, 1299, 1217, 1605, 1424, 1377, 505 },
5108 },
5109 { {263, 1094, 1218, 602, 938, 1487, 1231, 1016, 1724, 1448 },
5110 {452, 535, 1728, 562, 1008, 1471, 1473, 873, 3182, 1136 },
5111 {553, 1570, 935, 1093, 826, 1339, 879, 1007, 1006, 476 },
5112 {365, 900, 1050, 582, 866, 1398, 1236, 1123, 1608, 1039 },
5113 {294, 2044, 1790, 1143, 430, 1642, 3688, 1549, 2080, 704 },
5114 {703, 1210, 958, 815, 1211, 960, 623, 2455, 815, 559 },
5115 {675, 574, 862, 1261, 866, 864, 761, 1267, 1014, 936 },
5116 {342, 1254, 1857, 989, 612, 1856, 1858, 553, 1840, 1037 },
5117 {553, 1316, 811, 1072, 1068, 728, 1328, 1317, 1064, 475 },
5118 {288, 1303, 1167, 1167, 823, 1634, 1636, 2497, 1294, 491 },
5119 },
5120 { {227, 1059, 1369, 1066, 1505, 740, 970, 1511, 972, 1775 },
5121 {516, 587, 1033, 646, 1188, 748, 978, 1445, 1294, 1450 },
5122 {684, 1048, 663, 747, 1126, 826, 1386, 1128, 635, 924 },
5123 {494, 814, 933, 510, 1606, 951, 878, 1344, 1031, 1347 },
5124 {553, 1071, 1327, 726, 809, 3376, 1330, 1324, 1062, 407 },
5125 {625, 1120, 988, 1121, 1197, 347, 1064, 1308, 862, 1206 },
5126 {633, 853, 1657, 1073, 1662, 634, 460, 1405, 811, 1155 },
5127 {505, 621, 1394, 876, 1394, 876, 878, 795, 878, 1399 },
5128 {684, 1302, 968, 1704, 1280, 561, 972, 1713, 387, 1104 },
5129 {397, 1447, 1060, 867, 957, 1058, 749, 1475, 1210, 660 },
5130 },
5131 { {331, 933, 1647, 761, 1647, 998, 513, 1402, 1461, 2219 },
5132 {573, 485, 1968, 641, 1570, 1198, 588, 1086, 1382, 1982 },
5133 {790, 942, 570, 790, 1607, 1005, 938, 1193, 714, 751 },
5134 {511, 745, 1152, 492, 1878, 1206, 596, 1867, 1617, 1157 },
5135 {452, 1308, 896, 896, 451, 1308, 3354, 1301, 1306, 794 },
5136 {693, 670, 1072, 1020, 1687, 566, 488, 1432, 1096, 3142 },
5137 {778, 566, 1993, 1283, 3139, 1251, 227, 1378, 1784, 1447 },
5138 {393, 937, 1091, 934, 939, 1348, 1092, 579, 1351, 1095 },
5139 {560, 1013, 1007, 1014, 1011, 644, 1165, 1155, 605, 1016 },
5140 {567, 627, 997, 793, 2562, 998, 849, 1260, 922, 748 },
5141 },
5142 { {338, 762, 1868, 717, 1247, 1757, 1263, 535, 1751, 2162 },
5143 {488, 442, 3235, 756, 1658, 1814, 1264, 528, 1857, 2119 },
5144 {522, 1087, 840, 1103, 843, 1354, 1098, 888, 946, 588 },
5145 {483, 688, 1502, 651, 1213, 1446, 1397, 491, 1908, 1253 },
5146 {452, 1386, 1910, 1175, 298, 1507, 3553, 930, 1904, 905 },
5147 {713, 839, 716, 715, 932, 719, 931, 848, 3088, 1042 },
5148 {516, 495, 1331, 1340, 1331, 1069, 665, 702, 1593, 1337 },
5149 {401, 977, 2167, 1537, 1069, 1764, 3810, 259, 3624, 1578 },
5150 {560, 1104, 601, 1371, 965, 658, 2704, 779, 967, 969 },
5151 {547, 1057, 801, 1141, 1133, 1397, 937, 605, 1252, 631 },
5152 },
5153 { {163, 1240, 925, 983, 1653, 1321, 1353, 1566, 946, 1601 },
5154 {401, 726, 758, 836, 1241, 926, 1656, 795, 1394, 1396 },
5155 {905, 1073, 366, 876, 1436, 1576, 1732, 2432, 459, 1019 },
5156 {594, 922, 835, 417, 1387, 1124, 1098, 2042, 843, 1023 },
5157 {415, 1262, 860, 1274, 758, 1272, 3318, 1010, 1276, 503 },
5158 {641, 1018, 1020, 1095, 1619, 667, 1371, 2348, 397, 849 },
5159 {560, 817, 903, 1014, 1420, 695, 756, 904, 821, 1421 },
5160 {406, 596, 1001, 993, 1257, 1258, 1260, 746, 1002, 1264 },
5161 {979, 1371, 780, 1188, 1693, 1024, 1286, 1699, 183, 1405 },
5162 {733, 1292, 458, 884, 1554, 889, 1151, 1286, 738, 740 },
5163 },
5164 { {109, 1377, 1177, 933, 1140, 1928, 1639, 1705, 1861, 1292 },
5165 {342, 570, 1081, 638, 1154, 1231, 1339, 1342, 1750, 1494 },
5166 {560, 1203, 345, 767, 1325, 1681, 1425, 1905, 1205, 786 },
5167 {406, 1027, 1011, 410, 1306, 1901, 1389, 1636, 1493, 776 },
5168 {206, 1329, 1337, 1037, 802, 1600, 3646, 1451, 1603, 693 },
5169 {472, 1167, 758, 911, 1424, 703, 2749, 1428, 703, 764 },
5170 {342, 780, 1139, 889, 1290, 1139, 781, 1544, 957, 1042 },
5171 {227, 888, 1039, 929, 988, 3753, 1707, 818, 1710, 1306 },
5172 {767, 1055, 627, 725, 1312, 980, 1065, 1324, 599, 811 },
5173 {304, 1372, 888, 1173, 979, 1578, 1580, 1974, 1318, 482 },
5174 }
5175 };
5176
5177 // VP8 BRC
5178 extern const uint8_t VP8_BRC_IFRAME_COST_TABLE_G9[128][4];
5179 extern const uint32_t VP8_BRC_PFRAME_COST_TABLE_G9[256];
5180 extern const uint32_t VP8_NewMVSkipThreshold_G9[128];
5181
5182 const uint8_t VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_G9[576] =
5183 {
5184 0x01, 0x03, 0x05, 0x07, 0x09, 0x01, 0x02, 0x03, 0x05, 0x07, 0x00, 0x00, 0x01, 0x02, 0x04, 0x00,
5185 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0xfb, 0xfc,
5186 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0xf7, 0xf9, 0xfb, 0xfe, 0xff, 0x00, 0x04, 0x1e,
5187 0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
5188 0x01, 0x02, 0x05, 0x08, 0x0a, 0x01, 0x02, 0x04, 0x06, 0x08, 0x00, 0x01, 0x02, 0x04, 0x06, 0x00,
5189 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfe, 0xff, 0xff, 0x00, 0x00, 0xfd, 0xfe,
5190 0xff, 0xff, 0x00, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x04, 0x1e,
5191 0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x04, 0x05, 0x06, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
5192 0x01, 0x02, 0x05, 0x08, 0x0a, 0x01, 0x02, 0x04, 0x06, 0x08, 0x00, 0x01, 0x02, 0x04, 0x06, 0x00,
5193 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfe, 0xff, 0xff, 0x00, 0x00, 0xfd, 0xfe,
5194 0xff, 0xff, 0x00, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x02, 0x14,
5195 0x28, 0x46, 0x82, 0xa0, 0xc8, 0xff, 0x04, 0x05, 0x06, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
5196 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x06, 0x08, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
5197 0x07, 0x09, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x04, 0x06, 0x07, 0xfe, 0xff, 0x00, 0x00, 0x00,
5198 0x01, 0x02, 0x03, 0x05, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfc, 0xfe, 0xff,
5199 0x00, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfa,
5200 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03,
5201 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5202 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5204 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
5205 0x06, 0x08, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x08, 0xfe, 0xff, 0x00, 0x00, 0x00,
5206 0x02, 0x04, 0x05, 0x06, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff,
5207 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x04, 0x05, 0xfc,
5208 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x05, 0xfb, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01,
5209 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5210 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5211 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5212 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
5213 0x06, 0x08, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x08, 0xfe, 0xff, 0x00, 0x00, 0x00,
5214 0x02, 0x04, 0x05, 0x06, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff,
5215 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x04, 0x05, 0xfc,
5216 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x05, 0xfb, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01,
5217 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5218 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5219 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5220 };
5221
5222 const uint16_t VP8_BRC_QUANT_DC_TABLE [128] =
5223 {
5224 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 17,
5225 18, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 28,
5226 29, 30, 31, 32, 33, 34, 35, 36, 37, 37, 38, 39, 40, 41, 42, 43,
5227 44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
5228 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
5229 75, 76, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
5230 91, 93, 95, 96, 98, 100, 101, 102, 104, 106, 108, 110, 112, 114, 116, 118,
5231 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 143, 145, 148, 151, 154, 157
5232 };
5233
5234 const uint16_t VP8_BRC_QUANT_AC_TABLE [128] =
5235 {
5236 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
5237 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
5238 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
5239 52, 53, 54, 55, 56, 57, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76,
5240 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108,
5241 110, 112, 114, 116, 119, 122, 125, 128, 131, 134, 137, 140, 143, 146, 149, 152,
5242 155, 158, 161, 164, 167, 170, 173, 177, 181, 185, 189, 193, 197, 201, 205, 209,
5243 213, 217, 221, 225, 229, 234, 239, 245, 249, 254, 259, 264, 269, 274, 279, 284
5244 };
5245
5246 const uint16_t VP8_BRC_SKIP_MV_THRESHOLD_TABLE [256] =
5247 {
5248 111, 120, 129, 137, 146, 155, 163, 172, 180, 189, 198, 206, 215, 224, 232, 241,
5249 249, 258, 267, 275, 284, 293, 301, 310, 318, 327, 336, 344, 353, 362, 370, 379,
5250 387, 396, 405, 413, 422, 431, 439, 448, 456, 465, 474, 482, 491, 500, 508, 517,
5251 525, 534, 543, 551, 560, 569, 577, 586, 594, 603, 612, 620, 629, 638, 646, 655,
5252 663, 672, 681, 689, 698, 707, 715, 724, 733, 741, 750, 758, 767, 776, 784, 793,
5253 802, 810, 819, 827, 836, 845, 853, 862, 871, 879, 888, 896, 905, 914, 922, 931,
5254 940, 948, 957, 965, 974, 983, 991, 1000, 1009, 1017, 1026, 1034, 1043, 1052, 1060, 1069,
5255 1078,1086, 1095, 1103, 1112, 1121, 1129, 1138, 1147, 1155, 1164, 1172, 1181, 1190, 1198, 1208
5256 };
5257
5258 extern const uint32_t VP8_MODE_MV_COST_TABLE_G9[128][5] =
5259 {
5260 {0x008f0000, 0x006f0000, 0x00000000, 0x09060400, 0x000e000a},
5261 {0x008f0000, 0x006f0000, 0x00000000, 0x09000400, 0x0f000c00},
5262 {0x008f0000, 0x006f0000, 0x00000000, 0x09000400, 0x0f000c00},
5263 {0x008f0000, 0x006f0000, 0x00000000, 0x09000400, 0x0f000c00},
5264 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5265 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5266 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5267 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5268 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5269 {0x008f0000, 0x006f0000, 0x00000000, 0x1b000d00, 0x2d002400},
5270 {0x008f0000, 0x006f0000, 0x00000000, 0x1b000d00, 0x2d002400},
5271 {0x008f0000, 0x006f0000, 0x00000000, 0x1b000d00, 0x2d002400},
5272 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5273 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5274 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5275 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5276 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5277 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5278 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5279 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5280 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5281 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5282 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5283 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5284 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5285 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5286 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5287 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5288 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5289 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5290 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5291 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5292 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5293 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5294 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5295 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5296 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5297 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5298 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5299 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5300 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5301 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5302 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5303 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5304 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5305 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5306 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5307 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5308 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5309 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5310 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5311 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5312 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5313 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5314 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5315 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5316 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5317 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5318 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5319 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5320 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5321 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5322 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5323 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5324 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5325 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5326 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5327 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5328 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5329 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5330 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5331 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5332 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5333 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5334 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5335 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5336 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5337 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5338 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5339 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5340 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5341 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5342 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5343 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5344 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5345 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5346 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5347 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5348 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5349 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5350 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5351 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5352 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5353 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5354 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5355 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5356 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5357 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5358 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5359 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5360 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5361 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5362 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5363 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5364 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5365 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5366 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5367 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5368 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5369 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5370 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5371 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5372 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5373 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5374 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5375 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5376 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5377 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5378 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5379 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5380 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5381 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5382 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5383 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5384 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5385 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5386 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5387 {0x028f0040, 0x006f1d00, 0x3c000000, 0x00000000, 0x00000000},
5388 };
5389
5390 extern const uint8_t VP8_DEFAULT_COEFF_PROBS_G9[4][8][3][11] =
5391 {
5392 {
5393 {
5394 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5395 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5396 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}
5397 },
5398 {
5399 { 253, 136, 254, 255, 228, 219, 128, 128, 128, 128, 128},
5400 { 189, 129, 242, 255, 227, 213, 255, 219, 128, 128, 128},
5401 { 106, 126, 227, 252, 214, 209, 255, 255, 128, 128, 128}
5402 },
5403 {
5404 { 1, 98, 248, 255, 236, 226, 255, 255, 128, 128, 128},
5405 { 181, 133, 238, 254, 221, 234, 255, 154, 128, 128, 128},
5406 { 78, 134, 202, 247, 198, 180, 255, 219, 128, 128, 128}
5407 },
5408 {
5409 { 1, 185, 249, 255, 243, 255, 128, 128, 128, 128, 128},
5410 { 184, 150, 247, 255, 236, 224, 128, 128, 128, 128, 128},
5411 { 77, 110, 216, 255, 236, 230, 128, 128, 128, 128, 128}
5412 },
5413 {
5414 { 1, 101, 251, 255, 241, 255, 128, 128, 128, 128, 128},
5415 { 170, 139, 241, 252, 236, 209, 255, 255, 128, 128, 128},
5416 { 37, 116, 196, 243, 228, 255, 255, 255, 128, 128, 128}
5417 },
5418 {
5419 { 1, 204, 254, 255, 245, 255, 128, 128, 128, 128, 128},
5420 { 207, 160, 250, 255, 238, 128, 128, 128, 128, 128, 128},
5421 { 102, 103, 231, 255, 211, 171, 128, 128, 128, 128, 128}
5422 },
5423 {
5424 { 1, 152, 252, 255, 240, 255, 128, 128, 128, 128, 128},
5425 { 177, 135, 243, 255, 234, 225, 128, 128, 128, 128, 128},
5426 { 80, 129, 211, 255, 194, 224, 128, 128, 128, 128, 128}
5427 },
5428 {
5429 { 1, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5430 { 246, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5431 { 255, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}
5432 }
5433 },
5434 {
5435 {
5436 { 198, 35, 237, 223, 193, 187, 162, 160, 145, 155, 62},
5437 { 131, 45, 198, 221, 172, 176, 220, 157, 252, 221, 1},
5438 { 68, 47, 146, 208, 149, 167, 221, 162, 255, 223, 128}
5439 },
5440 {
5441 { 1, 149, 241, 255, 221, 224, 255, 255, 128, 128, 128},
5442 { 184, 141, 234, 253, 222, 220, 255, 199, 128, 128, 128},
5443 { 81, 99, 181, 242, 176, 190, 249, 202, 255, 255, 128}
5444 },
5445 {
5446 { 1, 129, 232, 253, 214, 197, 242, 196, 255, 255, 128},
5447 { 99, 121, 210, 250, 201, 198, 255, 202, 128, 128, 128},
5448 { 23, 91, 163, 242, 170, 187, 247, 210, 255, 255, 128}
5449 },
5450 {
5451 { 1, 200, 246, 255, 234, 255, 128, 128, 128, 128, 128},
5452 { 109, 178, 241, 255, 231, 245, 255, 255, 128, 128, 128},
5453 { 44, 130, 201, 253, 205, 192, 255, 255, 128, 128, 128}
5454 },
5455 {
5456 { 1, 132, 239, 251, 219, 209, 255, 165, 128, 128, 128},
5457 { 94, 136, 225, 251, 218, 190, 255, 255, 128, 128, 128},
5458 { 22, 100, 174, 245, 186, 161, 255, 199, 128, 128, 128}
5459 },
5460 {
5461 { 1, 182, 249, 255, 232, 235, 128, 128, 128, 128, 128},
5462 { 124, 143, 241, 255, 227, 234, 128, 128, 128, 128, 128},
5463 { 35, 77, 181, 251, 193, 211, 255, 205, 128, 128, 128}
5464 },
5465 {
5466 { 1, 157, 247, 255, 236, 231, 255, 255, 128, 128, 128},
5467 { 121, 141, 235, 255, 225, 227, 255, 255, 128, 128, 128},
5468 { 45, 99, 188, 251, 195, 217, 255, 224, 128, 128, 128}
5469 },
5470 {
5471 { 1, 1, 251, 255, 213, 255, 128, 128, 128, 128, 128},
5472 { 203, 1, 248, 255, 255, 128, 128, 128, 128, 128, 128},
5473 { 137, 1, 177, 255, 224, 255, 128, 128, 128, 128, 128}
5474 }
5475 },
5476 {
5477 {
5478 { 253, 9, 248, 251, 207, 208, 255, 192, 128, 128, 128},
5479 { 175, 13, 224, 243, 193, 185, 249, 198, 255, 255, 128},
5480 { 73, 17, 171, 221, 161, 179, 236, 167, 255, 234, 128}
5481 },
5482 {
5483 { 1, 95, 247, 253, 212, 183, 255, 255, 128, 128, 128},
5484 { 239, 90, 244, 250, 211, 209, 255, 255, 128, 128, 128},
5485 { 155, 77, 195, 248, 188, 195, 255, 255, 128, 128, 128}
5486 },
5487 {
5488 { 1, 24, 239, 251, 218, 219, 255, 205, 128, 128, 128},
5489 { 201, 51, 219, 255, 196, 186, 128, 128, 128, 128, 128},
5490 { 69, 46, 190, 239, 201, 218, 255, 228, 128, 128, 128}
5491 },
5492 {
5493 { 1, 191, 251, 255, 255, 128, 128, 128, 128, 128, 128},
5494 { 223, 165, 249, 255, 213, 255, 128, 128, 128, 128, 128},
5495 { 141, 124, 248, 255, 255, 128, 128, 128, 128, 128, 128}
5496 },
5497 {
5498 { 1, 16, 248, 255, 255, 128, 128, 128, 128, 128, 128},
5499 { 190, 36, 230, 255, 236, 255, 128, 128, 128, 128, 128},
5500 { 149, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5501 },
5502 {
5503 { 1, 226, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5504 { 247, 192, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5505 { 240, 128, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5506 },
5507 {
5508 { 1, 134, 252, 255, 255, 128, 128, 128, 128, 128, 128},
5509 { 213, 62, 250, 255, 255, 128, 128, 128, 128, 128, 128},
5510 { 55, 93, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5511 },
5512 {
5513 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5514 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5515 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}
5516 }
5517 },
5518 {
5519 {
5520 { 202, 24, 213, 235, 186, 191, 220, 160, 240, 175, 255},
5521 { 126, 38, 182, 232, 169, 184, 228, 174, 255, 187, 128},
5522 { 61, 46, 138, 219, 151, 178, 240, 170, 255, 216, 128}
5523 },
5524 {
5525 { 1, 112, 230, 250, 199, 191, 247, 159, 255, 255, 128},
5526 { 166, 109, 228, 252, 211, 215, 255, 174, 128, 128, 128},
5527 { 39, 77, 162, 232, 172, 180, 245, 178, 255, 255, 128}
5528 },
5529 {
5530 { 1, 52, 220, 246, 198, 199, 249, 220, 255, 255, 128},
5531 { 124, 74, 191, 243, 183, 193, 250, 221, 255, 255, 128},
5532 { 24, 71, 130, 219, 154, 170, 243, 182, 255, 255, 128}
5533 },
5534 {
5535 { 1, 182, 225, 249, 219, 240, 255, 224, 128, 128, 128},
5536 { 149, 150, 226, 252, 216, 205, 255, 171, 128, 128, 128},
5537 { 28, 108, 170, 242, 183, 194, 254, 223, 255, 255, 128}
5538 },
5539 {
5540 { 1, 81, 230, 252, 204, 203, 255, 192, 128, 128, 128},
5541 { 123, 102, 209, 247, 188, 196, 255, 233, 128, 128, 128},
5542 { 20, 95, 153, 243, 164, 173, 255, 203, 128, 128, 128}
5543 },
5544 {
5545 { 1, 222, 248, 255, 216, 213, 128, 128, 128, 128, 128},
5546 { 168, 175, 246, 252, 235, 205, 255, 255, 128, 128, 128},
5547 { 47, 116, 215, 255, 211, 212, 255, 255, 128, 128, 128}
5548 },
5549 {
5550 { 1, 121, 236, 253, 212, 214, 255, 255, 128, 128, 128},
5551 { 141, 84, 213, 252, 201, 202, 255, 219, 128, 128, 128},
5552 { 42, 80, 160, 240, 162, 185, 255, 205, 128, 128, 128}
5553 },
5554 {
5555 { 1, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5556 { 244, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5557 { 238, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5558 }
5559 }
5560 };
5561
5562 const uint16_t VP8_C0_TABLE[256] =
5563 {
5564 2047, 2047, 1791, 1641, 1535, 1452, 1385, 1328, 1279, 1235, 1196, 1161, 1129, 1099, 1072, 1046,
5565 1023, 1000, 979, 959, 940, 922, 905, 889, 873, 858, 843, 829, 816, 803, 790, 778,
5566 767, 755, 744, 733, 723, 713, 703, 693, 684, 675, 666, 657, 649, 641, 633, 625,
5567 617, 609, 602, 594, 587, 580, 573, 567, 560, 553, 547, 541, 534, 528, 522, 516,
5568 511, 505, 499, 494, 488, 483, 477, 472, 467, 462, 457, 452, 447, 442, 437, 433,
5569 428, 424, 419, 415, 410, 406, 401, 397, 393, 389, 385, 381, 377, 373, 369, 365,
5570 361, 357, 353, 349, 346, 342, 338, 335, 331, 328, 324, 321, 317, 314, 311, 307,
5571 304, 301, 297, 294, 291, 288, 285, 281, 278, 275, 272, 269, 266, 263, 260, 257,
5572 255, 252, 249, 246, 243, 240, 238, 235, 232, 229, 227, 224, 221, 219, 216, 214,
5573 211, 208, 206, 203, 201, 198, 196, 194, 191, 189, 186, 184, 181, 179, 177, 174,
5574 172, 170, 168, 165, 163, 161, 159, 156, 154, 152, 150, 148, 145, 143, 141, 139,
5575 137, 135, 133, 131, 129, 127, 125, 123, 121, 119, 117, 115, 113, 111, 109, 107,
5576 105, 103, 101, 99, 97, 95, 93, 92, 90, 88, 86, 84, 82, 81, 79, 77,
5577 75, 73, 72, 70, 68, 66, 65, 63, 61, 60, 58, 56, 55, 53, 51, 50,
5578 48, 46, 45, 43, 41, 40, 38, 37, 35, 33, 32, 30, 29, 27, 25, 24,
5579 22, 21, 19, 18, 16, 15, 13, 12, 10, 9, 7, 6, 4, 3, 1, 1
5580 };
5581
5582 extern const uint8_t VP8_PROBABILITY_UPDATE_FLAGS_G9 [VP8_NUM_COEFF_PLANES][VP8_NUM_COEFF_BANDS][VP8_NUM_LOCAL_COMPLEXITIES][VP8_NUM_COEFF_NODES]= {
5583
5584 {
5585 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}},
5586 {{1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,1,0,0,0,0,0,0,0}, {1,1,1,1,1,0,0,0,0,0,0}},
5587 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5588 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5589 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5590 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5591 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5592 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5593 },
5594
5595 {
5596 {{1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5597 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,1,0,0,0,0,0,0,0}},
5598 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5599 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5600 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5601 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5602 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5603 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5604 },
5605
5606 {
5607 {{1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5608 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5609 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5610 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5611 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5612 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5613 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5614 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5615 },
5616
5617 {
5618 {{1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5619 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,1,0,0,0,0,0,0,0}},
5620 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5621 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5622 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5623 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5624 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5625 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5626 }
5627 };
5628
5629 extern const uint8_t VP8_COEFF_UPDATE_PROBS_G9[4][8][3][11] =
5630 {
5631 {
5632 {
5633 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5634 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5635 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5636 },
5637 {
5638 { 176, 246, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5639 { 223, 241, 252, 255, 255, 255, 255, 255, 255, 255, 255},
5640 { 249, 253, 253, 255, 255, 255, 255, 255, 255, 255, 255}
5641 },
5642 {
5643 { 255, 244, 252, 255, 255, 255, 255, 255, 255, 255, 255},
5644 { 234, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5645 { 253, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5646 },
5647 {
5648 { 255, 246, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5649 { 239, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5650 { 254, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5651 },
5652 {
5653 { 255, 248, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5654 { 251, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5655 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5656 },
5657 {
5658 { 255, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5659 { 251, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5660 { 254, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5661 },
5662 {
5663 { 255, 254, 253, 255, 254, 255, 255, 255, 255, 255, 255},
5664 { 250, 255, 254, 255, 254, 255, 255, 255, 255, 255, 255},
5665 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5666 },
5667 {
5668 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5669 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5670 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5671 }
5672 },
5673 {
5674 {
5675 { 217, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5676 { 225, 252, 241, 253, 255, 255, 254, 255, 255, 255, 255},
5677 { 234, 250, 241, 250, 253, 255, 253, 254, 255, 255, 255}
5678 },
5679 {
5680 { 255, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5681 { 223, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5682 { 238, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255}
5683 },
5684 {
5685 { 255, 248, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5686 { 249, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5687 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5688 },
5689 {
5690 { 255, 253, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5691 { 247, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5692 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5693 },
5694 {
5695 { 255, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5696 { 252, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5697 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5698 },
5699 {
5700 { 255, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5701 { 253, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5702 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5703 },
5704 {
5705 { 255, 254, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5706 { 250, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5707 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5708 },
5709 {
5710 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5711 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5712 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5713 }
5714 },
5715 {
5716 {
5717 { 186, 251, 250, 255, 255, 255, 255, 255, 255, 255, 255},
5718 { 234, 251, 244, 254, 255, 255, 255, 255, 255, 255, 255},
5719 { 251, 251, 243, 253, 254, 255, 254, 255, 255, 255, 255}
5720 },
5721 {
5722 { 255, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5723 { 236, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5724 { 251, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255}
5725 },
5726 {
5727 { 255, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5728 { 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5729 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5730 },
5731 {
5732 { 255, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5733 { 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5734 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5735 },
5736 {
5737 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5738 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5739 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5740 },
5741 {
5742 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5743 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5744 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5745 },
5746 {
5747 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5748 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5749 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5750 },
5751 {
5752 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5753 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5754 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5755 }
5756 },
5757 {
5758 {
5759 { 248, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5760 { 250, 254, 252, 254, 255, 255, 255, 255, 255, 255, 255},
5761 { 248, 254, 249, 253, 255, 255, 255, 255, 255, 255, 255}
5762 },
5763 {
5764 { 255, 253, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5765 { 246, 253, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5766 { 252, 254, 251, 254, 254, 255, 255, 255, 255, 255, 255}
5767 },
5768 {
5769 { 255, 254, 252, 255, 255, 255, 255, 255, 255, 255, 255},
5770 { 248, 254, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5771 { 253, 255, 254, 254, 255, 255, 255, 255, 255, 255, 255}
5772 },
5773 {
5774 { 255, 251, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5775 { 245, 251, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5776 { 253, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5777 },
5778 {
5779 { 255, 251, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5780 { 252, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5781 { 255, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5782 },
5783 {
5784 { 255, 252, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5785 { 249, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5786 { 255, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5787 },
5788 {
5789 { 255, 255, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5790 { 250, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5791 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5792 },
5793 {
5794 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5795 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5796 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5797 }
5798 }
5799 };
5800
5801 static const int32_t iMbEncCurbeSize_G9[CODECHAL_ENCODE_VP8_MBENC_IDX_NUM] = {
5802 sizeof(struct MediaObjectVp8MbencIStaticDataG9),
5803 sizeof(struct MediaObjectVp8MbencIStaticDataG9),
5804 sizeof(struct MediaObjectVp8MbencPStaticDataG9)
5805 };
5806
5807 static const int32_t iBrcBtCount_G9[CODECHAL_ENCODE_VP8_BRC_IDX_NUM] = {
5808 CODECHAL_VP8_MBENC_NUM_SURFACES_G9,
5809 CODECHAL_VP8_BRC_INIT_RESET_NUM_SURFACES_G9,
5810 CODECHAL_VP8_BRC_INIT_RESET_NUM_SURFACES_G9,
5811 CODECHAL_VP8_BRC_UPDATE_NUM_SURFACES_G9
5812 };
5813
5814 static const int32_t iBrcCurbeSize_G9[CODECHAL_ENCODE_VP8_BRC_IDX_NUM] = {
5815 sizeof(struct MediaObjectVp8MbencIStaticDataG9),
5816 sizeof(struct MediaObjectVp8BrcInitResetStaticDataG9),
5817 sizeof(struct MediaObjectVp8BrcInitResetStaticDataG9),
5818 sizeof(struct MediaObjectVp8BrcUpdateStaticDataG9)
5819 };
5820
CodechalEncodeVp8G9(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)5821 CodechalEncodeVp8G9::CodechalEncodeVp8G9(
5822 CodechalHwInterface* hwInterface,
5823 CodechalDebugInterface* debugInterface,
5824 PCODECHAL_STANDARD_INFO standardInfo)
5825 :CodechalEncodeVp8(hwInterface, debugInterface, standardInfo)
5826 {
5827 CODECHAL_ENCODE_FUNCTION_ENTER;
5828
5829 pfnGetKernelHeaderAndSize = GetKernelHeaderAndSize;
5830
5831 m_kuid = IDR_CODEC_AllVP8Enc;
5832 #ifndef _FULL_OPEN_SOURCE
5833 m_kernelBase = (uint8_t*)IGCODECKRN_G9;
5834 #else
5835 m_kernelBase = nullptr;
5836 #endif
5837
5838 CodecHalGetKernelBinaryAndSize(
5839 m_kernelBase,
5840 m_kuid,
5841 &m_kernelBinary,
5842 &m_combinedKernelSize);
5843
5844 m_hwInterface->GetStateHeapSettings()->dwNumSyncTags = CODECHAL_NUM_VP8_ENC_SYNC_TAGS;
5845 m_hwInterface->GetStateHeapSettings()->dwIshSize +=
5846 MOS_ALIGN_CEIL(m_combinedKernelSize, (1 << MHW_KERNEL_OFFSET_SHIFT));
5847 m_hwInterface->GetStateHeapSettings()->dwDshSize = CODECHAL_INIT_DSH_SIZE_VP8_ENC;
5848
5849 m_brcDistortionBufferSupported = true;
5850 m_brcConstantBufferSupported = true;
5851 m_brcConstantSurfaceWidth = CODECHAL_ENCODE_VP8_BRC_CONSTANTSURFACE_WIDTH;
5852 m_brcConstantSurfaceHeight = CODECHAL_ENCODE_VP8_BRC_CONSTANTSURFACE_HEIGHT;
5853 }
5854
Initialize(CodechalSetting * codecHalSettings)5855 MOS_STATUS CodechalEncodeVp8G9::Initialize(CodechalSetting * codecHalSettings)
5856 {
5857 MOS_STATUS status = MOS_STATUS_SUCCESS;
5858
5859 CODECHAL_ENCODE_FUNCTION_ENTER;
5860
5861 // common initilization
5862 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeVp8::Initialize(codecHalSettings));
5863
5864 return status;
5865 }
5866
InitKernelState()5867 MOS_STATUS CodechalEncodeVp8G9::InitKernelState()
5868 {
5869 MOS_STATUS status = MOS_STATUS_SUCCESS;
5870
5871 CODECHAL_ENCODE_FUNCTION_ENTER;
5872
5873 // Init kernel state
5874 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateMe());
5875 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateMbEnc());
5876 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateBrc());
5877
5878 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateTpu());
5879 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateMpu());
5880
5881 return status;
5882 }
5883
GetKernelHeaderAndSize(void * binary,EncOperation operation,uint32_t krnStateIdx,void * krnHeader,uint32_t * krnSize)5884 MOS_STATUS CodechalEncodeVp8G9::GetKernelHeaderAndSize(
5885 void *binary,
5886 EncOperation operation,
5887 uint32_t krnStateIdx,
5888 void *krnHeader,
5889 uint32_t *krnSize)
5890 {
5891 struct CodechalVp8KernelHeaderG9 * kernelHeaderTable;
5892 PCODECHAL_KERNEL_HEADER currKrnHeader, invalidEntry, nextKrnHeader;
5893 uint32_t nextKrnOffset;
5894 MOS_STATUS status = MOS_STATUS_SUCCESS;
5895
5896 CODECHAL_ENCODE_CHK_NULL_RETURN(binary);
5897 CODECHAL_ENCODE_CHK_NULL_RETURN(krnHeader);
5898 CODECHAL_ENCODE_CHK_NULL_RETURN(krnSize);
5899
5900 kernelHeaderTable = (struct CodechalVp8KernelHeaderG9*)binary;
5901 invalidEntry = &(kernelHeaderTable->VP8_BRC_FrameEncUpdate) + 1;
5902 nextKrnOffset = *krnSize;
5903
5904 if (operation == ENC_SCALING4X)
5905 {
5906 currKrnHeader = &kernelHeaderTable->PLY_DScale_PLY;
5907 }
5908 else if (operation == ENC_ME)
5909 {
5910 currKrnHeader = &kernelHeaderTable->VP8_ME_P;
5911 }
5912 else if (operation == ENC_BRC)
5913 {
5914 currKrnHeader = &kernelHeaderTable->VP8MBEnc_I_Dist;
5915 }
5916 else if (operation == ENC_MBENC_I_LUMA)
5917 {
5918 currKrnHeader = &kernelHeaderTable->VP8MBEnc_I_Luma;
5919 }
5920 else if (operation == ENC_MBENC)
5921 {
5922 currKrnHeader = &kernelHeaderTable->VP8MBEnc_Norm_Frm_I;
5923 }
5924 else if (operation == ENC_MPU)
5925 {
5926 currKrnHeader = &kernelHeaderTable->VP8_MPU;
5927 }
5928 else if (operation == ENC_TPU)
5929 {
5930 currKrnHeader = &kernelHeaderTable->VP8_TPU;
5931 }
5932 else
5933 {
5934 CODECHAL_ENCODE_ASSERTMESSAGE("Unsupported ENC mode requested");
5935 return MOS_STATUS_INVALID_PARAMETER;
5936 }
5937
5938 currKrnHeader += krnStateIdx;
5939 *((PCODECHAL_KERNEL_HEADER)krnHeader) = *currKrnHeader;
5940
5941 nextKrnHeader = (currKrnHeader + 1);
5942 if (nextKrnHeader < invalidEntry)
5943 {
5944 nextKrnOffset = nextKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT;
5945 }
5946 *krnSize = nextKrnOffset - (currKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
5947
5948 return status;
5949 }
5950
InitKernelStateHelper(struct CodechalEncodeVp8InitKernelStateParams * params)5951 MOS_STATUS CodechalEncodeVp8G9::InitKernelStateHelper(
5952 struct CodechalEncodeVp8InitKernelStateParams * params)
5953 {
5954 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
5955 PMHW_KERNEL_STATE kernelStatePtr;
5956 CODECHAL_KERNEL_HEADER currKrnHeader;
5957 uint32_t kernelSize;
5958 MOS_STATUS status = MOS_STATUS_SUCCESS;
5959
5960 CODECHAL_ENCODE_FUNCTION_ENTER;
5961
5962 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
5963 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
5964 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pRenderEngineInterface);
5965 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pRenderEngineInterface->GetHwCaps());
5966 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pRenderEngineInterface->m_stateHeapInterface);
5967 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pui8Binary);
5968
5969 stateHeapInterface = params->pRenderEngineInterface->m_stateHeapInterface;
5970 kernelStatePtr = params->pKernelState;
5971 kernelSize = params->dwCombinedKernelSize;
5972
5973 CODECHAL_ENCODE_CHK_STATUS_RETURN(pfnGetKernelHeaderAndSize(
5974 params->pui8Binary,
5975 params->Operation,
5976 params->dwKrnStateIdx,
5977 &currKrnHeader,
5978 &kernelSize));
5979
5980 kernelStatePtr->KernelParams.iBTCount = params->iBtCount;
5981 kernelStatePtr->KernelParams.iThreadCount = params->pRenderEngineInterface->GetHwCaps()->dwMaxThreads;
5982 kernelStatePtr->KernelParams.iCurbeLength = params->iCurbeCount;
5983 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
5984 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
5985 kernelStatePtr->KernelParams.iIdCount = 1;
5986
5987 kernelStatePtr->dwCurbeOffset = stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
5988 kernelStatePtr->KernelParams.pBinary =
5989 params->pui8Binary +
5990 (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
5991 kernelStatePtr->KernelParams.iSize = kernelSize;
5992
5993 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
5994 stateHeapInterface,
5995 kernelStatePtr->KernelParams.iBTCount,
5996 &kernelStatePtr->dwSshSize,
5997 &kernelStatePtr->dwBindingTableSize));
5998
5999 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(stateHeapInterface, kernelStatePtr));
6000
6001 return status;
6002 }
6003
InitKernelStateMbEnc()6004 MOS_STATUS CodechalEncodeVp8G9::InitKernelStateMbEnc()
6005 {
6006 MhwRenderInterface *renderEngineInterface;
6007 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
6008 PMHW_KERNEL_STATE kernelStatePtr;
6009 uint32_t combinedKernelSize;
6010 uint32_t krnStateIdx;
6011 struct CodechalBindingTableVp8Mbenc* bindingTable;
6012 uint8_t *binary;
6013 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6014 MOS_STATUS status = MOS_STATUS_SUCCESS;
6015
6016 CODECHAL_ENCODE_FUNCTION_ENTER;
6017
6018 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6019
6020 renderEngineInterface = m_hwInterface->GetRenderInterface();
6021 stateHeapInterface = renderEngineInterface->m_stateHeapInterface;
6022 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
6023
6024 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6025 m_kernelBase,
6026 m_kuid,
6027 &binary,
6028 (uint32_t*)&combinedKernelSize));
6029
6030 for (krnStateIdx = 0; krnStateIdx < CODECHAL_ENCODE_VP8_MBENC_IDX_NUM; krnStateIdx++)
6031 {
6032 kernelStatePtr = &m_mbEncKernelStates[krnStateIdx];
6033
6034 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6035 initKernelStateParams.pKernelState = kernelStatePtr;
6036 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6037 initKernelStateParams.pui8Binary = binary;
6038 if (krnStateIdx == CODECHAL_ENCODE_VP8_MBENC_IDX_P)
6039 {
6040 initKernelStateParams.Operation = ENC_MBENC;
6041 initKernelStateParams.dwKrnStateIdx = 1; // VP8MBEnc_Norm_Frm_P
6042 }
6043 else
6044 {
6045 initKernelStateParams.dwKrnStateIdx = 0;
6046 if (krnStateIdx == CODECHAL_ENCODE_VP8_MBENC_IDX_I_CHROMA)
6047 {
6048 initKernelStateParams.Operation = ENC_MBENC; // VP8MBEnc_Norm_Frm_I
6049 }
6050 else // CODECHAL_ENCODE_VP8_MBENC_IDX_I_LUMA
6051 {
6052 initKernelStateParams.Operation = ENC_MBENC_I_LUMA; // VP8MBEnc_I_Luma
6053 }
6054 }
6055 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6056 initKernelStateParams.iBtCount = CODECHAL_VP8_MBENC_NUM_SURFACES_G9;
6057 initKernelStateParams.iCurbeCount = iMbEncCurbeSize_G9[krnStateIdx];
6058 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6059 &initKernelStateParams));
6060
6061 if (krnStateIdx != CODECHAL_ENCODE_VP8_MBENC_IDX_P)
6062 {
6063 // I luma and chroma kernels share a single CURBE, so the DSH contains 2 IDs and 1 CURBE
6064 kernelStatePtr->dwCurbeOffset =
6065 stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData() * 2;
6066
6067 if (krnStateIdx == CODECHAL_ENCODE_VP8_MBENC_IDX_I_CHROMA)
6068 {
6069 // The luma kernel ID will occur before the chroma kernel ID
6070 kernelStatePtr->dwIdOffset =
6071 stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
6072 }
6073 }
6074 }
6075
6076 m_mbEncIFrameDshSize =
6077 (stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData() * 2) +
6078 MOS_ALIGN_CEIL(m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_I_LUMA].KernelParams.iCurbeLength,
6079 stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
6080
6081 // Until a better way can be found, maintain old binding table structures
6082 bindingTable = &m_mbEncBindingTable;
6083
6084 bindingTable->dwVp8MBEncMBOut = CODECHAL_VP8_MBENC_PER_MB_OUT_G9;
6085 bindingTable->dwVp8MBEncCurrY = CODECHAL_VP8_MBENC_CURR_Y_G9;
6086 bindingTable->dwVp8MBEncCurrUV = CODECHAL_VP8_MBENC_CURR_UV_G9;
6087 bindingTable->dwVp8MBEncMVDataFromME = CODECHAL_VP8_MBENC_MV_DATA_FROM_ME_G9;
6088 bindingTable->dwVp8MBEncIndMVData = CODECHAL_VP8_MBENC_IND_MV_DATA_G9;
6089 bindingTable->dwVp8MBEncRef1Pic = CODECHAL_VP8_MBENC_REF1_PIC_G9;
6090 bindingTable->dwVp8MBEncRef2Pic = CODECHAL_VP8_MBENC_REF2_PIC_G9;
6091 bindingTable->dwVp8MBEncRef3Pic = CODECHAL_VP8_MBENC_REF3_PIC_G9;
6092 bindingTable->dwVp8MBEncRefMBCount = CODECHAL_VP8_MBENC_REF_MB_COUNT_G9;
6093 bindingTable->dwVp8MBEncMBModeCostLuma = CODECHAL_VP8_MBENC_MB_MODE_COST_LUMA_G9;
6094 bindingTable->dwVp8MBEncBlockModeCost = CODECHAL_VP8_MBENC_BLOCK_MODE_COST_G9;
6095 bindingTable->dwVp8MBEncChromaRecon = CODECHAL_VP8_MBENC_CHROMA_RECON_G9;
6096 bindingTable->dwVp8MBEncHistogram = CODECHAL_VP8_MBENC_HISTOGRAM_G9;
6097 bindingTable->dwVp8MBEncSegmentationMap = CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G9;
6098 bindingTable->dwVp8MBEncBRCDist = CODECHAL_VP8_MBENC_IDIST_G9;
6099 bindingTable->dwVp8MbEncCurrYDownscaled = CODECHAL_VP8_MBENC_CURR_Y_DOWNSCALED_G9;
6100 bindingTable->dwVp8MBEncVMECoarseIntra = CODECHAL_VP8_MBENC_VME_Coarse_Intra_G9;
6101 bindingTable->dwVp8InterPredDistortion = CODECHAL_VP8_MBEBC_INTER_PRED_DISTORTION_G9;
6102 bindingTable->dwVp8PerMVDataSurface = CODECHAL_VP8_MBEBC_PER_MV_DATA_G9;
6103 bindingTable->dwVp8MBEncPerMBQuantDataP = CODECHAL_VP8_MBENC_P_PER_MB_QUANT_G9;
6104 bindingTable->dwVp8MBEncVMEInterPred = CODECHAL_VP8_MBENC_INTER_PRED_G9;
6105 bindingTable->dwVp8MBEncVMEDebugStreamoutI = CODECHAL_VP8_MBENC_I_VME_DEBUG_STREAMOUT_G9;
6106 bindingTable->dwVp8MBModeCostUpdateSurface = CODECHAL_VP8_MBENC_MODE_COST_UPDATE_G9;
6107 bindingTable->dwVp8MBEncVMEDebugStreamoutP = CODECHAL_VP8_MBENC_P_VME_DEBUG_STREAMOUT_G9;
6108 bindingTable->dwVp8MBEncVME = CODECHAL_VP8_MBENC_VME_G9;
6109
6110 return status;
6111 }
6112
InitKernelStateBrc()6113 MOS_STATUS CodechalEncodeVp8G9::InitKernelStateBrc()
6114 {
6115 MhwRenderInterface *renderEngineInterface;
6116 PMHW_KERNEL_STATE kernelStatePtr;
6117 uint32_t combinedKernelSize;
6118 uint32_t krnStateIdx;
6119 struct CodechalBindingTableVp8BrcUpdate* bindingTable;
6120 uint8_t *binary;
6121 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6122 MOS_STATUS status = MOS_STATUS_SUCCESS;
6123
6124 CODECHAL_ENCODE_FUNCTION_ENTER;
6125
6126 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6127
6128 renderEngineInterface = m_hwInterface->GetRenderInterface();
6129
6130 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6131 m_kernelBase,
6132 m_kuid,
6133 &binary,
6134 (uint32_t*)&combinedKernelSize));
6135
6136 for (krnStateIdx = 0; krnStateIdx < CODECHAL_ENCODE_VP8_BRC_IDX_NUM; krnStateIdx++)
6137 {
6138 kernelStatePtr = &m_brcKernelStates[krnStateIdx];
6139
6140 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6141 initKernelStateParams.pKernelState = kernelStatePtr;
6142 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6143 initKernelStateParams.pui8Binary = binary;
6144 initKernelStateParams.Operation = ENC_BRC;
6145 initKernelStateParams.dwKrnStateIdx = krnStateIdx;
6146 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6147 initKernelStateParams.iBtCount = iBrcBtCount_G9[krnStateIdx];
6148 initKernelStateParams.iCurbeCount = iBrcCurbeSize_G9[krnStateIdx];
6149 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6150 &initKernelStateParams));
6151 }
6152
6153 // Until a better way can be found, maintain old binding table structures
6154 bindingTable = &m_brcUpdateBindingTable;
6155 bindingTable->dwBrcHistoryBuffer = CODECHAL_VP8_BRC_UPDATE_HISTORY_G9;
6156 bindingTable->dwBrcPakStatisticsOutputBuffer = CODECHAL_VP8_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G9;
6157 bindingTable->dwBrcEncoderCfgReadBuffer = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_READ_G9;
6158 bindingTable->dwBrcEncoderCfgWriteBuffer = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_WRITE_G9;
6159 bindingTable->dwBrcMbEncCurbeReadBuffer = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_READ_G9;
6160 bindingTable->dwBrcMbEncCurbeWriteData = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_WRITE_G9;
6161 bindingTable->dwBrcDistortionBuffer = CODECHAL_VP8_BRC_UPDATE_DISTORTION_SURFACE_G9;
6162 bindingTable->dwBrcConstantData = CODECHAL_VP8_BRC_UPDATE_CONSTANT_DATA_G9;
6163 bindingTable->dwVp8BrcSegmentationMap = CODECHAL_VP8_BRC_UPDATE_SEGMENT_MAP_G9;
6164 bindingTable->dwBrcMpuCurbeReadBuffer = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_READ_G9;
6165 bindingTable->dwBrcMpuCurbeWriteData = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_WRITE_G9;
6166 bindingTable->dwBrcTpuCurbeReadBuffer = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_READ_G9;
6167 bindingTable->dwBrcTpuCurbeWriteData = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_WRITE_G9;
6168
6169 return status;
6170 }
6171
InitKernelStateMe()6172 MOS_STATUS CodechalEncodeVp8G9::InitKernelStateMe()
6173 {
6174 MhwRenderInterface *renderEngineInterface;
6175 uint32_t combinedKernelSize;
6176 struct CodechalBindingTableVp8Me* bindingTable;
6177 uint8_t *binary;
6178 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6179 MOS_STATUS status = MOS_STATUS_SUCCESS;
6180
6181 CODECHAL_ENCODE_FUNCTION_ENTER;
6182
6183 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6184
6185 renderEngineInterface = m_hwInterface->GetRenderInterface();
6186
6187 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6188 m_kernelBase,
6189 m_kuid,
6190 &binary,
6191 (uint32_t*)&combinedKernelSize));
6192
6193 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6194 initKernelStateParams.pKernelState = &m_meKernelState;
6195 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6196 initKernelStateParams.pui8Binary = binary;
6197 initKernelStateParams.Operation = ENC_ME;
6198 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6199 initKernelStateParams.iBtCount = CODECHAL_VP8_ME_NUM_SURFACES_G9;
6200 initKernelStateParams.iCurbeCount = sizeof(struct MediaObjectVp8MeStaticDataG9);
6201 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6202 &initKernelStateParams));
6203
6204 // Until a better way can be found, maintain old binding table structures
6205 bindingTable = &m_meBindingTable;
6206
6207 bindingTable->dwVp8MEMVDataSurface = CODECHAL_VP8_ME_MV_DATA_G9;
6208 bindingTable->dwVp816xMEMVDataSurface = CODECHAL_VP8_16xME_MV_DATA_G9;
6209 bindingTable->dwVp8MeDist = CODECHAL_VP8_ME_DISTORTION_G9;
6210 bindingTable->dwVp8MeBrcDist = CODECHAL_VP8_ME_MIN_DIST_BRC_DATA_G9;
6211 bindingTable->dwVp8MeCurrPic = CODECHAL_VP8_VME_INTER_PRED_G9;
6212 bindingTable->dwVp8MeRef1Pic = CODECHAL_VP8_ME_REF1_PIC_G9;
6213 bindingTable->dwVp8MeRef2Pic = CODECHAL_VP8_ME_REF2_PIC_G9;
6214 bindingTable->dwVp8MeRef3Pic = CODECHAL_VP8_ME_REF3_PIC_G9;
6215
6216 return status;
6217 }
6218
InitKernelStateMpu()6219 MOS_STATUS CodechalEncodeVp8G9::InitKernelStateMpu()
6220 {
6221 MhwRenderInterface *renderEngineInterface;
6222 uint32_t combinedKernelSize;
6223 struct CodechalBindingTableVp8Mpu* bindingTable;
6224 uint8_t *binary;
6225 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6226 MOS_STATUS status = MOS_STATUS_SUCCESS;
6227
6228 CODECHAL_ENCODE_FUNCTION_ENTER;
6229
6230 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6231
6232 renderEngineInterface = m_hwInterface->GetRenderInterface();
6233
6234 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6235 m_kernelBase,
6236 m_kuid,
6237 &binary,
6238 (uint32_t*)&combinedKernelSize));
6239
6240 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6241 initKernelStateParams.pKernelState = &m_mpuKernelState;
6242 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6243 initKernelStateParams.pui8Binary = binary;
6244 initKernelStateParams.Operation = ENC_MPU;
6245 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6246 initKernelStateParams.iBtCount = CODECHAL_VP8_MPU_FHB_NUM_SURFACES_G9;
6247 initKernelStateParams.iCurbeCount = sizeof(struct MediaObjectVp8MpuFhbStaticDataG9);
6248 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6249 &initKernelStateParams));
6250
6251 // Until a better way can be found, maintain old binding table structures
6252 bindingTable = &m_mpuBindingTable;
6253
6254 bindingTable->dwVp8MpuHistogram = CODECHAL_VP8_MPU_FHB_HISTOGRAM_G9;
6255 bindingTable->dwVp8MpuReferenceModeProbability = CODECHAL_VP8_MPU_FHB_REF_MODE_PROBABILITY_G9;
6256 bindingTable->dwVp8MpuModeProbability = CODECHAL_VP8_MPU_FHB_CURR_MODE_PROBABILITY_G9;
6257 bindingTable->dwVp8MpuReferenceTokenProbability = CODECHAL_VP8_MPU_FHB_REF_TOKEN_PROBABILITY_G9;
6258 bindingTable->dwVp8MpuTokenProbability = CODECHAL_VP8_MPU_FHB_CURR_TOKEN_PROBABILITY_G9;
6259 bindingTable->dwVp8MpuFrameHeaderBitstream = CODECHAL_VP8_MPU_FHB_HEADER_BITSTREAM_G9;
6260 bindingTable->dwVp8MpuHeaderMetaData = CODECHAL_VP8_MPU_FHB_HEADER_METADATA_G9;
6261 bindingTable->dwVp8MpuPictureState = CODECHAL_VP8_MPU_FHB_PICTURE_STATE_G9;
6262 bindingTable->dwVp8MpuMpuBitstream = CODECHAL_VP8_MPU_FHB_MPU_BITSTREAM_G9;
6263 bindingTable->dwVp8MpuTokenBitsData = CODECHAL_VP8_MPU_FHB_TOKEN_BITS_DATA_TABLE_G9;
6264 bindingTable->dwVp8MpuKernelDebugDump = CODECHAL_VP8_MPU_FHB_VME_DEBUG_STREAMOUT_G9;
6265 bindingTable->dwVp8MpuEntropyCost = CODECHAL_VP8_MPU_FHB_ENTROPY_COST_TABLE_G9;
6266 bindingTable->dwVp8MpuModeCostUpdateSurface = CODECHAL_VP8_MPU_MODE_COST_UPDATE_G9;
6267
6268 return status;
6269 }
6270
InitKernelStateTpu()6271 MOS_STATUS CodechalEncodeVp8G9::InitKernelStateTpu()
6272 {
6273 MhwRenderInterface *renderEngineInterface;
6274 uint32_t combinedKernelSize;
6275 struct CodechalBindingTableVp8Tpu* bindingTable;
6276 uint8_t *binary;
6277 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6278 MOS_STATUS status = MOS_STATUS_SUCCESS;
6279
6280 CODECHAL_ENCODE_FUNCTION_ENTER;
6281
6282 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6283
6284 renderEngineInterface = m_hwInterface->GetRenderInterface();
6285
6286 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6287 m_kernelBase,
6288 m_kuid,
6289 &binary,
6290 (uint32_t*)&combinedKernelSize));
6291
6292 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6293 initKernelStateParams.pKernelState = &m_tpuKernelState;
6294 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6295 initKernelStateParams.pui8Binary = binary;
6296 initKernelStateParams.Operation = ENC_TPU;
6297 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6298 initKernelStateParams.iBtCount = CODECHAL_VP8_TPU_FHB_NUM_SURFACES_G9;
6299 initKernelStateParams.iCurbeCount = sizeof(struct MediaObjectVp8TpuFhbStaticDataG9);
6300 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6301 &initKernelStateParams));
6302
6303 // Until a better way can be found, maintain old binding table structures
6304 bindingTable = &m_tpuBindingTable;
6305
6306 bindingTable->dwVp8TpuPakTokenStatistics = CODECHAL_VP8_TPU_FHB_PAK_TOKEN_STATISTICS_G9;
6307 bindingTable->dwVp8TpuTokenUpdateFlags = CODECHAL_VP8_TPU_FHB_TOKEN_UPDATE_FLAGS_G9;
6308 bindingTable->dwVp8TpuEntropyCost = CODECHAL_VP8_TPU_FHB_ENTROPY_COST_TABLE_G9;
6309 bindingTable->dwVp8TpuFrameHeaderBitstream = CODECHAL_VP8_TPU_FHB_HEADER_BITSTREAM_G9;
6310 bindingTable->dwVp8TpuDefaultTokenProbability = CODECHAL_VP8_TPU_FHB_DEFAULT_TOKEN_PROBABILITY_G9;
6311 bindingTable->dwVp8TpuPictureState = CODECHAL_VP8_TPU_FHB_PICTURE_STATE_G9;
6312 bindingTable->dwVp8TpuMpuCurbeData = CODECHAL_VP8_TPU_FHB_MPU_CURBE_DATA_G9;
6313 bindingTable->dwVp8TpuHeaderMetaData = CODECHAL_VP8_TPU_FHB_HEADER_METADATA_G9;
6314 bindingTable->dwVp8TpuTokenProbability = CODECHAL_VP8_TPU_FHB_TOKEN_PROBABILITY_G9;
6315 bindingTable->dwVp8TpuPakHardwareTokenProbabilityPass1 = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS1_PROBABILITY_G9;
6316 bindingTable->dwVp8TpuKeyFrameTokenProbability = CODECHAL_VP8_TPU_FHB_KEY_TOKEN_PROBABILITY_G9;
6317 bindingTable->dwVp8TpuUpdatedTokenProbability = CODECHAL_VP8_TPU_FHB_UPDATED_TOKEN_PROBABILITY_G9;
6318 bindingTable->dwVp8TpuPakHardwareTokenProbabilityPass2 = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS2_PROBABILITY_G9;
6319 bindingTable->dwVp8TpuKernelDebugDump = CODECHAL_VP8_TPU_FHB_VME_DEBUG_STREAMOUT_G9;
6320 bindingTable->dwVp8TpuRepakDecision = CODECHAL_VP8_TPU_FHB_REPAK_DECISION_G9;
6321
6322 return status;
6323 }
6324
InitBrcConstantBuffer(struct CodechalVp8InitBrcConstantBufferParams * params)6325 MOS_STATUS CodechalEncodeVp8G9::InitBrcConstantBuffer(struct CodechalVp8InitBrcConstantBufferParams* params)
6326 {
6327 uint8_t* data;
6328 MOS_LOCK_PARAMS lockFlags;
6329 MOS_STATUS status = MOS_STATUS_SUCCESS;
6330
6331 CODECHAL_ENCODE_FUNCTION_ENTER;
6332
6333 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6334 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
6335
6336 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
6337 lockFlags.WriteOnly = 1;
6338 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6339 params->pOsInterface,
6340 ¶ms->resBrcConstantDataBuffer,
6341 &lockFlags);
6342 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6343
6344 MOS_ZeroMemory(data, BRC_CONSTANTSURFACE_VP8);
6345
6346 // Fill surface with QP Adjustment table, Distortion threshold table, MaxFrame threshold table, Distortion QP Adjustment Table for I frame
6347 status = MOS_SecureMemcpy(
6348 data,
6349 sizeof(VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_G9),
6350 (void *)VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_G9,
6351 sizeof(VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_G9));
6352 if(status != MOS_STATUS_SUCCESS)
6353 {
6354 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6355 return status;
6356 }
6357
6358 data += sizeof(VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_G9);
6359
6360 status = MOS_SecureMemcpy(
6361 data,
6362 sizeof(VP8_BRC_IFRAME_COST_TABLE_G9),
6363 (void *)VP8_BRC_IFRAME_COST_TABLE_G9,
6364 sizeof(VP8_BRC_IFRAME_COST_TABLE_G9));
6365 if(status != MOS_STATUS_SUCCESS)
6366 {
6367 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6368 return status;
6369 }
6370
6371 data += sizeof(VP8_BRC_IFRAME_COST_TABLE_G9);
6372
6373 status = MOS_SecureMemcpy(
6374 data,
6375 sizeof(VP8_BRC_PFRAME_COST_TABLE_G9),
6376 (void *)VP8_BRC_PFRAME_COST_TABLE_G9,
6377 sizeof(VP8_BRC_PFRAME_COST_TABLE_G9));
6378 if(status != MOS_STATUS_SUCCESS)
6379 {
6380 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6381 return status;
6382 }
6383
6384 data += sizeof(VP8_BRC_PFRAME_COST_TABLE_G9);
6385
6386 status = MOS_SecureMemcpy(
6387 data,
6388 sizeof(VP8_BRC_QUANT_DC_TABLE),
6389 (void *)VP8_BRC_QUANT_DC_TABLE,
6390 sizeof(VP8_BRC_QUANT_DC_TABLE));
6391 if(status != MOS_STATUS_SUCCESS)
6392 {
6393 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6394 return status;
6395 }
6396
6397 data += sizeof(VP8_BRC_QUANT_DC_TABLE);
6398
6399 status = MOS_SecureMemcpy(
6400 data,
6401 sizeof(VP8_BRC_QUANT_AC_TABLE),
6402 (void *)VP8_BRC_QUANT_AC_TABLE,
6403 sizeof(VP8_BRC_QUANT_AC_TABLE));
6404 if(status != MOS_STATUS_SUCCESS)
6405 {
6406 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6407 return status;
6408 }
6409
6410 data += sizeof(VP8_BRC_QUANT_AC_TABLE);
6411
6412 status = MOS_SecureMemcpy(
6413 data,
6414 sizeof(VP8_BRC_SKIP_MV_THRESHOLD_TABLE),
6415 (void *)VP8_BRC_SKIP_MV_THRESHOLD_TABLE,
6416 sizeof(VP8_BRC_SKIP_MV_THRESHOLD_TABLE));
6417 if(status != MOS_STATUS_SUCCESS)
6418 {
6419 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6420 return status;
6421 }
6422
6423 params->pOsInterface->pfnUnlockResource(
6424 params->pOsInterface,
6425 ¶ms->resBrcConstantDataBuffer);
6426
6427 return status;
6428 }
6429
InitBrcDistortionBuffer()6430 MOS_STATUS CodechalEncodeVp8G9::InitBrcDistortionBuffer()
6431 {
6432 uint8_t *data;
6433 MOS_STATUS status = MOS_STATUS_SUCCESS;
6434 MOS_LOCK_PARAMS lockFlagsWriteOnly;
6435 uint32_t size, width, height;
6436
6437 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
6438
6439 data = (uint8_t *)m_osInterface->pfnLockResource(
6440 m_osInterface,
6441 &(m_brcBuffers.sMeBrcDistortionBuffer.OsResource),
6442 &lockFlagsWriteOnly);
6443
6444 if (data == nullptr)
6445 {
6446 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to Lock ME BRC Distortion Buffer.");
6447 status = MOS_STATUS_UNKNOWN;
6448 return status;
6449 }
6450 width = MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64);
6451 height = 2 * MOS_ALIGN_CEIL((m_downscaledHeightInMb4x * 4), 8);
6452 size = width * height;
6453
6454 MOS_ZeroMemory(data,size);
6455 m_osInterface->pfnUnlockResource(
6456 m_osInterface, &m_brcBuffers.sMeBrcDistortionBuffer.OsResource);
6457
6458 return status;
6459 }
6460
InitMBEncConstantBuffer(struct CodechalVp8InitMbencConstantBufferParams * params)6461 MOS_STATUS CodechalEncodeVp8G9::InitMBEncConstantBuffer(struct CodechalVp8InitMbencConstantBufferParams* params)
6462 {
6463 uint8_t *data;
6464 MOS_LOCK_PARAMS lockFlagsWriteOnly;
6465 MOS_STATUS status = MOS_STATUS_SUCCESS;
6466
6467 CODECHAL_ENCODE_FUNCTION_ENTER;
6468
6469 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6470 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
6471
6472 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
6473 lockFlagsWriteOnly.WriteOnly = 1;
6474
6475 /* First copy MB_MODE_COST_LUMA table */
6476 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6477 params->pOsInterface,
6478 ¶ms->sMBModeCostLumaBuffer.OsResource,
6479 &lockFlagsWriteOnly);
6480 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6481
6482 MOS_ZeroMemory(data, params->sMBModeCostLumaBuffer.dwPitch * params->sMBModeCostLumaBuffer.dwHeight);
6483
6484 // Fill surface with VP8_MB_MODE_COST_LUMA table for I frame
6485 status = MOS_SecureMemcpy(
6486 data,
6487 sizeof(VP8_MB_MODE_COST_LUMA_G9),
6488 (void *)VP8_MB_MODE_COST_LUMA_G9,
6489 sizeof(VP8_MB_MODE_COST_LUMA_G9));
6490 if(status != MOS_STATUS_SUCCESS)
6491 {
6492 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6493 return status;
6494 }
6495
6496 params->pOsInterface->pfnUnlockResource(
6497 params->pOsInterface,
6498 ¶ms->sMBModeCostLumaBuffer.OsResource);
6499
6500 /* Now copy BLOCK_MODE_COST table */
6501 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6502 params->pOsInterface,
6503 ¶ms->sBlockModeCostBuffer.OsResource,
6504 &lockFlagsWriteOnly);
6505 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6506
6507 MOS_ZeroMemory(data, params->sBlockModeCostBuffer.dwPitch * params->sBlockModeCostBuffer.dwHeight);
6508
6509 // Fill surface with VP8_BLOCK_MODE_COST table for I frame
6510 status = MOS_SecureMemcpy(
6511 data,
6512 sizeof(VP8_BLOCK_MODE_COST_G9),
6513 (void *)VP8_BLOCK_MODE_COST_G9,
6514 sizeof(VP8_BLOCK_MODE_COST_G9));
6515 if(status != MOS_STATUS_SUCCESS)
6516 {
6517 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6518 return status;
6519 }
6520
6521 params->pOsInterface->pfnUnlockResource(
6522 params->pOsInterface,
6523 ¶ms->sBlockModeCostBuffer.OsResource);
6524
6525 return status;
6526 }
6527
InitMpuTpuBuffer()6528 MOS_STATUS CodechalEncodeVp8G9::InitMpuTpuBuffer()
6529 {
6530 uint8_t *data = nullptr;
6531 uint8_t *origData = nullptr;
6532 MOS_LOCK_PARAMS lockFlagsWriteOnly;
6533 MOS_STATUS status = MOS_STATUS_SUCCESS;
6534
6535 CODECHAL_ENCODE_FUNCTION_ENTER;
6536
6537 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
6538
6539 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
6540 lockFlagsWriteOnly.WriteOnly = 1;
6541
6542 // Last 12 bytes of LFDeltas to be initialized by kernel
6543 origData = data = (uint8_t *)m_osInterface->pfnLockResource(
6544 m_osInterface,
6545 &m_mpuTpuBuffers.resModeProbs,
6546 &lockFlagsWriteOnly);
6547 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6548
6549 MOS_ZeroMemory(data, MODE_PROPABILITIES_SIZE);
6550
6551 m_osInterface->pfnUnlockResource(
6552 m_osInterface,
6553 &m_mpuTpuBuffers.resModeProbs);
6554
6555 data = nullptr;
6556
6557 data = (uint8_t *)m_osInterface->pfnLockResource(
6558 m_osInterface,
6559 &m_mpuTpuBuffers.resRefModeProbs,
6560 &lockFlagsWriteOnly);
6561 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6562
6563 MOS_ZeroMemory(data, MODE_PROPABILITIES_SIZE);
6564
6565 m_osInterface->pfnUnlockResource(
6566 m_osInterface,
6567 &m_mpuTpuBuffers.resRefModeProbs);
6568
6569 data = nullptr;
6570
6571 // Fill surface with VP8_DEFAULT_COEFF_PROBS_G9 table
6572 data = (uint8_t *)m_osInterface->pfnLockResource(
6573 m_osInterface,
6574 &m_mpuTpuBuffers.resRefCoeffProbs,
6575 &lockFlagsWriteOnly);
6576 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6577
6578 status = MOS_SecureMemcpy(
6579 data,
6580 sizeof(VP8_DEFAULT_COEFF_PROBS_G9),
6581 (void *)VP8_DEFAULT_COEFF_PROBS_G9,
6582 sizeof(VP8_DEFAULT_COEFF_PROBS_G9));
6583 if(status != MOS_STATUS_SUCCESS)
6584 {
6585 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6586 return status;
6587 }
6588
6589 m_osInterface->pfnUnlockResource(
6590 m_osInterface,
6591 &m_mpuTpuBuffers.resRefCoeffProbs);
6592
6593 data = nullptr;
6594
6595 // Init Entropy cost surface
6596 data = (uint8_t *)m_osInterface->pfnLockResource(
6597 m_osInterface,
6598 &m_mpuTpuBuffers.resEntropyCostTable,
6599 &lockFlagsWriteOnly);
6600 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6601
6602 status = MOS_SecureMemcpy(
6603 data,
6604 sizeof(VP8_C0_TABLE),
6605 (void *)VP8_C0_TABLE,
6606 sizeof(VP8_C0_TABLE));
6607 if(status != MOS_STATUS_SUCCESS)
6608 {
6609 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6610 return status;
6611 }
6612
6613 m_osInterface->pfnUnlockResource(
6614 m_osInterface,
6615 &m_mpuTpuBuffers.resEntropyCostTable);
6616
6617 data = nullptr;
6618
6619 // Init Token update flags surface
6620 data = (uint8_t *)m_osInterface->pfnLockResource(
6621 m_osInterface,
6622 &m_mpuTpuBuffers.resPakTokenUpdateFlags,
6623 &lockFlagsWriteOnly);
6624 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6625
6626 status = MOS_SecureMemcpy(
6627 data,
6628 sizeof(VP8_PROBABILITY_UPDATE_FLAGS_G9),
6629 (void *)VP8_PROBABILITY_UPDATE_FLAGS_G9,
6630 sizeof(VP8_PROBABILITY_UPDATE_FLAGS_G9));
6631 if(status != MOS_STATUS_SUCCESS)
6632 {
6633 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6634 return status;
6635 }
6636
6637 m_osInterface->pfnUnlockResource(
6638 m_osInterface,
6639 &m_mpuTpuBuffers.resPakTokenUpdateFlags);
6640
6641 data = nullptr;
6642
6643 // Init Token update flags surface
6644 data = (uint8_t *)m_osInterface->pfnLockResource(
6645 m_osInterface,
6646 &m_mpuTpuBuffers.resDefaultTokenProbability,
6647 &lockFlagsWriteOnly);
6648 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6649
6650 status = MOS_SecureMemcpy(
6651 data,
6652 sizeof(VP8_COEFF_UPDATE_PROBS_G9),
6653 (void *)VP8_COEFF_UPDATE_PROBS_G9,
6654 sizeof(VP8_COEFF_UPDATE_PROBS_G9));
6655
6656 m_osInterface->pfnUnlockResource(
6657 m_osInterface,
6658 &m_mpuTpuBuffers.resDefaultTokenProbability);
6659
6660 data = nullptr;
6661
6662 // Init key frame prob
6663 data = (uint8_t *)m_osInterface->pfnLockResource(
6664 m_osInterface,
6665 &m_mpuTpuBuffers.resKeyFrameTokenProbability,
6666 &lockFlagsWriteOnly);
6667 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6668
6669 status = MOS_SecureMemcpy(
6670 data,
6671 sizeof(VP8_DEFAULT_COEFF_PROBS_G9),
6672 (void *)VP8_DEFAULT_COEFF_PROBS_G9,
6673 sizeof(VP8_DEFAULT_COEFF_PROBS_G9));
6674 if(status != MOS_STATUS_SUCCESS)
6675 {
6676 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6677 return status;
6678 }
6679
6680 m_osInterface->pfnUnlockResource(
6681 m_osInterface,
6682 &m_mpuTpuBuffers.resKeyFrameTokenProbability);
6683
6684 data = nullptr;
6685
6686 // Init updated frame token probability
6687 data = (uint8_t *)m_osInterface->pfnLockResource(
6688 m_osInterface,
6689 &m_mpuTpuBuffers.resUpdatedTokenProbability,
6690 &lockFlagsWriteOnly);
6691 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6692
6693 status = MOS_SecureMemcpy(
6694 data,
6695 sizeof(VP8_DEFAULT_COEFF_PROBS_G9),
6696 (void *)VP8_DEFAULT_COEFF_PROBS_G9,
6697 sizeof(VP8_DEFAULT_COEFF_PROBS_G9));
6698
6699 if (status != MOS_STATUS_SUCCESS)
6700 {
6701 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6702 return status;
6703 }
6704
6705 m_osInterface->pfnUnlockResource(
6706 m_osInterface,
6707 &m_mpuTpuBuffers.resUpdatedTokenProbability);
6708
6709 data = nullptr;
6710
6711 return status;
6712 }
6713
KeyFrameUpdateMpuTpuBuffer(struct CodechalVp8UpdateMpuTpuBufferParams * params)6714 MOS_STATUS CodechalEncodeVp8G9::KeyFrameUpdateMpuTpuBuffer(struct CodechalVp8UpdateMpuTpuBufferParams* params)
6715 {
6716 uint8_t *data=nullptr;
6717 uint8_t *origData=nullptr;
6718 MOS_LOCK_PARAMS lockFlagsWriteOnly;
6719 MOS_STATUS status = MOS_STATUS_SUCCESS;
6720
6721 CODECHAL_ENCODE_FUNCTION_ENTER;
6722
6723 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6724 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
6725
6726 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
6727 lockFlagsWriteOnly.WriteOnly = 1;
6728
6729 // Copy Key frame surface to cur probability surface
6730 origData = (uint8_t *)params->pOsInterface->pfnLockResource(
6731 params->pOsInterface,
6732 params->presKeyFrameTokenProbability,
6733 &lockFlagsWriteOnly);
6734 CODECHAL_ENCODE_CHK_NULL_RETURN(origData);
6735
6736 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6737 params->pOsInterface,
6738 params->presCurrFrameTokenProbability,
6739 &lockFlagsWriteOnly);
6740 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6741
6742 status = MOS_SecureMemcpy(
6743 data,
6744 params->dwCoeffProbsSize,
6745 origData,
6746 params->dwCoeffProbsSize);
6747
6748 if(status != MOS_STATUS_SUCCESS)
6749 {
6750 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6751 return status;
6752 }
6753
6754 params->pOsInterface->pfnUnlockResource(
6755 params->pOsInterface,
6756 params->presCurrFrameTokenProbability);
6757
6758 params->pOsInterface->pfnUnlockResource(
6759 params->pOsInterface,
6760 params->presKeyFrameTokenProbability);
6761
6762 data = nullptr;
6763
6764 // Fill surface with VP8_DEFAULT_COEFF_PROBS_G9 table
6765 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6766 params->pOsInterface,
6767 params->presHwTokenProbabilityPass1,
6768 &lockFlagsWriteOnly);
6769 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6770
6771 status = MOS_SecureMemcpy(
6772 data,
6773 sizeof(VP8_DEFAULT_COEFF_PROBS_G9),
6774 (void *)VP8_DEFAULT_COEFF_PROBS_G9,
6775 sizeof(VP8_DEFAULT_COEFF_PROBS_G9));
6776
6777 if(status != MOS_STATUS_SUCCESS)
6778 {
6779 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6780 return status;
6781 }
6782
6783 params->pOsInterface->pfnUnlockResource(
6784 params->pOsInterface,
6785 params->presHwTokenProbabilityPass1);
6786 data = nullptr;
6787
6788 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6789 params->pOsInterface,
6790 params->presHwTokenProbabilityPass2,
6791 &lockFlagsWriteOnly);
6792 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6793
6794 status = MOS_SecureMemcpy(
6795 data,
6796 sizeof(VP8_DEFAULT_COEFF_PROBS_G9),
6797 (void *)VP8_DEFAULT_COEFF_PROBS_G9,
6798 sizeof(VP8_DEFAULT_COEFF_PROBS_G9));
6799
6800 if(status != MOS_STATUS_SUCCESS)
6801 {
6802 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6803 return status;
6804 }
6805
6806 params->pOsInterface->pfnUnlockResource(
6807 params->pOsInterface,
6808 params->presHwTokenProbabilityPass2);
6809 data = nullptr;
6810
6811 return status;
6812 }
6813
SetBrcInitResetCurbe(struct CodechalVp8BrcInitResetCurbeParams * params)6814 MOS_STATUS CodechalEncodeVp8G9::SetBrcInitResetCurbe(struct CodechalVp8BrcInitResetCurbeParams* params)
6815 {
6816 struct MediaObjectVp8BrcInitResetStaticDataG9 cmd;
6817 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
6818 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
6819 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
6820 double inputBitsPerFrame, bpsRatio;
6821 MOS_STATUS status = MOS_STATUS_SUCCESS;
6822
6823 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6824 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6825 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
6826 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
6827 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
6828
6829 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
6830 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
6831
6832 picParams = params->pPicParams;
6833 seqParams = params->pSeqParams;
6834
6835 MOS_ZeroMemory(&cmd, sizeof(cmd));
6836
6837 cmd.DW1.InitBufFullInBits = seqParams->InitVBVBufferFullnessInBit;
6838 cmd.DW2.BufSizeInBits = seqParams->VBVBufferSizeInBit;
6839 cmd.DW3.AverageBitRate = seqParams->TargetBitRate[seqParams->NumTemporalLayersMinus1] * CODECHAL_ENCODE_BRC_KBPS; //DDI in Kbits
6840 cmd.DW4.MaxBitRate = seqParams->MaxBitRate * CODECHAL_ENCODE_BRC_KBPS;
6841 cmd.DW8.GopP = seqParams->GopPicSize - 1;
6842 cmd.DW9.FrameWidthInBytes = params->dwFrameWidth;
6843 cmd.DW10.FrameHeightInBytes = params->dwFrameHeight;
6844 cmd.DW10.AVBRAccuracy = 30;
6845
6846 // change FrameRateD from 1 to 100 instead of dividing FramesPer100Sec by 100 in DDI
6847 // this is needed to handle precision issue with decimal frame rate ex) 29.97 fps
6848 cmd.DW6.FrameRateM = seqParams->FramesPer100Sec[seqParams->NumTemporalLayersMinus1];
6849 cmd.DW7.FrameRateD = 100; // change FrameRateD from 1 to 100 instead of dividing FramesPer100Sec by 100 in DDI
6850 cmd.DW8.BRCFlag = 0;
6851
6852 if (seqParams->RateControlMethod == RATECONTROL_CBR)
6853 {
6854 cmd.DW4.MaxBitRate = cmd.DW3.AverageBitRate;
6855 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISCBR;
6856 }
6857 else if (seqParams->RateControlMethod == RATECONTROL_VBR)
6858 {
6859 if (cmd.DW4.MaxBitRate < cmd.DW3.AverageBitRate)
6860 {
6861 cmd.DW4.MaxBitRate = 2 * cmd.DW3.AverageBitRate;
6862 }
6863 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISVBR;
6864 }
6865
6866 // Profile & level max frame size
6867 // DW0 is DDI param seq param.
6868 cmd.DW0.ProfileLevelMaxFrame = params->dwFrameWidth * params->dwFrameHeight;
6869
6870 // Set dynamic thresholds
6871 inputBitsPerFrame =
6872 ((double)(cmd.DW4.MaxBitRate) * (double)(cmd.DW7.FrameRateD) /
6873 (double)(cmd.DW6.FrameRateM));
6874
6875 if (cmd.DW2.BufSizeInBits < (uint32_t)inputBitsPerFrame * 4)
6876 {
6877 cmd.DW2.BufSizeInBits = (uint32_t)inputBitsPerFrame * 4;
6878 }
6879
6880 if (cmd.DW1.InitBufFullInBits == 0)
6881 {
6882 cmd.DW1.InitBufFullInBits = 7 * cmd.DW2.BufSizeInBits / 8;
6883 }
6884 if (cmd.DW1.InitBufFullInBits < (uint32_t)(inputBitsPerFrame * 2))
6885 {
6886 cmd.DW1.InitBufFullInBits = (uint32_t)(inputBitsPerFrame * 2);
6887 }
6888 if (cmd.DW1.InitBufFullInBits > cmd.DW2.BufSizeInBits)
6889 {
6890 cmd.DW1.InitBufFullInBits = cmd.DW2.BufSizeInBits;
6891 }
6892
6893 bpsRatio = inputBitsPerFrame / ((double)(cmd.DW2.BufSizeInBits) / 30);
6894 bpsRatio = (bpsRatio < 0.1) ? 0.1 : (bpsRatio > 3.5) ? 3.5 : bpsRatio;
6895
6896 cmd.DW9.FrameWidthInBytes = seqParams->FrameWidth;
6897 cmd.DW10.FrameHeightInBytes = seqParams->FrameHeight;
6898 cmd.DW10.AVBRAccuracy = 30;
6899 cmd.DW11.AVBRConvergence = 150;
6900 cmd.DW11.MinQP = picParams->ClampQindexLow;
6901 cmd.DW12.MaxQP = picParams->ClampQindexHigh;
6902
6903 cmd.DW12.LevelQP = 60;
6904 // DW13 default 100
6905 cmd.DW13.MaxSection_pct = 100;
6906 cmd.DW13.OverShootCBR_pct = 115;
6907
6908 // DW14 default 100
6909 cmd.DW14.MinSection_pct = 100;
6910 cmd.DW14.VBRBias_pct = 100;
6911 cmd.DW15.InstantRateThreshold0ForP = 30;
6912 cmd.DW15.InstantRateThreshold1ForP = 50;
6913 cmd.DW15.InstantRateThreshold2ForP = 70;
6914 cmd.DW15.InstantRateThreshold3ForP = 120;
6915
6916 cmd.DW17.InstantRateThreshold0ForI = 30;
6917 cmd.DW17.InstantRateThreshold1ForI = 50;
6918 cmd.DW17.InstantRateThreshold2ForI = 90;
6919 cmd.DW17.InstantRateThreshold3ForI = 115;
6920 cmd.DW18.DeviationThreshold0ForP = (uint32_t)(-50 * pow(0.9, bpsRatio));
6921 cmd.DW18.DeviationThreshold1ForP = (uint32_t)(-50 * pow(0.66, bpsRatio));
6922 cmd.DW18.DeviationThreshold2ForP = (uint32_t)(-50 * pow(0.46, bpsRatio));
6923 cmd.DW18.DeviationThreshold3ForP = (uint32_t)(-50 * pow(0.3, bpsRatio));
6924 cmd.DW19.DeviationThreshold4ForP = (uint32_t)(50 * pow(0.3, bpsRatio));
6925 cmd.DW19.DeviationThreshold5ForP = (uint32_t)(50 * pow(0.46, bpsRatio));
6926 cmd.DW19.DeviationThreshold6ForP = (uint32_t)(50 * pow(0.7, bpsRatio));
6927 cmd.DW19.DeviationThreshold7ForP = (uint32_t)(50 * pow(0.9, bpsRatio));
6928 cmd.DW20.DeviationThreshold0ForVBR = (uint32_t)(-50 * pow(0.9, bpsRatio));
6929 cmd.DW20.DeviationThreshold1ForVBR = (uint32_t)(-50 * pow(0.7, bpsRatio));
6930 cmd.DW20.DeviationThreshold2ForVBR = (uint32_t)(-50 * pow(0.5, bpsRatio));
6931 cmd.DW20.DeviationThreshold3ForVBR = (uint32_t)(-50 * pow(0.3, bpsRatio));
6932 cmd.DW21.DeviationThreshold4ForVBR = (uint32_t)(100 * pow(0.4, bpsRatio));
6933 cmd.DW21.DeviationThreshold5ForVBR = (uint32_t)(100 * pow(0.5, bpsRatio));
6934 cmd.DW21.DeviationThreshold6ForVBR = (uint32_t)(100 * pow(0.75, bpsRatio));
6935 cmd.DW21.DeviationThreshold7ForVBR = (uint32_t)(100 * pow(0.9, bpsRatio));
6936 cmd.DW22.DeviationThreshold0ForI = (uint32_t)(-50 * pow(0.8, bpsRatio));
6937 cmd.DW22.DeviationThreshold1ForI = (uint32_t)(-50 * pow(0.6, bpsRatio));
6938 cmd.DW22.DeviationThreshold2ForI = (uint32_t)(-50 * pow(0.34, bpsRatio));
6939 cmd.DW22.DeviationThreshold3ForI = (uint32_t)(-50 * pow(0.2, bpsRatio));
6940 cmd.DW23.DeviationThreshold4ForI = (uint32_t)(50 * pow(0.2, bpsRatio));
6941 cmd.DW23.DeviationThreshold5ForI = (uint32_t)(50 * pow(0.4, bpsRatio));
6942 cmd.DW23.DeviationThreshold6ForI = (uint32_t)(50 * pow(0.66, bpsRatio));
6943 cmd.DW23.DeviationThreshold7ForI = (uint32_t)(50 * pow(0.9, bpsRatio));
6944 cmd.DW24.NumTLevels = seqParams->NumTemporalLayersMinus1 + 1;
6945
6946 if( seqParams->NumTemporalLayersMinus1 > 0)
6947 {
6948 uint32_t tempBitRate[NAX_NUM_TEMPORAL_LAYERS];
6949
6950 CODECHAL_ENCODE_CHK_STATUS_RETURN(CalMaxLevelRatioForTL(
6951 seqParams->FramesPer100Sec,
6952 seqParams->TargetBitRate,
6953 (uint32_t)seqParams->NumTemporalLayersMinus1,
6954 tempBitRate));
6955
6956 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer0 = uint32_t(tempBitRate[0]);
6957 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer1 = uint32_t(tempBitRate[1]);
6958 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer2 = uint32_t(tempBitRate[2]);
6959 cmd.DW25.INITBCK_MaxLevel_Ratio_U8_Layer3 = uint32_t(tempBitRate[3]);
6960 }
6961 else
6962 {
6963 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer0 = 0;
6964 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer1 = 0;
6965 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer2 = 0;
6966 cmd.DW25.INITBCK_MaxLevel_Ratio_U8_Layer3 = 0;
6967 }
6968
6969 if (params->bInitBrc)
6970 {
6971 *params->pdBrcInitCurrentTargetBufFullInBits = cmd.DW1.InitBufFullInBits;
6972 }
6973
6974 *params->pdwBrcInitResetBufSizeInBits = cmd.DW2.BufSizeInBits;
6975 *params->pdBrcInitResetInputBitsPerFrame = inputBitsPerFrame;
6976
6977 cmd.DW26.HistoryBufferBTI = CODECHAL_VP8_BRC_INIT_RESET_HISTORY_G9;
6978 cmd.DW27.DistortionBufferBTI = CODECHAL_VP8_BRC_INIT_RESET_DISTORTION_G9;
6979
6980 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
6981 &cmd,
6982 params->pKernelState->dwCurbeOffset,
6983 sizeof(cmd)));
6984
6985 return status;
6986 }
6987
SendBrcInitResetSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8BrcInitResetSurfaceParams * params)6988 MOS_STATUS CodechalEncodeVp8G9::SendBrcInitResetSurfaces(
6989 PMOS_COMMAND_BUFFER cmdBuffer,
6990 struct CodechalVp8BrcInitResetSurfaceParams* params)
6991 {
6992 uint32_t size;
6993 PMHW_KERNEL_STATE kernelState;
6994 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
6995 MOS_STATUS status = MOS_STATUS_SUCCESS;
6996
6997 CODECHAL_ENCODE_FUNCTION_ENTER;
6998
6999 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
7000 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7001 CODECHAL_ENCODE_CHK_NULL_RETURN(params->presBrcHistoryBuffer);
7002 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7003
7004 kernelState = params->pKernelState;
7005
7006 // BRC history buffer
7007 size = ENCODE_VP8_BRC_HISTORY_BUFFER_SIZE;
7008 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7009 surfaceCodecParams.bIsWritable = true;
7010 surfaceCodecParams.presBuffer = params->presBrcHistoryBuffer;
7011 surfaceCodecParams.dwSize = size;
7012 surfaceCodecParams.dwBindingTableOffset = CODECHAL_VP8_BRC_INIT_RESET_HISTORY_G9;
7013 surfaceCodecParams.bRenderTarget = true;
7014 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7015 m_hwInterface,
7016 cmdBuffer,
7017 &surfaceCodecParams,
7018 kernelState));
7019
7020 // Distortion Surface (output)
7021 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7022 surfaceCodecParams.bIs2DSurface = true;
7023 surfaceCodecParams.bMediaBlockRW = true;
7024 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
7025 surfaceCodecParams.dwBindingTableOffset = CODECHAL_VP8_BRC_INIT_RESET_DISTORTION_G9;
7026 surfaceCodecParams.bIsWritable = true;
7027 surfaceCodecParams.bRenderTarget = true;
7028 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7029 m_hwInterface,
7030 cmdBuffer,
7031 &surfaceCodecParams,
7032 kernelState));
7033
7034 return status;
7035 }
7036
SetBrcUpdateCurbe(struct CodechalVp8BrcUpdateCurbeParams * params)7037 MOS_STATUS CodechalEncodeVp8G9::SetBrcUpdateCurbe(struct CodechalVp8BrcUpdateCurbeParams* params)
7038 {
7039 struct MediaObjectVp8BrcUpdateStaticDataG9 cmd;
7040 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
7041 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
7042 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
7043 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
7044 MOS_STATUS status = MOS_STATUS_SUCCESS;
7045 uint32_t i;
7046
7047 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
7048 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7049 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
7050 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7051 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
7052
7053 stateHeapInterface =
7054 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7055 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
7056
7057 picParams = params->pPicParams;
7058 seqParams = params->pSeqParams;
7059 vp8QuantData = params->pVp8QuantData;
7060
7061 MOS_ZeroMemory(&cmd, sizeof(cmd));
7062
7063 cmd.DW0.TargetSize = 0;
7064 cmd.DW2.PictureHeaderSize = 0; // matching kernel value
7065 cmd.DW5.TargetSizeFlag = 0;
7066
7067 if (*params->pdBrcInitCurrentTargetBufFullInBits > (double)params->dwBrcInitResetBufSizeInBits)
7068 {
7069 *params->pdBrcInitCurrentTargetBufFullInBits -= (double)params->dwBrcInitResetBufSizeInBits;
7070 cmd.DW5.TargetSizeFlag = 1;
7071 }
7072
7073 cmd.DW0.TargetSize = (uint32_t)(*params->pdBrcInitCurrentTargetBufFullInBits);
7074
7075 cmd.DW5.CurrFrameType = (params->wPictureCodingType == I_TYPE) ? 2 : 0;
7076 cmd.DW5.BRCFlag = 16 * seqParams->RateControlMethod;
7077 cmd.DW5.MaxNumPAKs = params->dwVp8BrcNumPakPasses;
7078
7079 cmd.DW6.TID = picParams->temporal_id; // Default: 0 - if temporal scalability is not supported
7080 cmd.DW6.NumTLevels = seqParams->NumTemporalLayersMinus1 + 1; // Default: 1 - if temporal scalability is not supported
7081
7082 cmd.DW8.StartGlobalAdjustMult0 = 1;
7083 cmd.DW8.StartGlobalAdjustMult1 = 1;
7084 cmd.DW8.StartGlobalAdjustMult2 = 3;
7085 cmd.DW8.StartGlobalAdjustMult3 = 2;
7086
7087 cmd.DW9.StartGlobalAdjustDiv0 = 40;
7088 cmd.DW9.StartGlobalAdjustDiv1 = 5;
7089 cmd.DW9.StartGlobalAdjustDiv2 = 5;
7090 cmd.DW9.StartGlobalAdjustMult4 = 1;
7091
7092 cmd.DW10.StartGlobalAdjustDiv3 = 3;
7093 cmd.DW10.StartGlobalAdjustDiv4 = 1;
7094 cmd.DW10.QPThreshold0 = 20;//7;
7095 cmd.DW10.QPThreshold1 = 40;//18;
7096
7097 cmd.DW11.QPThreshold2 = 60;//25;
7098 cmd.DW11.QPThreshold3 = 90;//37;
7099 cmd.DW11.gRateRatioThreshold0 = 40;
7100 cmd.DW11.gRateRatioThreshold1 = 75;
7101
7102 cmd.DW12.gRateRatioThreshold2 = 97;
7103 cmd.DW12.gRateRatioThreshold3 = 103;
7104 cmd.DW12.gRateRatioThreshold4 = 125;
7105 cmd.DW12.gRateRatioThreshold5 = 160;
7106
7107 cmd.DW13.gRateRatioThresholdQP0 = MOS_BITFIELD_VALUE((uint32_t)-3, 8);
7108 cmd.DW13.gRateRatioThresholdQP1 = MOS_BITFIELD_VALUE((uint32_t)-2, 8);
7109 cmd.DW13.gRateRatioThresholdQP2 = MOS_BITFIELD_VALUE((uint32_t)-1, 8);
7110 cmd.DW13.gRateRatioThresholdQP3 = 0;
7111
7112 cmd.DW14.gRateRatioThresholdQP4 = 1;
7113 cmd.DW14.gRateRatioThresholdQP5 = 2;
7114 cmd.DW14.gRateRatioThresholdQP6 = 3;
7115 cmd.DW14.IndexOfPreviousQP = 0;
7116
7117 *params->pdBrcInitCurrentTargetBufFullInBits += params->dBrcInitResetInputBitsPerFrame;
7118
7119 cmd.DW3.startGAdjFrame0 = 10;
7120 cmd.DW3.startGAdjFrame1 = 50;
7121 cmd.DW4.startGAdjFrame2 = 100;
7122 cmd.DW4.startGAdjFrame3 = 150;
7123 cmd.DW11.gRateRatioThreshold0 = 40;
7124
7125 cmd.DW11.gRateRatioThreshold1 = 75;
7126
7127 cmd.DW12.gRateRatioThreshold2 = 97;
7128 cmd.DW12.gRateRatioThreshold3 = 103;
7129 cmd.DW12.gRateRatioThreshold4 = 125;
7130 cmd.DW12.gRateRatioThreshold5 = 160;
7131
7132 cmd.DW13.gRateRatioThresholdQP0 = MOS_BITFIELD_VALUE((uint32_t)-3, 8);
7133 cmd.DW13.gRateRatioThresholdQP1 = MOS_BITFIELD_VALUE((uint32_t)-2, 8);
7134 cmd.DW13.gRateRatioThresholdQP2 = MOS_BITFIELD_VALUE((uint32_t)-1, 8);
7135 cmd.DW13.gRateRatioThresholdQP3 = 0;
7136
7137 cmd.DW14.gRateRatioThresholdQP4 = 1;
7138 cmd.DW14.gRateRatioThresholdQP5 = 2;
7139 cmd.DW14.gRateRatioThresholdQP6 = 3;
7140 cmd.DW14.IndexOfPreviousQP = 0;
7141
7142 // 16bits are used instead of 8bits to fix 4K related issue
7143 cmd.DW15.FrameWidthInMB = params->dwFrameWidthInMB;
7144 cmd.DW15.FrameHeightInMB = params->dwFrameHeightInMB;
7145
7146 cmd.DW16.PFrameQPSeg0 = vp8QuantData->QIndex[0];
7147 cmd.DW16.PFrameQPSeg1 = vp8QuantData->QIndex[1];
7148 cmd.DW16.PFrameQPSeg2 = vp8QuantData->QIndex[2];
7149 cmd.DW16.PFrameQPSeg3 = vp8QuantData->QIndex[3];
7150
7151 cmd.DW17.KeyFrameQPSeg0 = vp8QuantData->QIndex[0];
7152 cmd.DW17.KeyFrameQPSeg1 = vp8QuantData->QIndex[1];
7153 cmd.DW17.KeyFrameQPSeg2 = vp8QuantData->QIndex[2];
7154 cmd.DW17.KeyFrameQPSeg3 = vp8QuantData->QIndex[3];
7155
7156 cmd.DW18.QDeltaPlane0 = vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7157 cmd.DW18.QDeltaPlane1 = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_AC];
7158 cmd.DW18.QDeltaPlane2 = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_DC];
7159 cmd.DW18.QDeltaPlane3 = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7160
7161 cmd.DW19.QDeltaPlane4 = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7162
7163 // temporal scaliability is enable
7164 cmd.DW19.MainRef = 0;
7165 cmd.DW19.RefFrameFlags = 0;
7166
7167 if (params->wPictureCodingType == P_TYPE) // P frame
7168 {
7169 if (seqParams->NumTemporalLayersMinus1 > 0)
7170 {
7171 uint32_t m_ref_frame_flags = picParams->ref_frame_ctrl;
7172 uint8_t m_rfo[3];
7173
7174 m_rfo[2] = picParams->first_ref;
7175 m_rfo[1] = picParams->second_ref;
7176 m_rfo[0] = 6 - m_rfo[2] - m_rfo[1];
7177
7178 uint32_t MainRef = 0;
7179 uint32_t k = 0;
7180
7181 for (i = 0; i <3; i++)
7182 {
7183 if (m_ref_frame_flags & (0x1 << (m_rfo[i] - 1))) {
7184 MainRef |= (m_rfo[i] << (2 * k));
7185 k++;
7186 }
7187 }
7188
7189 cmd.DW19.MainRef = MainRef;
7190 cmd.DW19.RefFrameFlags = m_ref_frame_flags;
7191 }
7192 else {
7193 // original one for MainRef and RefFlag
7194 cmd.DW19.MainRef = VP8_MAINREF_TABLE_G9[picParams->ref_frame_ctrl];
7195 cmd.DW19.RefFrameFlags = picParams->ref_frame_ctrl;
7196 }
7197 }
7198
7199 cmd.DW20.SegOn = picParams->segmentation_enabled;
7200 cmd.DW20.BRCMethod = seqParams->RateControlMethod;
7201 // DDI Seq Parameter
7202 // 0: Default, decided internally based on target usage.
7203 // 1: MB BRC enabled.
7204 // 2: MB BRC disabled.
7205 // Curbe 1: MBRC on, 0: MBRC off
7206 cmd.DW20.MBRC = (seqParams->MBBRC == 1)? 1 : 0;
7207 cmd.DW20.VMEIntraPrediction = (params->ucKernelMode == encodePerformanceMode) ? 1 : 0;
7208
7209 cmd.DW22.HistorytBufferBTI = CODECHAL_VP8_BRC_UPDATE_HISTORY_G9;
7210 cmd.DW23.PakStatisticsBTI = CODECHAL_VP8_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G9;
7211 cmd.DW24.MfxVp8EncoderCfgReadBTI = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_READ_G9;
7212 cmd.DW25.MfxVp8EncoderCfgWriteBTI = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_WRITE_G9;
7213 cmd.DW26.MBEncCurbeReadBTI = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_READ_G9;
7214 cmd.DW27.MBEncCurbeWriteBTI = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_WRITE_G9;
7215 cmd.DW28.DistortionBTI = CODECHAL_VP8_BRC_UPDATE_DISTORTION_SURFACE_G9;
7216 cmd.DW29.ConstantDataBTI = CODECHAL_VP8_BRC_UPDATE_CONSTANT_DATA_G9;
7217 cmd.DW30.SegmentMapBTI = CODECHAL_VP8_BRC_UPDATE_SEGMENT_MAP_G9;
7218 cmd.DW31.MpuCurbeReadBTI = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_READ_G9;
7219 cmd.DW32.MpuCurbeWriteBTI = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_WRITE_G9;
7220 cmd.DW33.TpuCurbeReadBTI = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_READ_G9;
7221 cmd.DW34.TpuCurbeWriteBTI = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_WRITE_G9;
7222
7223 CODECHAL_ENCODE_CHK_STATUS_RETURN(
7224 m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_UPDATE].m_dshRegion.AddData(
7225 &cmd,
7226 m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_UPDATE].dwCurbeOffset,
7227 sizeof(cmd)));
7228
7229 return status;
7230 }
7231
SetMbEncCurbe(struct CodechalVp8MbencCurbeParams * params)7232 MOS_STATUS CodechalEncodeVp8G9::SetMbEncCurbe(struct CodechalVp8MbencCurbeParams* params)
7233 {
7234 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
7235 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
7236 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
7237 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
7238 MOS_STATUS status = MOS_STATUS_SUCCESS;
7239
7240 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
7241 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7242 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
7243 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7244 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
7245 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7246
7247 stateHeapInterface =
7248 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7249 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
7250
7251 picParams = params->pPicParams;
7252 seqParams = params->pSeqParams;
7253 vp8QuantData = params->pVp8QuantData;
7254
7255 if (params->wPictureCodingType == I_TYPE)
7256 {
7257 struct MediaObjectVp8MbencIStaticDataG9 cmd;
7258 int16_t usQi_Y_Dc, usQi_UV_Dc, usQi_UV_Ac;
7259
7260 MOS_ZeroMemory(&cmd, sizeof(cmd));
7261
7262 cmd.DW0.FrameWidth = (seqParams->FrameWidth + 15) & (~0xF); /* Kernel require MB boundary aligned dimensions */
7263 cmd.DW0.FrameHeight = (seqParams->FrameHeight + 15) & (~0xF);
7264
7265 cmd.DW1.FrameType = 0; /* key frame I-Frame */
7266 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
7267 cmd.DW1.EnableHWIntraPrediction = (params->ucKernelMode == encodePerformanceMode) ? 1 : 0;
7268 cmd.DW1.EnableEnableChromaIPEnhancement = 1; /* Always enabled and cannot be disabled */
7269 cmd.DW1.EnableDebugDumps = 0;
7270 cmd.DW1.EnableMPUHistogramUpdate = 1;
7271 cmd.DW1.VMEDistortionMeasure = 2;
7272 cmd.DW1.VMEEnableTMCheck = 0;
7273
7274 usQi_Y_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7275 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7276 cmd.DW2.LambdaSegment0 = (uint16_t)((VP8_QUANT_DC_G9[usQi_Y_Dc] * VP8_QUANT_DC_G9[usQi_Y_Dc]) / 4);
7277 if (picParams->segmentation_enabled)
7278 {
7279 usQi_Y_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7280 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7281 cmd.DW2.LambdaSegment1 = (uint16_t)((VP8_QUANT_DC_G9[usQi_Y_Dc] * VP8_QUANT_DC_G9[usQi_Y_Dc]) / 4);
7282
7283 usQi_Y_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7284 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7285 cmd.DW3.LambdaSegment2 = (uint16_t)((VP8_QUANT_DC_G9[usQi_Y_Dc] * VP8_QUANT_DC_G9[usQi_Y_Dc]) / 4);
7286
7287 usQi_Y_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7288 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7289 cmd.DW3.LambdaSegment3 = (uint16_t)((VP8_QUANT_DC_G9[usQi_Y_Dc] * VP8_QUANT_DC_G9[usQi_Y_Dc]) / 4);
7290 }
7291
7292 cmd.DW4.AllDCBiasSegment0 = VP8_ALL_DC_BIAS_DEFAULT;
7293 if (picParams->segmentation_enabled)
7294 {
7295 cmd.DW4.AllDCBiasSegment1 = VP8_ALL_DC_BIAS_DEFAULT;
7296 cmd.DW5.AllDCBiasSegment2 = VP8_ALL_DC_BIAS_DEFAULT;
7297 cmd.DW5.AllDCBiasSegment3 = VP8_ALL_DC_BIAS_DEFAULT;
7298 }
7299
7300 usQi_UV_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7301 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7302 cmd.DW6.ChromaDCDeQuantSegment0 = VP8_QUANT_DC_G9[usQi_UV_Dc];
7303 if (picParams->segmentation_enabled)
7304 {
7305 usQi_UV_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7306 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7307 cmd.DW6.ChromaDCDeQuantSegment1 = VP8_QUANT_DC_G9[usQi_UV_Dc];
7308 usQi_UV_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7309 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7310 cmd.DW7.ChromaDCDeQuantSegment2 = VP8_QUANT_DC_G9[usQi_UV_Dc];
7311 usQi_UV_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7312 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7313 cmd.DW7.ChromaDCDeQuantSegment3 = VP8_QUANT_DC_G9[usQi_UV_Dc];
7314 }
7315
7316 usQi_UV_Ac = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7317 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7318 cmd.DW8.ChromaACDeQuantSegment0 = VP8_QUANT_AC_G9[usQi_UV_Ac];
7319 cmd.DW10.ChromaAC0Threshold0Segment0 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7320 cmd.DW10.ChromaAC0Threshold1Segment0 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7321 if (picParams->segmentation_enabled)
7322 {
7323 usQi_UV_Ac = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7324 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7325 cmd.DW8.ChromaACDeQuantSegment1 = VP8_QUANT_AC_G9[usQi_UV_Ac];
7326 cmd.DW11.ChromaAC0Threshold0Segment1 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7327 cmd.DW11.ChromaAC0Threshold1Segment1 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7328
7329 usQi_UV_Ac = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7330 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7331 cmd.DW9.ChromaACDeQuantSegment2 = VP8_QUANT_AC_G9[usQi_UV_Ac];
7332 cmd.DW12.ChromaAC0Threshold0Segment2 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7333 cmd.DW12.ChromaAC0Threshold1Segment2 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7334
7335 usQi_UV_Ac = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7336 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7337 cmd.DW9.ChromaACDeQuantSegment3 = VP8_QUANT_AC_G9[usQi_UV_Ac];
7338 cmd.DW13.ChromaAC0Threshold0Segment3 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7339 cmd.DW13.ChromaAC0Threshold1Segment3 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7340 }
7341
7342 usQi_UV_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7343 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7344 cmd.DW14.ChromaDCThreshold0Segment0 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7345 cmd.DW14.ChromaDCThreshold1Segment0 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7346 cmd.DW15.ChromaDCThreshold2Segment0 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7347 cmd.DW15.ChromaDCThreshold3Segment0 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7348 if (picParams->segmentation_enabled)
7349 {
7350 usQi_UV_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7351 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7352 cmd.DW16.ChromaDCThreshold0Segment1 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7353 cmd.DW16.ChromaDCThreshold1Segment1 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7354 cmd.DW17.ChromaDCThreshold2Segment1 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7355 cmd.DW17.ChromaDCThreshold3Segment1 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7356
7357 usQi_UV_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7358 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7359 cmd.DW18.ChromaDCThreshold0Segment2 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7360 cmd.DW18.ChromaDCThreshold1Segment2 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7361 cmd.DW19.ChromaDCThreshold2Segment2 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7362 cmd.DW19.ChromaDCThreshold3Segment2 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7363
7364 usQi_UV_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7365 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7366 cmd.DW20.ChromaDCThreshold0Segment3 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7367 cmd.DW20.ChromaDCThreshold1Segment3 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7368 cmd.DW21.ChromaDCThreshold2Segment3 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7369 cmd.DW21.ChromaDCThreshold3Segment3 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G9[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G9[usQi_UV_Dc]) >> 7);
7370 }
7371
7372 usQi_UV_Ac = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7373 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7374 cmd.DW22.ChromaAC1ThresholdSegment0 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7);
7375 if (picParams->segmentation_enabled)
7376 {
7377 usQi_UV_Ac = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7378 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7379 cmd.DW22.ChromaAC1ThresholdSegment1 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7);
7380
7381 usQi_UV_Ac = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7382 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7383 cmd.DW23.ChromaAC1ThresholdSegment2 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7);
7384 usQi_UV_Ac = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7385 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7386 cmd.DW23.ChromaAC1ThresholdSegment3 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G9[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G9[usQi_UV_Ac]) >> 7);
7387 }
7388
7389 usQi_Y_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7390 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7391 cmd.DW24.VME16x16CostSegment0 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][0];
7392 cmd.DW25.VME4x4CostSegment0 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][1];
7393 cmd.DW26.VME16x16NonDCPenaltySegment0 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][2];
7394 cmd.DW27.VME4x4NonDCPenaltySegment0 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][3];
7395 if (picParams->segmentation_enabled)
7396 {
7397 usQi_Y_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7398 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7399 cmd.DW24.VME16x16CostSegment1 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][0];
7400 cmd.DW25.VME4x4CostSegment1 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][1];
7401 cmd.DW26.VME16x16NonDCPenaltySegment1 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][2];
7402 cmd.DW27.VME4x4NonDCPenaltySegment1 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][3];
7403
7404 usQi_Y_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7405 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7406 cmd.DW24.VME16x16CostSegment2 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][0];
7407 cmd.DW25.VME4x4CostSegment2 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][1];
7408 cmd.DW26.VME16x16NonDCPenaltySegment2 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][2];
7409 cmd.DW27.VME4x4NonDCPenaltySegment2 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][3];
7410
7411 usQi_Y_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7412 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7413 cmd.DW24.VME16x16CostSegment3 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][0];
7414 cmd.DW25.VME4x4CostSegment3 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][1];
7415 cmd.DW26.VME16x16NonDCPenaltySegment3 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][2];
7416 cmd.DW27.VME4x4NonDCPenaltySegment3 = VP8_IFRAME_VME_COSTS_G9[usQi_Y_Dc & 0x7F][3];
7417 }
7418
7419 cmd.DW32.MBEncPerMBOutDataSurfBTI = CODECHAL_VP8_MBENC_PER_MB_OUT_G9;
7420
7421 /* For CM kernels the Surface index of UV surface gets incremented by 1, so the Luma surface index itself is programmed in the Curbe data */
7422 cmd.DW33.MBEncCurrYBTI = CODECHAL_VP8_MBENC_CURR_Y_G9;
7423 cmd.DW34.MBEncCurrUVBTI = CODECHAL_VP8_MBENC_CURR_Y_G9;//CODECHAL_VP8_MBENC_CURR_UV_G9;
7424 cmd.DW35.MBModeCostLumaBTI = CODECHAL_VP8_MBENC_MB_MODE_COST_LUMA_G9;
7425 cmd.DW36.MBEncBlockModeCostBTI = CODECHAL_VP8_MBENC_BLOCK_MODE_COST_G9;
7426 cmd.DW37.ChromaReconSurfBTI = CODECHAL_VP8_MBENC_CHROMA_RECON_G9;
7427 cmd.DW38.SegmentationMapBTI = CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G9;
7428 cmd.DW39.HistogramBTI = CODECHAL_VP8_MBENC_HISTOGRAM_G9;
7429 cmd.DW40.MBEncVMEDebugStreamOutBTI = CODECHAL_VP8_MBENC_I_VME_DEBUG_STREAMOUT_G9;
7430 cmd.DW41.VmeBTI = CODECHAL_VP8_MBENC_VME_G9;
7431 cmd.DW42.IDistortionSurfaceBTI = CODECHAL_VP8_MBENC_IDIST_G9;
7432 cmd.DW43.MBEncCurrYDownScaledBTI = CODECHAL_VP8_MBENC_CURR_Y_DOWNSCALED_G9;
7433 cmd.DW44.MBEncVMECoarseIntraBTI = CODECHAL_VP8_MBENC_VME_Coarse_Intra_G9;
7434
7435 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7436 &cmd,
7437 params->pKernelState->dwCurbeOffset,
7438 sizeof(cmd)));
7439 }
7440 else
7441 {
7442 //P frame CURBE
7443 struct MediaObjectVp8MbencPStaticDataG9 cmd;
7444 int16_t usQi_Y_Dc_Seg0, usQi_Y_Dc_Seg1, usQi_Y_Dc_Seg2, usQi_Y_Dc_Seg3;
7445 int16_t usQp_Seg0, usQp_Seg1, usQp_Seg2, usQp_Seg3;
7446
7447 MOS_ZeroMemory(&cmd, sizeof(cmd));
7448
7449 usQi_Y_Dc_Seg0 = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];/* TBC */
7450 usQi_Y_Dc_Seg1 = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7451 usQi_Y_Dc_Seg2 = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7452 usQi_Y_Dc_Seg3 = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7453
7454 usQp_Seg0 = usQi_Y_Dc_Seg0 < 0 ? 0 : (usQi_Y_Dc_Seg0 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg0);
7455 usQp_Seg1 = usQi_Y_Dc_Seg1 < 0 ? 0 : (usQi_Y_Dc_Seg1 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg1);
7456 usQp_Seg2 = usQi_Y_Dc_Seg2 < 0 ? 0 : (usQi_Y_Dc_Seg2 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg2);
7457 usQp_Seg3 = usQi_Y_Dc_Seg3 < 0 ? 0 : (usQi_Y_Dc_Seg3 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg3);
7458
7459 uint8_t MEMethod = (params->ucKernelMode == encodeNormalMode) ? 6 : 4;
7460
7461 //DW0
7462 cmd.DW0.FrameWidth = (seqParams->FrameWidth + 15) & (~0xF); /* Kernel require MB boundary aligned dimensions */
7463 cmd.DW0.FrameHeight = (seqParams->FrameHeight + 15) & (~0xF);
7464 // DW1
7465 cmd.DW1.FrameType = 1; // P-frame
7466 cmd.DW1.MultiplePred = (params->ucKernelMode == encodeNormalMode) ? 1 : ((params->ucKernelMode == encodePerformanceMode) ? 0 : 2);
7467 cmd.DW1.HMEEnable = params->bHmeEnabled;
7468 cmd.DW1.HMECombineOverlap = 1;
7469 cmd.DW1.EnableTemporalScalability = 0;
7470 cmd.DW1.RefFrameFlags = picParams->ref_frame_ctrl;
7471 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
7472 cmd.DW1.EnableSegmentationInfoUpdate = 1;//dont care field hardcoding to match kernel- picParams->update_mb_segmentation_map;
7473 cmd.DW1.MultiReferenceQPCheck = false;
7474 cmd.DW1.ModecostEnableFlag = 1;
7475
7476 // temporal scaliability is enable
7477 cmd.DW1.MainRef = 0;
7478
7479 if (seqParams->NumTemporalLayersMinus1 > 0)
7480 {
7481 uint32_t m_ref_frame_flags = picParams->ref_frame_ctrl;
7482 uint8_t m_rfo[3];
7483
7484 m_rfo[2] = picParams->first_ref;
7485 m_rfo[1] = picParams->second_ref;
7486 m_rfo[0] = 6 - m_rfo[2] - m_rfo[1];
7487
7488 uint32_t MainRef = 0;
7489 uint32_t k = 0;
7490 uint32_t i;
7491
7492 for (i = 0; i <3; i++)
7493 {
7494 if (m_ref_frame_flags & (0x1 << (m_rfo[i] - 1))) {
7495 MainRef |= (m_rfo[i] << (2 * k));
7496 k++;
7497 }
7498 }
7499
7500 cmd.DW1.MainRef = MainRef;
7501 }
7502 else {
7503 // original one for MainRef and RefFlag
7504 cmd.DW1.MainRef = VP8_MAINREF_TABLE_G9[picParams->ref_frame_ctrl];
7505 }
7506
7507 //DW2
7508 cmd.DW2.LambdaIntraSegment0 = VP8_QUANT_DC_G9[usQp_Seg0];
7509 cmd.DW2.LambdaInterSegment0 = (VP8_QUANT_DC_G9[usQp_Seg0] >> 2);
7510 //DW3
7511 cmd.DW3.LambdaIntraSegment1 = (VP8_QUANT_DC_G9[usQp_Seg1]);
7512 cmd.DW3.LambdaInterSegment1 = (VP8_QUANT_DC_G9[usQp_Seg1] >> 2);
7513 //DW4
7514 cmd.DW4.LambdaIntraSegment2 = (VP8_QUANT_DC_G9[usQp_Seg2]);
7515 cmd.DW4.LambdaInterSegment2 = (VP8_QUANT_DC_G9[usQp_Seg2] >> 2);
7516 //DW5
7517 cmd.DW5.LambdaIntraSegment3 = (VP8_QUANT_DC_G9[usQp_Seg3]);
7518 cmd.DW5.LambdaInterSegment3 = (VP8_QUANT_DC_G9[usQp_Seg3] >> 2);
7519 //DW6
7520 cmd.DW6.ReferenceFrameSignBias_3 = picParams->sign_bias_golden;
7521 cmd.DW6.ReferenceFrameSignBias_2 = picParams->sign_bias_alternate;
7522 cmd.DW6.ReferenceFrameSignBias_1 = picParams->sign_bias_golden ^ picParams->sign_bias_alternate;
7523 cmd.DW6.ReferenceFrameSignBias_0 = 0;
7524 //DW7
7525 cmd.DW7.RawDistThreshold = (params->ucKernelMode == encodeNormalMode) ? 50 : ((params->ucKernelMode == encodePerformanceMode) ? 0 : 100);
7526 cmd.DW7.TemporalLayerID = picParams->temporal_id;
7527 //DW8
7528 cmd.DW8.EarlyIMESuccessfulStopThreshold = 0;
7529 cmd.DW8.AdaptiveSearchEnable = (params->ucKernelMode != encodePerformanceMode) ? 1 : 0;
7530 cmd.DW8.SkipModeEnable = 1;
7531 cmd.DW8.BidirectionalMixDisbale = 0;
7532 cmd.DW8.Transform8x8FlagForInterEnable = 0;
7533 cmd.DW8.EarlyIMESuccessEnable = 0;
7534 //DW9
7535 cmd.DW9.RefPixelBiasEnable = 0;
7536 cmd.DW9.UnidirectionMixEnable = 0;
7537 cmd.DW9.BidirectionalWeight = 0;
7538 cmd.DW9.RefIDPolarityBits = 0;
7539 cmd.DW9.MaximumNumberOfMotionVectors = 0 /* 32 */; // from BDW
7540 //DW10
7541 cmd.DW10.MaxFixedSearchPathLength = (params->ucKernelMode == encodeNormalMode) ? 25 : ((params->ucKernelMode == encodePerformanceMode) ? 9 : 57);
7542 cmd.DW10.MaximumSearchPathLength = 57;
7543 //DW11
7544 cmd.DW11.SubMacroBlockSubPartitionMask = 0 /* 0x30 */; //from BDW
7545 cmd.DW11.IntraSADMeasureAdjustment = 2;
7546 cmd.DW11.InterSADMeasureAdjustment = 2;
7547 cmd.DW11.BlockBasedSkipEnable = 0;
7548 cmd.DW11.BMEdisableforFBRMessage = 0 /* 1 */; // from BDW
7549 cmd.DW11.ForwardTransformSkipCheckEnable = 0;
7550 cmd.DW11.ProcessInterChromaPixelsMode = 0;
7551 cmd.DW11.DisableFieldCacheAllocation = 0;
7552 cmd.DW11.SkipModeType = 0;
7553 cmd.DW11.SubPelMode = 3;
7554 cmd.DW11.DualSearchPathOption = 0;
7555 cmd.DW11.SearchControl = 0;
7556 cmd.DW11.ReferenceAccess = 0;
7557 cmd.DW11.SourceAccess = 0;
7558 cmd.DW11.InterMbTypeRoadMap = 0;
7559 cmd.DW11.SourceBlockSize = 0;
7560 //DW12
7561 cmd.DW12.ReferenceSearchWindowsHeight = (params->ucKernelMode != encodePerformanceMode) ? 40 : 28;
7562 cmd.DW12.ReferenceSearchWindowsWidth = (params->ucKernelMode != encodePerformanceMode) ? 48 : 28;
7563 //DW13
7564 cmd.DW13.Value = VP8_COST_TABLE_G9[usQp_Seg0][0];
7565 cmd.DW14.Value = VP8_COST_TABLE_G9[usQp_Seg0][1];
7566 cmd.DW15.Value = VP8_COST_TABLE_G9[usQp_Seg0][2];
7567 // which table to load is selected by MEMethod parameter determined by the driver based on the usage model (normal/quality/performance)
7568 switch (MEMethod)
7569 {
7570 case 2:
7571 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_SINGLESU), VP8_SINGLESU, sizeof(VP8_SINGLESU)));
7572 break;
7573
7574 case 3:
7575 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_RASTERSCAN_48x40), VP8_RASTERSCAN_48x40, sizeof(VP8_RASTERSCAN_48x40)));
7576 break;
7577
7578 case 4:
7579 case 5:
7580 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_FULLSPIRAL_48x40), VP8_FULLSPIRAL_48x40, sizeof(VP8_FULLSPIRAL_48x40)));
7581 break;
7582
7583 case 6:
7584 default:
7585 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_DIAMOND), VP8_DIAMOND, sizeof(VP8_DIAMOND)));
7586 break;
7587 }
7588 //DW30
7589 cmd.DW30.Value = VP8_COST_TABLE_G9[usQp_Seg0][3];
7590 //DW31
7591 cmd.DW31.Value = VP8_COST_TABLE_G9[usQp_Seg0][4];
7592 //DW32
7593 cmd.DW32.BilinearEnable = 0;
7594 cmd.DW32.Intra16x16NoDCPenaltySegment0 = VP8_COST_TABLE_G9[usQp_Seg0][5];
7595 cmd.DW32.Intra16x16NoDCPenaltySegment1 = VP8_COST_TABLE_G9[usQp_Seg1][5];
7596 //DW33
7597 cmd.DW33.Intra16x16NoDCPenaltySegment2 = VP8_COST_TABLE_G9[usQp_Seg2][5];
7598 cmd.DW33.Intra16x16NoDCPenaltySegment3 = VP8_COST_TABLE_G9[usQp_Seg3][5];
7599 cmd.DW33.HMECombineLen = 8;//based on target usage part of par file param
7600 //DW34 to DW57
7601 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW34), 24 * sizeof(uint32_t), VP8_MvRefCostContext_G9, 24 * sizeof(uint32_t)));
7602 //DW58
7603 cmd.DW58.EncCost16x16 = 0;
7604 cmd.DW58.EncCost16x8 = 0x73C;
7605 //DW59
7606 cmd.DW59.EncCost8x8 = 0x365;
7607 cmd.DW59.EncCost4x4 = 0xDC9;
7608 //DW60
7609 cmd.DW60.FrameCountProbabilityRefFrameCost_0 = 516;
7610 cmd.DW60.FrameCountProbabilityRefFrameCost_1 = 106;
7611 //DW61
7612 cmd.DW61.FrameCountProbabilityRefFrameCost_2 = 2407;
7613 cmd.DW61.FrameCountProbabilityRefFrameCost_3 = 2409;
7614 //DW62
7615 switch (m_pFramePositionInGop)
7616 {
7617 case 1:
7618 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G9[m_averageKeyFrameQp];
7619 cmd.DW62.AverageQPOfGoldRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
7620 cmd.DW62.AverageQPOfAltRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
7621 break;
7622 case 2:
7623 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G9[m_averagePFrameQp];
7624 cmd.DW62.AverageQPOfGoldRefFrame = VP8_QUANT_DC_G9[m_averageKeyFrameQp];
7625 cmd.DW62.AverageQPOfAltRefFrame = cmd.DW62.AverageQPOfGoldRefFrame;
7626 break;
7627 case 3:
7628 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G9[m_averagePFrameQp];
7629 cmd.DW62.AverageQPOfGoldRefFrame = VP8_QUANT_DC_G9[m_averagePFrameQp];
7630 cmd.DW62.AverageQPOfAltRefFrame = VP8_QUANT_DC_G9[m_averageKeyFrameQp];
7631 break;
7632 default:
7633 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G9[m_averagePFrameQp];
7634 cmd.DW62.AverageQPOfGoldRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
7635 cmd.DW62.AverageQPOfAltRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
7636 break;
7637 }
7638
7639 //DW63
7640 cmd.DW63.Intra4x4NoDCPenaltySegment0 = VP8_COST_TABLE_G9[usQp_Seg0][6];
7641 cmd.DW63.Intra4x4NoDCPenaltySegment1 = VP8_COST_TABLE_G9[usQp_Seg1][6];
7642 cmd.DW63.Intra4x4NoDCPenaltySegment2 = VP8_COST_TABLE_G9[usQp_Seg2][6];
7643 cmd.DW63.Intra4x4NoDCPenaltySegment3 = VP8_COST_TABLE_G9[usQp_Seg3][6];
7644 //DW64
7645 cmd.DW64.Value = VP8_COST_TABLE_G9[usQp_Seg1][0];
7646 //DW65
7647 cmd.DW65.Value = VP8_COST_TABLE_G9[usQp_Seg1][1];
7648 //DW66
7649 cmd.DW66.Value = VP8_COST_TABLE_G9[usQp_Seg1][2];
7650 //DW67
7651 cmd.DW67.Value = VP8_COST_TABLE_G9[usQp_Seg1][3];
7652 //DW68
7653 cmd.DW68.Value = VP8_COST_TABLE_G9[usQp_Seg1][4];
7654 //DW69
7655 cmd.DW69.Value = VP8_COST_TABLE_G9[usQp_Seg2][0];
7656 //DW70
7657 cmd.DW70.Value = VP8_COST_TABLE_G9[usQp_Seg2][1];
7658 //DW71
7659 cmd.DW71.Value = VP8_COST_TABLE_G9[usQp_Seg2][2];
7660 //DW72
7661 cmd.DW72.Value = VP8_COST_TABLE_G9[usQp_Seg2][3];
7662 //DW73
7663 cmd.DW73.Value = VP8_COST_TABLE_G9[usQp_Seg2][4];
7664 //DW74
7665 cmd.DW74.Value = VP8_COST_TABLE_G9[usQp_Seg3][0];
7666 //DW75
7667 cmd.DW75.Value = VP8_COST_TABLE_G9[usQp_Seg3][1];
7668 //DW76
7669 cmd.DW76.Value = VP8_COST_TABLE_G9[usQp_Seg3][2];
7670 //DW77
7671 cmd.DW77.Value = VP8_COST_TABLE_G9[usQp_Seg3][3];
7672 //DW78
7673 cmd.DW78.Value = VP8_COST_TABLE_G9[usQp_Seg3][4];
7674 //DW79
7675 cmd.DW79.NewMVSkipThresholdSegment0 = VP8_NewMVSkipThreshold_G9[usQp_Seg0];
7676 cmd.DW79.NewMVSkipThresholdSegment1 = VP8_NewMVSkipThreshold_G9[usQp_Seg1];
7677 //DW80
7678 cmd.DW80.NewMVSkipThresholdSegment2 = VP8_NewMVSkipThreshold_G9[usQp_Seg2];
7679 cmd.DW80.NewMVSkipThresholdSegment3 = VP8_NewMVSkipThreshold_G9[usQp_Seg3];
7680
7681 //setup binding table index entries
7682 cmd.DW81.PerMbOutputDataSurfaceBTI = CODECHAL_VP8_MBENC_PER_MB_OUT_G9;
7683 cmd.DW82.CurrentPictureYSurfaceBTI = CODECHAL_VP8_MBENC_CURR_Y_G9;
7684 cmd.DW83.CurrentPictureInterleavedUVSurfaceBTI = CODECHAL_VP8_MBENC_CURR_Y_G9;
7685 cmd.DW84.HMEMVDataSurfaceBTI = CODECHAL_VP8_MBENC_MV_DATA_FROM_ME_G9;
7686 cmd.DW85.MVDataSurfaceBTI = CODECHAL_VP8_MBENC_IND_MV_DATA_G9;
7687 cmd.DW86.MbCountPerReferenceFrameBTI = CODECHAL_VP8_MBENC_REF_MB_COUNT_G9;
7688 cmd.DW87.VMEInterPredictionBTI = CODECHAL_VP8_MBENC_INTER_PRED_G9;
7689 cmd.DW88.ActiveRef1BTI = CODECHAL_VP8_MBENC_REF1_PIC_G9;
7690 cmd.DW89.ActiveRef2BTI = CODECHAL_VP8_MBENC_REF2_PIC_G9;
7691 cmd.DW90.ActiveRef3BTI = CODECHAL_VP8_MBENC_REF3_PIC_G9;
7692 cmd.DW91.PerMbQuantDataBTI = CODECHAL_VP8_MBENC_P_PER_MB_QUANT_G9;
7693 cmd.DW92.SegmentMapBTI = CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G9;
7694 cmd.DW93.InterPredictionDistortionBTI = CODECHAL_VP8_MBEBC_INTER_PRED_DISTORTION_G9;
7695 cmd.DW94.HistogramBTI = CODECHAL_VP8_MBENC_HISTOGRAM_G9;
7696 cmd.DW95.PredMVDataBTI = CODECHAL_VP8_MBEBC_PER_MV_DATA_G9;
7697 cmd.DW96.ModeCostUpdateBTI = CODECHAL_VP8_MBENC_MODE_COST_UPDATE_G9;
7698 cmd.DW97.KernelDebugDumpBTI = CODECHAL_VP8_MBENC_P_VME_DEBUG_STREAMOUT_G9;
7699
7700 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7701 &cmd,
7702 params->pKernelState->dwCurbeOffset,
7703 sizeof(cmd)));
7704 }
7705
7706 return status;
7707 }
7708
SetMeCurbe(struct CodechalVp8MeCurbeParams * params)7709 MOS_STATUS CodechalEncodeVp8G9::SetMeCurbe(struct CodechalVp8MeCurbeParams* params)
7710 {
7711 struct MediaObjectVp8MeStaticDataG9 cmd;
7712 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
7713 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
7714 CODECHAL_MEDIA_STATE_TYPE encMediaStateType;
7715 uint8_t meMode, meMethod, tableIdx;
7716 uint32_t scaleFactor;
7717 MOS_STATUS status = MOS_STATUS_SUCCESS;
7718
7719 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
7720 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7721 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7722
7723 stateHeapInterface =
7724 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7725 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
7726
7727 seqParams = params->pSeqParams;
7728
7729 MOS_ZeroMemory(&cmd, sizeof(cmd));
7730
7731 meMode = params->b16xMeEnabled ? (params->b16xME ? CODECHAL_ENCODE_ME16X_BEFORE_ME4X : CODECHAL_ENCODE_ME4X_AFTER_ME16X) : CODECHAL_ENCODE_ME4X_ONLY;
7732 scaleFactor = (meMode == CODECHAL_ENCODE_ME16X_BEFORE_ME4X) ? 16 : 4;
7733 encMediaStateType = params->b16xME ? CODECHAL_MEDIA_STATE_16X_ME : CODECHAL_MEDIA_STATE_4X_ME;
7734
7735 CODECHAL_ENCODE_ASSERT(seqParams->TargetUsage < NUM_TARGET_USAGE_MODES);
7736
7737 cmd.DW1.MaxNumMVs = 0x10;
7738 cmd.DW1.BiWeight = 0;
7739
7740 cmd.DW2.MaxNumSU = 57;
7741 // For Enc_P kernel MaxLenSP is supposed to have the following values
7742 // Normal mode = 25
7743 // Perf mode = 9
7744 // Quality mode = 57
7745 // For ME kernel, MaxLenSP is supposed to have the value 57 for all modes
7746 cmd.DW2.MaxLenSP = 57;
7747
7748 cmd.DW3.SubMbPartMask = 0x77;
7749 cmd.DW3.InterSAD = 0;
7750 cmd.DW3.IntraSAD = 0;
7751 cmd.DW3.BMEDisableFBR = 1;
7752 cmd.DW3.SubPelMode = 3;
7753
7754 cmd.DW4.PictureHeightMinus1 = CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(params->dwFrameFieldHeight / scaleFactor) - 1;
7755 cmd.DW4.PictureWidth = CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(params->dwFrameWidth / scaleFactor);
7756
7757 cmd.DW4.PictureHeightMinus1 = cmd.DW4.PictureHeightMinus1 < 2 ? 2 : cmd.DW4.PictureHeightMinus1;
7758 cmd.DW4.PictureWidth = cmd.DW4.PictureWidth < 3 ? 3 : cmd.DW4.PictureWidth;
7759
7760 cmd.DW5.RefHeight = 40;
7761 cmd.DW5.RefWidth = 48;
7762
7763 cmd.DW6.MEModes = meMode;
7764 cmd.DW6.SuperCombineDist = (params->ucKernelMode == encodeNormalMode) ? 5 : ((params->ucKernelMode == encodePerformanceMode) ? 0 : 1);
7765 cmd.DW6.MaxVmvR = 0x7fc; /* For VP8, Luma motion vectors in the range -2046 to +2046 (1/8 pel) */
7766
7767 cmd.DW13.NumRefIdxL0MinusOne = VP8_NUM_REFS_G9[params->pPicParams->ref_frame_ctrl] - 1;
7768 cmd.DW13.NumRefIdxL1MinusOne = 0;
7769
7770 tableIdx = 0; /* Only P pictures in VP8, no B pictures */
7771 meMethod = (params->ucKernelMode == encodeNormalMode) ? 6 : 4;
7772 status = MOS_SecureMemcpy((uint32_t*)(&cmd.SpDelta),
7773 14 * sizeof(uint32_t),
7774 m_encodeSearchPath[tableIdx][meMethod],
7775 14 * sizeof(uint32_t));
7776
7777 if (status != MOS_STATUS_SUCCESS)
7778 {
7779 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7780 return status;
7781 }
7782 cmd.DW32.VP8MeMVOutputDataBTI = CODECHAL_VP8_ME_MV_DATA_G9;
7783 cmd.DW33.VP8MeMVInputDataBTI = CODECHAL_VP8_16xME_MV_DATA_G9;
7784 cmd.DW34.VP8MeDistortionBTI = CODECHAL_VP8_ME_DISTORTION_G9;
7785 cmd.DW35.VP8MeMinDistBrcBTI = CODECHAL_VP8_ME_MIN_DIST_BRC_DATA_G9;
7786 cmd.DW36.ForwardRefBTI = CODECHAL_VP8_VME_INTER_PRED_G9;
7787
7788 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_meKernelState.m_dshRegion.AddData(
7789 &cmd,
7790 m_meKernelState.dwCurbeOffset,
7791 sizeof(cmd)));
7792
7793 return status;
7794 }
7795
SetMpuCurbe(struct CodechalVp8MpuCurbeParams * params)7796 MOS_STATUS CodechalEncodeVp8G9::SetMpuCurbe(struct CodechalVp8MpuCurbeParams* params)
7797 {
7798 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
7799 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
7800 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
7801 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
7802 struct MediaObjectVp8MpuFhbStaticDataG9 cmd;
7803 MOS_STATUS status = MOS_STATUS_SUCCESS;
7804
7805 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
7806 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7807 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
7808 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7809 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
7810
7811 stateHeapInterface =
7812 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7813 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
7814
7815 picParams = params->pPicParams;
7816 seqParams = params->pSeqParams;
7817 vp8QuantData = params->pVp8QuantData;
7818
7819 MOS_ZeroMemory(&cmd, sizeof(cmd));
7820
7821 cmd.DW0.FrameWidth = (seqParams->FrameWidth + 15) & (~0xF); /* Kernel require MB boundary aligned dimensions */
7822 cmd.DW0.FrameHeight = (seqParams->FrameHeight + 15) & (~0xF);
7823
7824 cmd.DW1.FrameType = picParams->frame_type;
7825 cmd.DW1.Version = picParams->version;
7826 cmd.DW1.ShowFrame = picParams->show_frame;
7827 cmd.DW1.HorizontalScaleCode = seqParams->FrameWidthScale;
7828 cmd.DW1.VerticalScaleCode = seqParams->FrameHeightScale;
7829 cmd.DW1.ColorSpaceType = picParams->color_space;
7830 cmd.DW1.ClampType = picParams->clamping_type;
7831 cmd.DW1.PartitionNumL2 = picParams->CodedCoeffTokenPartition;
7832 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
7833 cmd.DW1.SegMapUpdate =
7834 (picParams->segmentation_enabled) ? picParams->update_mb_segmentation_map : 0;
7835 cmd.DW1.SegmentationFeatureUpdate = picParams->update_segment_feature_data; // setup whenever segmentation is 1
7836 cmd.DW1.SegmentationFeatureMode = 1; // delta mode
7837 cmd.DW1.LoopFilterType = picParams->filter_type;
7838 cmd.DW1.SharpnessLevel = picParams->sharpness_level;
7839 cmd.DW1.LoopFilterAdjustmentOn = picParams->loop_filter_adj_enable;
7840 cmd.DW1.MBNoCoeffiscientSkip = picParams->mb_no_coeff_skip;
7841 cmd.DW1.ForcedLFUpdateForKeyFrame = picParams->forced_lf_adjustment;
7842
7843 // DDI spec is not mapping to codechal directly. It should be mapping as below
7844 if (picParams->refresh_golden_frame == 1)
7845 {
7846 cmd.DW1.GoldenReferenceCopyFlag = 3;
7847 }
7848 else {
7849 cmd.DW1.GoldenReferenceCopyFlag = picParams->copy_buffer_to_golden;
7850 }
7851 if (picParams->refresh_alternate_frame == 1)
7852 {
7853 cmd.DW1.AlternateReferenceCopyFlag = 3;
7854 }
7855 else {
7856 cmd.DW1.AlternateReferenceCopyFlag = picParams->copy_buffer_to_alternate;
7857 }
7858
7859 cmd.DW1.LastFrameUpdate = picParams->refresh_last;
7860 cmd.DW1.SignBiasGolden = picParams->sign_bias_golden;
7861 cmd.DW1.SignBiasAltRef = picParams->sign_bias_alternate;
7862 cmd.DW1.RefreshEntropyP = picParams->refresh_entropy_probs;
7863
7864 cmd.DW2.LoopFilterLevel = picParams->version > 1 ? 0 : picParams->loop_filter_level[0];
7865 cmd.DW2.Qindex = vp8QuantData->QIndex[0];
7866 cmd.DW2.Y1DCQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7867 cmd.DW2.Y2DCQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_DC];
7868
7869 cmd.DW3.Y2ACQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_AC];
7870 cmd.DW3.UVDCQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7871 cmd.DW3.UVACQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7872 cmd.DW3.FeatureData0Segment0 = vp8QuantData->QIndex[0];
7873
7874 cmd.DW4.FeatureData0Segment1 = vp8QuantData->QIndex[1];
7875 cmd.DW4.FeatureData0Segment2 = vp8QuantData->QIndex[2];
7876 cmd.DW4.FeatureData0Segment3 = vp8QuantData->QIndex[3];
7877 cmd.DW4.FeatureData1Segment0 = picParams->loop_filter_level[0];
7878
7879 cmd.DW5.FeatureData1Segment1 = picParams->loop_filter_level[1];
7880 cmd.DW5.FeatureData1Segment2 = picParams->loop_filter_level[2];
7881 cmd.DW5.FeatureData1Segment3 = picParams->loop_filter_level[3];
7882 cmd.DW5.RefLFDelta0 = picParams->ref_lf_delta[0];
7883
7884 cmd.DW6.RefLFDelta1 = picParams->ref_lf_delta[1];
7885 cmd.DW6.RefLFDelta2 = picParams->ref_lf_delta[2];
7886 cmd.DW6.RefLFDelta3 = picParams->ref_lf_delta[3];
7887 cmd.DW6.ModeLFDelta0 = picParams->mode_lf_delta[0];
7888
7889 cmd.DW7.ModeLFDelta1 = picParams->mode_lf_delta[1];
7890 cmd.DW7.ModeLFDelta2 = picParams->mode_lf_delta[2];
7891 cmd.DW7.ModeLFDelta3 = picParams->mode_lf_delta[3];
7892 cmd.DW7.MCFilterSelect = picParams->version > 0 ? 1 : 0;
7893 cmd.DW7.ChromaFullPixelMCFilterMode = picParams->version < 3 ? 0 : 1;
7894 cmd.DW7.MaxNumPakPasses = m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses(); // Multi-Pass BRC
7895 cmd.DW7.ForcedTokenSurfaceRead = 1;
7896
7897 cmd.DW7.ModecostEnableFlag = 1;
7898 cmd.DW8.NumTLevels = seqParams->NumTemporalLayersMinus1 + 1;
7899 cmd.DW8.TemporalLayerID = picParams->temporal_id;
7900
7901 cmd.DW12.HistogramBTI = CODECHAL_VP8_MPU_FHB_HISTOGRAM_G9;
7902 cmd.DW13.ReferenceModeProbabilityBTI = CODECHAL_VP8_MPU_FHB_REF_MODE_PROBABILITY_G9;
7903 cmd.DW14.ModeProbabilityBTI = CODECHAL_VP8_MPU_FHB_CURR_MODE_PROBABILITY_G9;
7904 cmd.DW15.ReferenceTokenProbabilityBTI = CODECHAL_VP8_MPU_FHB_REF_TOKEN_PROBABILITY_G9;
7905 cmd.DW16.TokenProbabilityBTI = CODECHAL_VP8_MPU_FHB_CURR_TOKEN_PROBABILITY_G9;
7906 cmd.DW17.FrameHeaderBitstreamBTI = CODECHAL_VP8_MPU_FHB_HEADER_BITSTREAM_G9;
7907 cmd.DW18.HeaderMetaDataBTI = CODECHAL_VP8_MPU_FHB_HEADER_METADATA_G9;
7908 cmd.DW19.PictureStateBTI = CODECHAL_VP8_MPU_FHB_PICTURE_STATE_G9;
7909 cmd.DW20.MPUBitStreamBTI = CODECHAL_VP8_MPU_FHB_MPU_BITSTREAM_G9;
7910 cmd.DW21.TokenBitsDataBTI = CODECHAL_VP8_MPU_FHB_TOKEN_BITS_DATA_TABLE_G9;
7911 cmd.DW22.KernelDebugDumpBTI = CODECHAL_VP8_MPU_FHB_VME_DEBUG_STREAMOUT_G9;
7912 cmd.DW23.EntropyCostBTI = CODECHAL_VP8_MPU_FHB_ENTROPY_COST_TABLE_G9;
7913 cmd.DW24.ModeCostUpdateBTI = CODECHAL_VP8_MPU_MODE_COST_UPDATE_G9;
7914
7915 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mpuKernelState.m_dshRegion.AddData(
7916 &cmd,
7917 m_mpuKernelState.dwCurbeOffset,
7918 sizeof(cmd)));
7919
7920 return status;
7921 }
7922
SendMpuSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8MpuSurfaceParams * params)7923 MOS_STATUS CodechalEncodeVp8G9::SendMpuSurfaces(
7924 PMOS_COMMAND_BUFFER cmdBuffer,
7925 struct CodechalVp8MpuSurfaceParams* params)
7926 {
7927 uint32_t size;
7928 PMHW_KERNEL_STATE kernelState;
7929 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
7930 struct CodechalBindingTableVp8Mpu* vp8MpuBindingTable;
7931 MOS_STATUS status = MOS_STATUS_SUCCESS;
7932
7933 CODECHAL_ENCODE_FUNCTION_ENTER;
7934
7935 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
7936 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7937 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7938
7939 kernelState = params->pKernelState;
7940 vp8MpuBindingTable = &m_mpuBindingTable;
7941
7942 // Histogram
7943 size = params->dwHistogramSize;
7944 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7945 surfaceCodecParams.dwSize = size;
7946 surfaceCodecParams.presBuffer = params->presHistogram;
7947 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuHistogram;
7948 surfaceCodecParams.bRenderTarget = true;
7949 surfaceCodecParams.bRawSurface = true;
7950 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7951 m_hwInterface,
7952 cmdBuffer,
7953 &surfaceCodecParams,
7954 kernelState));
7955
7956 // Reference mode probability
7957 size = params->dwModeProbabilitySize;
7958 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7959 surfaceCodecParams.dwSize = size;
7960 surfaceCodecParams.presBuffer = params->presRefModeProbability;
7961 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuReferenceModeProbability;
7962 surfaceCodecParams.bRenderTarget = true;
7963 surfaceCodecParams.bRawSurface = true;
7964 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7965 m_hwInterface,
7966 cmdBuffer,
7967 &surfaceCodecParams,
7968 kernelState));
7969
7970 // Mode probability
7971 size = params->dwModeProbabilitySize;
7972 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7973 surfaceCodecParams.dwSize = size;
7974 //surfaceCodecParams.bMediaBlockRW = true;
7975 surfaceCodecParams.presBuffer = params->presModeProbability;
7976 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuModeProbability;
7977 surfaceCodecParams.bRenderTarget = true;
7978 surfaceCodecParams.bRawSurface = true;
7979 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7980 m_hwInterface,
7981 cmdBuffer,
7982 &surfaceCodecParams,
7983 kernelState));
7984
7985 // Reference Token probability
7986 size = params->dwTokenProbabilitySize;
7987 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7988 surfaceCodecParams.dwSize = size;
7989 //surfaceCodecParams.bMediaBlockRW = true;
7990 surfaceCodecParams.presBuffer = params->presRefTokenProbability;
7991 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuReferenceTokenProbability;
7992 surfaceCodecParams.bRenderTarget = true;
7993 surfaceCodecParams.bRawSurface = true;
7994 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7995 m_hwInterface,
7996 cmdBuffer,
7997 &surfaceCodecParams,
7998 kernelState));
7999
8000 // Token probability
8001 size = params->dwTokenProbabilitySize;
8002 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8003 surfaceCodecParams.dwSize = size;
8004 //surfaceCodecParams.bMediaBlockRW = true;
8005 surfaceCodecParams.presBuffer = params->presTokenProbability;
8006 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuTokenProbability;
8007 surfaceCodecParams.bRenderTarget = true;
8008 surfaceCodecParams.bRawSurface = true;
8009 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8010 m_hwInterface,
8011 cmdBuffer,
8012 &surfaceCodecParams,
8013 kernelState));
8014
8015 // Frame header
8016 size = params->dwFrameHeaderSize;
8017 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8018 surfaceCodecParams.dwSize = size;
8019 //surfaceCodecParams.bMediaBlockRW = true;
8020 surfaceCodecParams.presBuffer = params->presFrameHeader;
8021 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuFrameHeaderBitstream;
8022 surfaceCodecParams.bRenderTarget = true;
8023 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8024 m_hwInterface,
8025 cmdBuffer,
8026 &surfaceCodecParams,
8027 kernelState));
8028
8029 // Header Metadata
8030 size = params->dwHeaderMetadataSize;
8031 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8032 surfaceCodecParams.dwSize = size;
8033 surfaceCodecParams.dwOffset = params->dwHeaderMetaDataOffset;
8034 //surfaceCodecParams.bMediaBlockRW = true;
8035 surfaceCodecParams.presBuffer = params->presHeaderMetadata;
8036 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuHeaderMetaData;
8037 surfaceCodecParams.bRenderTarget = true;
8038 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8039 m_hwInterface,
8040 cmdBuffer,
8041 &surfaceCodecParams,
8042 kernelState));
8043
8044 // Picture state
8045 size = mhw_vdbox_mfx_g9_kbl::MFX_VP8_PIC_STATE_CMD::byteSize;
8046 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8047 surfaceCodecParams.dwSize = size;
8048 surfaceCodecParams.presBuffer = params->presPictureState;
8049 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuPictureState;
8050 surfaceCodecParams.bRenderTarget = true;
8051 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8052 m_hwInterface,
8053 cmdBuffer,
8054 &surfaceCodecParams,
8055 kernelState));
8056
8057 // Mpu Bitstream
8058 size = params->dwMpuBitstreamSize;
8059 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8060 surfaceCodecParams.dwSize = size;
8061 //surfaceCodecParams.bMediaBlockRW = true;
8062 surfaceCodecParams.presBuffer = params->presMpuBitstream;
8063 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuMpuBitstream;
8064 surfaceCodecParams.bRenderTarget = true;
8065 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8066 m_hwInterface,
8067 cmdBuffer,
8068 &surfaceCodecParams,
8069 kernelState));
8070
8071 // Token bits Data Surface
8072 size = params->dwTokenBitsDataSize;
8073 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8074 surfaceCodecParams.dwSize = size;
8075 surfaceCodecParams.presBuffer = params->presTokenBitsData;
8076 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuTokenBitsData;
8077 surfaceCodecParams.bRenderTarget = true;
8078 surfaceCodecParams.bRawSurface = true;
8079 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8080 m_hwInterface,
8081 cmdBuffer,
8082 &surfaceCodecParams,
8083 kernelState));
8084
8085 // Entropy cost table
8086 size = params->dwEntropyCostTableSize;
8087 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8088 surfaceCodecParams.dwSize = size;
8089 //surfaceCodecParams.bMediaBlockRW = true;
8090 surfaceCodecParams.presBuffer = params->presEntropyCostTable;
8091 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuEntropyCost;
8092 surfaceCodecParams.bRenderTarget = true;
8093 surfaceCodecParams.bRawSurface = true;
8094 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8095 m_hwInterface,
8096 cmdBuffer,
8097 &surfaceCodecParams,
8098 kernelState));
8099
8100 //Mode Cost Update Surface
8101 size = sizeof(uint32_t)* 16;
8102 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8103 surfaceCodecParams.dwSize = size;
8104 surfaceCodecParams.presBuffer = params->presModeCostUpdateBuffer;
8105 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuModeCostUpdateSurface;
8106 surfaceCodecParams.bRenderTarget = true;
8107 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8108 m_hwInterface,
8109 cmdBuffer,
8110 &surfaceCodecParams,
8111 kernelState));
8112
8113 // Kernel Debug Dump surface
8114 if (params->bVMEKernelDump)
8115 {
8116 size = params->dwKernelDumpSize;
8117 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8118 surfaceCodecParams.presBuffer = params->presVmeKernelDumpBuffer;
8119 surfaceCodecParams.dwSize = size;
8120 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuKernelDebugDump;
8121 surfaceCodecParams.bRenderTarget = true;
8122 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8123 m_hwInterface,
8124 cmdBuffer,
8125 &surfaceCodecParams,
8126 kernelState));
8127 }
8128
8129 return status;
8130 }
8131
SetTpuCurbe(struct CodechalVp8TpuCurbeParams * params)8132 MOS_STATUS CodechalEncodeVp8G9::SetTpuCurbe(struct CodechalVp8TpuCurbeParams* params)
8133 {
8134 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
8135 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
8136 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
8137 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
8138 struct MediaObjectVp8TpuFhbStaticDataG9 cmd;
8139 MOS_STATUS status = MOS_STATUS_SUCCESS;
8140
8141 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
8142 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
8143 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
8144 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
8145 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
8146
8147 stateHeapInterface =
8148 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
8149 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
8150
8151 picParams = params->pPicParams;
8152 seqParams = params->pSeqParams;
8153 vp8QuantData = params->pVp8QuantData;
8154
8155 MOS_ZeroMemory(&cmd, sizeof(cmd));
8156
8157 cmd.DW0.MBsInFrame = (uint32_t)params->wPicWidthInMb * (uint32_t)params->wFieldFrameHeightInMb;
8158
8159 cmd.DW1.FrameType = picParams->frame_type;
8160 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
8161 cmd.DW1.RebinarizationFrameHdr = (params->bRebinarizationFrameHdr ? 1 : 0);
8162
8163 cmd.DW1.RefreshEntropyP = picParams->refresh_entropy_probs;
8164 cmd.DW1.MBNoCoeffiscientSkip = picParams->mb_no_coeff_skip;
8165
8166 cmd.DW3.MaxQP = picParams->ClampQindexHigh;
8167 cmd.DW3.MinQP = picParams->ClampQindexLow;
8168
8169 cmd.DW4.LoopFilterLevelSegment0 = picParams->loop_filter_level[0];
8170 cmd.DW4.LoopFilterLevelSegment1 = picParams->loop_filter_level[1];
8171 cmd.DW4.LoopFilterLevelSegment2 = picParams->loop_filter_level[2];
8172 cmd.DW4.LoopFilterLevelSegment3 = picParams->loop_filter_level[3];
8173
8174 cmd.DW5.QuantizationIndexSegment0 = vp8QuantData->QIndex[0];
8175 cmd.DW5.QuantizationIndexSegment1 = vp8QuantData->QIndex[1];
8176 cmd.DW5.QuantizationIndexSegment2 = vp8QuantData->QIndex[2];
8177 cmd.DW5.QuantizationIndexSegment3 = vp8QuantData->QIndex[3];
8178
8179 // This setup is only used for CQP = 1 << 8 (15:8 bits)
8180 // For BRC, this will be overwritten after Pak execution
8181 cmd.DW6.PakPassNum = m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses() << 8;
8182
8183 if (params->bAdaptiveRePak)
8184 {
8185 cmd.DW7.SkipCostDeltaThreshold = 100;
8186 cmd.DW7.TokenCostDeltaThreshold = 50;
8187 }
8188 else
8189 {
8190 cmd.DW7.SkipCostDeltaThreshold = 0; // change to 1 when temporal scalability is enabled
8191 cmd.DW7.TokenCostDeltaThreshold = 0; // change to 1 when temporal scalability is enabled
8192 }
8193
8194 cmd.DW12.PakTokenStatisticsBTI = CODECHAL_VP8_TPU_FHB_PAK_TOKEN_STATISTICS_G9;
8195 cmd.DW13.TokenUpdateFlagsBTI = CODECHAL_VP8_TPU_FHB_TOKEN_UPDATE_FLAGS_G9;
8196 cmd.DW14.EntropyCostTableBTI = CODECHAL_VP8_TPU_FHB_ENTROPY_COST_TABLE_G9;
8197 cmd.DW15.FrameHeaderBitstreamBTI = CODECHAL_VP8_TPU_FHB_HEADER_BITSTREAM_G9;
8198 cmd.DW16.DefaultTokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_DEFAULT_TOKEN_PROBABILITY_G9;
8199 cmd.DW17.PictureStateBTI = CODECHAL_VP8_TPU_FHB_PICTURE_STATE_G9;
8200 cmd.DW18.MpuCurbeDataBTI = CODECHAL_VP8_TPU_FHB_MPU_CURBE_DATA_G9;
8201 cmd.DW19.HeaderMetaDataBTI = CODECHAL_VP8_TPU_FHB_HEADER_METADATA_G9;
8202 cmd.DW20.TokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_TOKEN_PROBABILITY_G9;
8203 cmd.DW21.PakHardwareTokenProbabilityPass1BTI = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS1_PROBABILITY_G9;
8204 cmd.DW22.KeyFrameTokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_KEY_TOKEN_PROBABILITY_G9;
8205 cmd.DW23.UpdatedTokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_UPDATED_TOKEN_PROBABILITY_G9;
8206 cmd.DW24.PakHardwareTokenProbabilityPass2BTI = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS2_PROBABILITY_G9;
8207 cmd.DW25.KernelDebugDumpBTI = CODECHAL_VP8_TPU_FHB_VME_DEBUG_STREAMOUT_G9;
8208 cmd.DW26.RepakDecisionSurfaceBTI = CODECHAL_VP8_TPU_FHB_REPAK_DECISION_G9;
8209
8210 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_tpuKernelState.m_dshRegion.AddData(
8211 &cmd,
8212 m_tpuKernelState.dwCurbeOffset,
8213 sizeof(cmd)));
8214
8215 return status;
8216 }
8217
CalMaxLevelRatioForTL(uint16_t * framesPer100Sec,uint32_t * targetBitRate,uint32_t numTemporalLayersMinus1,uint32_t * tempBitRate)8218 MOS_STATUS CodechalEncodeVp8G9::CalMaxLevelRatioForTL(
8219 uint16_t *framesPer100Sec,
8220 uint32_t *targetBitRate,
8221 uint32_t numTemporalLayersMinus1,
8222 uint32_t *tempBitRate)
8223 {
8224 MOS_STATUS status = MOS_STATUS_SUCCESS;
8225
8226 CODECHAL_ENCODE_FUNCTION_ENTER;
8227
8228 uint32_t ti, tj;
8229 uint32_t numLevel[NAX_NUM_TEMPORAL_LAYERS];
8230 uint32_t atempRatios[NAX_NUM_TEMPORAL_LAYERS];
8231 int acculateTempBitRate;
8232
8233 for( ti= 0;ti < numTemporalLayersMinus1+1;ti++)
8234 {
8235 atempRatios[ti]= (uint32_t)framesPer100Sec[numTemporalLayersMinus1]/(uint32_t)framesPer100Sec[ti]; // it should be integer
8236 }
8237
8238 for( ti=0; ti < numTemporalLayersMinus1+1; ti++){
8239 numLevel[ti]= 0;
8240 for( tj=0; tj < atempRatios[0]; tj++)
8241 {
8242 if(tj%atempRatios[ti]==0)
8243 numLevel[ti] += 1; // ratio of framerate
8244 }
8245 }
8246
8247 tempBitRate[0]= targetBitRate[0]*64/targetBitRate[numTemporalLayersMinus1];
8248
8249 acculateTempBitRate= tempBitRate[0];
8250 for (ti=1; ti < (uint32_t)numTemporalLayersMinus1; ti++)
8251 {
8252 tempBitRate[ti]= (targetBitRate[ti] - targetBitRate[ti-1])*64/targetBitRate[numTemporalLayersMinus1];
8253 acculateTempBitRate += tempBitRate[ti];
8254 }
8255
8256 tempBitRate[numTemporalLayersMinus1]= 64-acculateTempBitRate; // The sum of tempBitRate must be 64 because this will affect the QP directly
8257
8258 for( ti=0; ti<numTemporalLayersMinus1+1; ti++)
8259 {
8260 int tem_level;
8261 if(ti==0)
8262 tem_level = numLevel[0];
8263 else
8264 tem_level = numLevel[ti] - numLevel[ti - 1];
8265
8266 tempBitRate[ti] = atempRatios[0] * tempBitRate[ti]/tem_level;
8267 }
8268
8269 return status;
8270 }
8271