1 /* 2 * Copyright (c) 2014-2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_hw_g8_X.h 24 //! \brief This modules implements HW interface layer to be used on gen8 platforms on all operating systems/DDIs, across CODECHAL components. 25 //! 26 #ifndef __CODECHAL_HW_G8_X_H__ 27 #define __CODECHAL_HW_G8_X_H__ 28 29 #include "codechal_hw.h" 30 #include "mhw_mi_hwcmd_g8_X.h" 31 #include "mhw_render_hwcmd_g8_X.h" 32 33 //! Codechal hw interface Gen8 34 /*! 35 This class defines the interfaces for hardware dependent settings and functions used in Codechal for Gen8 platforms 36 */ 37 class CodechalHwInterfaceG8 : public CodechalHwInterface 38 { 39 protected: 40 static const CODECHAL_SSEU_SETTING m_defaultSsEuLutG8[CODECHAL_NUM_MEDIA_STATES]; 41 42 public: 43 //! 44 //! \brief Constructor 45 //! CodechalHwInterfaceG8(PMOS_INTERFACE osInterface,CODECHAL_FUNCTION codecFunction,MhwInterfaces * mhwInterfaces)46 CodechalHwInterfaceG8( 47 PMOS_INTERFACE osInterface, 48 CODECHAL_FUNCTION codecFunction, 49 MhwInterfaces *mhwInterfaces) 50 : CodechalHwInterface(osInterface, codecFunction, mhwInterfaces) 51 { 52 CODECHAL_HW_FUNCTION_ENTER; 53 54 m_checkTargetCache = true; 55 InitCacheabilityControlSettings(codecFunction); 56 57 m_sizeOfCmdBatchBufferEnd = mhw_mi_g8_X::MI_BATCH_BUFFER_END_CMD::byteSize; 58 59 // Slice Shutdown Threshold 60 m_ssdResolutionThreshold = m_sliceShutdownAvcResolutionThreshold; 61 m_ssdTargetUsageThreshold = m_sliceShutdownAvcTargetUsageThreshold; 62 m_mpeg2SSDResolutionThreshold = m_sliceShutdownMpeg2ResolutionThreshold; 63 64 if (osInterface->bEnableVdboxBalancing) 65 { 66 bEnableVdboxBalancingbyUMD = true; 67 } 68 m_noHuC = true; 69 70 m_maxKernelLoadCmdSize = 71 mhw_mi_g8_X::PIPE_CONTROL_CMD::byteSize + 72 mhw_render_g8_X::PIPELINE_SELECT_CMD::byteSize + 73 mhw_render_g8_X::MEDIA_OBJECT_CMD::byteSize + 74 mhw_render_g8_X::STATE_BASE_ADDRESS_CMD::byteSize + 75 mhw_render_g8_X::MEDIA_VFE_STATE_CMD::byteSize + 76 mhw_render_g8_X::MEDIA_CURBE_LOAD_CMD::byteSize + 77 mhw_render_g8_X::MEDIA_INTERFACE_DESCRIPTOR_LOAD_CMD::byteSize + 78 mhw_mi_g8_X::MI_BATCH_BUFFER_START_CMD::byteSize + 79 mhw_render_g8_X::MEDIA_OBJECT_WALKER_CMD::byteSize + 80 mhw_mi_g8_X::MI_STORE_DATA_IMM_CMD::byteSize; 81 82 m_maxKernelLoadCmdSize += mhw_mi_g8_X::MI_STORE_DATA_IMM_CMD::byteSize + 83 mhw_mi_g8_X::MEDIA_STATE_FLUSH_CMD::byteSize; 84 85 m_sizeOfCmdMediaObject = mhw_render_g8_X::MEDIA_OBJECT_CMD::byteSize; 86 m_sizeOfCmdMediaStateFlush = mhw_mi_g8_X::MEDIA_STATE_FLUSH_CMD::byteSize; 87 88 m_noSeparateL3LlcCacheabilitySettings = true; 89 } 90 91 //! 92 //! \brief Destructor 93 //! ~CodechalHwInterfaceG8()94 virtual ~CodechalHwInterfaceG8() {} 95 }; 96 97 #endif // __CODECHAL_HW_G8_X_H__ 98