1 /* 2 * Copyright (c) 2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_kernel_hme_g11.h 24 //! \brief Hme kernel implementation for Gen11 platform 25 //! 26 #ifndef __CODECHAL_KERNEL_HME_G11_H__ 27 #define __CODECHAL_KERNEL_HME_G11_H__ 28 #include "codechal_kernel_hme.h" 29 30 class CodechalKernelHmeG11 : public CodechalKernelHme 31 { 32 public: 33 enum KernelIndex 34 { 35 hmeP = 0, 36 hmeB = 1, 37 hmeVDEncStreamIn = 2, 38 hmeVDEncHevcVp9StreamIn = 3 39 }; 40 41 enum BindingTableOffset 42 { 43 meOutputMvDataSurface = 0, 44 meInputMvDataSurface = 1, 45 meDistortionSurface = 2, 46 meBrcDistortion = 3, 47 meCurrForFwdRef = 5, 48 meFwdRefIdx0 = 6, 49 meFwdRefIdx1 = 8, 50 meFwdRefIdx2 = 10, 51 meFwdRefIdx3 = 12, 52 meFwdRefIdx4 = 14, 53 meFwdRefIdx5 = 16, 54 meFwdRefIdx6 = 18, 55 meFwdRefIdx7 = 20, 56 meCurrForBwdRef = 22, 57 meBwdRefIdx0 = 23, 58 meBwdRefIdx1 = 25, 59 meVdencStreamInOutputBuffer = 26, 60 meVdencStreamInInputBuffer = 27, 61 meSumMvandDistortionBuffer = 28, 62 meSurfaceNum = 29 63 }; 64 65 // clang-format off 66 class Curbe 67 { 68 public: Curbe()69 Curbe() 70 { 71 MOS_SecureMemcpy(&m_data, sizeof(m_data), &m_initCurbe, sizeof(m_initCurbe)); 72 } 73 struct CurbeData 74 { 75 // DW0 76 union 77 { 78 struct 79 { 80 uint32_t SkipModeEn : MOS_BITFIELD_BIT(0); 81 uint32_t AdaptiveEn : MOS_BITFIELD_BIT(1); 82 uint32_t BiMixDis : MOS_BITFIELD_BIT(2); 83 uint32_t reserved3 : MOS_BITFIELD_RANGE(3, 4); 84 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT(5); 85 uint32_t reserved6 : MOS_BITFIELD_BIT(6); 86 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT(7); 87 uint32_t reserved8 : MOS_BITFIELD_RANGE(8, 23); 88 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE(24, 31); 89 }; 90 uint32_t Value; 91 } DW0; 92 // DW1 93 union 94 { 95 struct 96 { 97 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE(0, 5); 98 uint32_t reserved6 : MOS_BITFIELD_RANGE(6, 15); 99 uint32_t BiWeight : MOS_BITFIELD_RANGE(16, 21); 100 uint32_t reserved22 : MOS_BITFIELD_RANGE(22, 27); 101 uint32_t UniMixDisable : MOS_BITFIELD_BIT(28); 102 uint32_t reserved29 : MOS_BITFIELD_RANGE(29, 31); 103 }; 104 uint32_t Value; 105 } DW1; 106 // DW2 107 union 108 { 109 struct 110 { 111 uint32_t MaxLenSP : MOS_BITFIELD_RANGE(0, 7); 112 uint32_t MaxNumSU : MOS_BITFIELD_RANGE(8, 15); 113 uint32_t reserved16 : MOS_BITFIELD_RANGE(16, 31); 114 }; 115 uint32_t Value; 116 } DW2; 117 // DW3 118 union 119 { 120 struct 121 { 122 uint32_t SrcSize : MOS_BITFIELD_RANGE(0, 1); 123 uint32_t reserved2 : MOS_BITFIELD_RANGE(2, 3); 124 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE(4, 5); 125 uint32_t SrcAccess : MOS_BITFIELD_BIT(6); 126 uint32_t RefAccess : MOS_BITFIELD_BIT(7); 127 uint32_t SearchCtrl : MOS_BITFIELD_RANGE(8, 10); 128 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT(11); 129 uint32_t SubPelMode : MOS_BITFIELD_RANGE(12, 13); 130 uint32_t SkipType : MOS_BITFIELD_BIT(14); 131 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT(15); 132 uint32_t InterChromaMode : MOS_BITFIELD_BIT(16); 133 uint32_t FTEnable : MOS_BITFIELD_BIT(17); 134 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT(18); 135 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT(19); 136 uint32_t InterSAD : MOS_BITFIELD_RANGE(20, 21); 137 uint32_t IntraSAD : MOS_BITFIELD_RANGE(22, 23); 138 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE(24, 30); 139 uint32_t reserved31 : MOS_BITFIELD_BIT(31); 140 }; 141 uint32_t Value; 142 } DW3; 143 // DW4 144 union 145 { 146 struct 147 { 148 uint32_t reserved0 : MOS_BITFIELD_RANGE(0, 7); 149 uint32_t PictureHeightMinus1 : MOS_BITFIELD_RANGE(8, 15); 150 uint32_t PictureWidth : MOS_BITFIELD_RANGE(16, 23); 151 uint32_t reserved24 : MOS_BITFIELD_RANGE(24, 31); 152 }; 153 uint32_t Value; 154 } DW4; 155 // DW5 156 union 157 { 158 struct 159 { 160 uint32_t SumMVThreshold : MOS_BITFIELD_RANGE(0, 7); 161 uint32_t QpPrimeY : MOS_BITFIELD_RANGE(8, 15); 162 uint32_t RefWidth : MOS_BITFIELD_RANGE(16, 23); 163 uint32_t RefHeight : MOS_BITFIELD_RANGE(24, 31); 164 }; 165 uint32_t Value; 166 } DW5; 167 // DW6 168 union 169 { 170 struct 171 { 172 uint32_t reserved0 : MOS_BITFIELD_BIT(0); 173 uint32_t InputStreamInEn : MOS_BITFIELD_BIT(1); 174 uint32_t LCUSize : MOS_BITFIELD_BIT(2); 175 uint32_t WriteDistortions : MOS_BITFIELD_BIT(3); 176 uint32_t UseMvFromPrevStep : MOS_BITFIELD_BIT(4); 177 uint32_t BRCEnable : MOS_BITFIELD_BIT(5); 178 uint32_t reserved5 : MOS_BITFIELD_RANGE(6, 7); 179 uint32_t SuperCombineDist : MOS_BITFIELD_RANGE(8, 15); 180 uint32_t MaxVmvR : MOS_BITFIELD_RANGE(16, 31); 181 }; 182 uint32_t Value; 183 } DW6; 184 // DW7 185 union 186 { 187 struct 188 { 189 uint32_t reserved0 : MOS_BITFIELD_RANGE(0, 15); 190 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE(16, 17); 191 uint32_t BilinearEnable : MOS_BITFIELD_BIT(18); 192 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT(19); 193 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT(20); 194 uint32_t AConlyHAAR : MOS_BITFIELD_BIT(21); 195 uint32_t RefIDCostMode : MOS_BITFIELD_BIT(22); 196 uint32_t reserved23 : MOS_BITFIELD_BIT(23); 197 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE(24, 31); 198 }; 199 uint32_t Value; 200 } DW7; 201 // DW8 202 union 203 { 204 struct 205 { 206 uint32_t Mode0Cost : MOS_BITFIELD_RANGE(0, 7); 207 uint32_t Mode1Cost : MOS_BITFIELD_RANGE(8, 15); 208 uint32_t Mode2Cost : MOS_BITFIELD_RANGE(16, 23); 209 uint32_t Mode3Cost : MOS_BITFIELD_RANGE(24, 31); 210 }; 211 uint32_t Value; 212 } DW8; 213 // DW9 214 union 215 { 216 struct 217 { 218 uint32_t Mode4Cost : MOS_BITFIELD_RANGE(0, 7); 219 uint32_t Mode5Cost : MOS_BITFIELD_RANGE(8, 15); 220 uint32_t Mode6Cost : MOS_BITFIELD_RANGE(16, 23); 221 uint32_t Mode7Cost : MOS_BITFIELD_RANGE(24, 31); 222 }; 223 uint32_t Value; 224 } DW9; 225 // DW10 226 union 227 { 228 struct 229 { 230 uint32_t Mode8Cost : MOS_BITFIELD_RANGE(0, 7); 231 uint32_t Mode9Cost : MOS_BITFIELD_RANGE(8, 15); 232 uint32_t RefIDCost : MOS_BITFIELD_RANGE(16, 23); 233 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE(24, 31); 234 }; 235 uint32_t Value; 236 } DW10; 237 // DW11 238 union 239 { 240 struct 241 { 242 uint32_t MV0Cost : MOS_BITFIELD_RANGE(0, 7); 243 uint32_t MV1Cost : MOS_BITFIELD_RANGE(8, 15); 244 uint32_t MV2Cost : MOS_BITFIELD_RANGE(16, 23); 245 uint32_t MV3Cost : MOS_BITFIELD_RANGE(24, 31); 246 }; 247 uint32_t Value; 248 } DW11; 249 // DW12 250 union 251 { 252 struct 253 { 254 uint32_t MV4Cost : MOS_BITFIELD_RANGE(0, 7); 255 uint32_t MV5Cost : MOS_BITFIELD_RANGE(8, 15); 256 uint32_t MV6Cost : MOS_BITFIELD_RANGE(16, 23); 257 uint32_t MV7Cost : MOS_BITFIELD_RANGE(24, 31); 258 }; 259 uint32_t Value; 260 } DW12; 261 // DW13 262 union 263 { 264 struct 265 { 266 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE(0, 7); 267 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE(8, 15); 268 uint32_t RefStreaminCost : MOS_BITFIELD_RANGE(16, 23); 269 uint32_t ROIEnable : MOS_BITFIELD_RANGE(24, 26); 270 uint32_t reserved27 : MOS_BITFIELD_RANGE(27, 31); 271 }; 272 uint32_t Value; 273 } DW13; 274 // DW14 275 union 276 { 277 struct 278 { 279 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT(0); 280 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT(1); 281 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT(2); 282 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT(3); 283 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT(4); 284 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT(5); 285 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT(6); 286 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT(7); 287 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT(8); 288 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT(9); 289 uint32_t reserved10 : MOS_BITFIELD_RANGE(10, 31); 290 }; 291 uint32_t Value; 292 } DW14; 293 // DW15 294 union 295 { 296 struct 297 { 298 uint32_t PrevMvReadPosFactor : MOS_BITFIELD_RANGE(0, 7); 299 uint32_t MvShiftFactor : MOS_BITFIELD_RANGE(8, 15); 300 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 31); 301 }; 302 uint32_t Value; 303 } DW15; 304 305 struct 306 { 307 // DW16 308 union 309 { 310 struct 311 { 312 SearchPathDelta SPDelta_0; 313 SearchPathDelta SPDelta_1; 314 SearchPathDelta SPDelta_2; 315 SearchPathDelta SPDelta_3; 316 }; 317 uint32_t Value; 318 } DW16; 319 // DW17 320 union 321 { 322 struct 323 { 324 SearchPathDelta SPDelta_4; 325 SearchPathDelta SPDelta_5; 326 SearchPathDelta SPDelta_6; 327 SearchPathDelta SPDelta_7; 328 }; 329 uint32_t Value; 330 } DW17; 331 // DW18 332 union 333 { 334 struct 335 { 336 SearchPathDelta SPDelta_8; 337 SearchPathDelta SPDelta_9; 338 SearchPathDelta SPDelta_10; 339 SearchPathDelta SPDelta_11; 340 }; 341 uint32_t Value; 342 } DW18; 343 // DW19 344 union 345 { 346 struct 347 { 348 SearchPathDelta SPDelta_12; 349 SearchPathDelta SPDelta_13; 350 SearchPathDelta SPDelta_14; 351 SearchPathDelta SPDelta_15; 352 }; 353 uint32_t Value; 354 } DW19; 355 // DW20 356 union 357 { 358 struct 359 { 360 SearchPathDelta SPDelta_16; 361 SearchPathDelta SPDelta_17; 362 SearchPathDelta SPDelta_18; 363 SearchPathDelta SPDelta_19; 364 }; 365 uint32_t Value; 366 } DW20; 367 // DW21 368 union 369 { 370 struct 371 { 372 SearchPathDelta SPDelta_20; 373 SearchPathDelta SPDelta_21; 374 SearchPathDelta SPDelta_22; 375 SearchPathDelta SPDelta_23; 376 }; 377 uint32_t Value; 378 } DW21; 379 // DW22 380 union 381 { 382 struct 383 { 384 SearchPathDelta SPDelta_24; 385 SearchPathDelta SPDelta_25; 386 SearchPathDelta SPDelta_26; 387 SearchPathDelta SPDelta_27; 388 }; 389 uint32_t Value; 390 } DW22; 391 // DW23 392 union 393 { 394 struct 395 { 396 SearchPathDelta SPDelta_28; 397 SearchPathDelta SPDelta_29; 398 SearchPathDelta SPDelta_30; 399 SearchPathDelta SPDelta_31; 400 }; 401 uint32_t Value; 402 } DW23; 403 // DW24 404 union 405 { 406 struct 407 { 408 SearchPathDelta SPDelta_32; 409 SearchPathDelta SPDelta_33; 410 SearchPathDelta SPDelta_34; 411 SearchPathDelta SPDelta_35; 412 }; 413 uint32_t Value; 414 } DW24; 415 // DW25 416 union 417 { 418 struct 419 { 420 SearchPathDelta SPDelta_36; 421 SearchPathDelta SPDelta_37; 422 SearchPathDelta SPDelta_38; 423 SearchPathDelta SPDelta_39; 424 }; 425 uint32_t Value; 426 } DW25; 427 // DW26 428 union 429 { 430 struct 431 { 432 SearchPathDelta SPDelta_40; 433 SearchPathDelta SPDelta_41; 434 SearchPathDelta SPDelta_42; 435 SearchPathDelta SPDelta_43; 436 }; 437 uint32_t Value; 438 } DW26; 439 // DW27 440 union 441 { 442 struct 443 { 444 SearchPathDelta SPDelta_44; 445 SearchPathDelta SPDelta_45; 446 SearchPathDelta SPDelta_46; 447 SearchPathDelta SPDelta_47; 448 }; 449 uint32_t Value; 450 } DW27; 451 // DW28 452 union 453 { 454 struct 455 { 456 SearchPathDelta SPDelta_48; 457 SearchPathDelta SPDelta_49; 458 SearchPathDelta SPDelta_50; 459 SearchPathDelta SPDelta_51; 460 }; 461 uint32_t Value; 462 } DW28; 463 // DW29 464 union 465 { 466 struct 467 { 468 SearchPathDelta SPDelta_52; 469 SearchPathDelta SPDelta_53; 470 SearchPathDelta SPDelta_54; 471 SearchPathDelta SPDelta_55; 472 }; 473 uint32_t Value; 474 } DW29; 475 } SpDelta; 476 477 // DW30 478 union 479 { 480 struct 481 { 482 uint32_t ActualMBWidth : MOS_BITFIELD_RANGE(0, 15); 483 uint32_t ActualMBHeight : MOS_BITFIELD_RANGE(16, 31); 484 }; 485 uint32_t Value; 486 } DW30; 487 // DW31 488 union 489 { 490 struct 491 { 492 uint32_t RoiCtrl : MOS_BITFIELD_RANGE(0, 7); 493 uint32_t MaxTuSize : MOS_BITFIELD_RANGE(8, 9); 494 uint32_t MaxCuSize : MOS_BITFIELD_RANGE(10, 11); 495 uint32_t NumImePredictors : MOS_BITFIELD_RANGE(12, 15); 496 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 23); 497 uint32_t PuTypeCtrl : MOS_BITFIELD_RANGE(24, 31); 498 }; 499 uint32_t Value; 500 } DW31; 501 // DW32 502 union 503 { 504 struct 505 { 506 uint32_t ForceMvx0 : MOS_BITFIELD_RANGE(0, 15); 507 uint32_t ForceMvy0 : MOS_BITFIELD_RANGE(16, 31); 508 }; 509 uint32_t Value; 510 } DW32; 511 // DW33 512 union 513 { 514 struct 515 { 516 uint32_t ForceMvx1 : MOS_BITFIELD_RANGE(0, 15); 517 uint32_t ForceMvy1 : MOS_BITFIELD_RANGE(16, 31); 518 }; 519 uint32_t Value; 520 } DW33; 521 // DW34 522 union 523 { 524 struct 525 { 526 uint32_t ForceMvx2 : MOS_BITFIELD_RANGE(0, 15); 527 uint32_t ForceMvy2 : MOS_BITFIELD_RANGE(16, 31); 528 }; 529 uint32_t Value; 530 } DW34; 531 // DW35 532 union 533 { 534 struct 535 { 536 uint32_t ForceMvx3 : MOS_BITFIELD_RANGE(0, 15); 537 uint32_t ForceMvy3 : MOS_BITFIELD_RANGE(16, 31); 538 }; 539 uint32_t Value; 540 } DW35; 541 // DW36 542 union 543 { 544 struct 545 { 546 uint32_t ForceRefIdx0 : MOS_BITFIELD_RANGE(0, 3); 547 uint32_t ForceRefIdx1 : MOS_BITFIELD_RANGE(4, 7); 548 uint32_t ForceRefIdx2 : MOS_BITFIELD_RANGE(8, 11); 549 uint32_t ForceRefIdx3 : MOS_BITFIELD_RANGE(12, 15); 550 uint32_t NumMergeCandCu8x8 : MOS_BITFIELD_RANGE(16, 19); 551 uint32_t NumMergeCandCu16x16 : MOS_BITFIELD_RANGE(20, 23); 552 uint32_t NumMergeCandCu32x32 : MOS_BITFIELD_RANGE(24, 27); 553 uint32_t NumMergeCandCu64x64 : MOS_BITFIELD_RANGE(28, 31); 554 }; 555 uint32_t Value; 556 } DW36; 557 // DW37 558 union 559 { 560 struct 561 { 562 uint32_t SegID : MOS_BITFIELD_RANGE(0, 15); 563 uint32_t QpEnable : MOS_BITFIELD_RANGE(16, 19); 564 uint32_t SegIDEnable : MOS_BITFIELD_BIT(20); 565 uint32_t Reserved : MOS_BITFIELD_RANGE(21, 22); 566 uint32_t ForceRefIdEnable : MOS_BITFIELD_BIT(23); 567 uint32_t Reserved1 : MOS_BITFIELD_RANGE(24, 31); 568 }; 569 uint32_t Value; 570 } DW37; 571 // DW38 572 union 573 { 574 struct 575 { 576 uint32_t ForceQp0 : MOS_BITFIELD_RANGE(0, 7); 577 uint32_t ForceQp1 : MOS_BITFIELD_RANGE(8, 15); 578 uint32_t ForceQp2 : MOS_BITFIELD_RANGE(16, 23); 579 uint32_t ForceQp3 : MOS_BITFIELD_RANGE(24, 31); 580 }; 581 uint32_t Value; 582 } DW38; 583 // DW39 584 union 585 { 586 struct 587 { 588 uint32_t Reserved; 589 }; 590 uint32_t Value; 591 } DW39; 592 // DW40 593 union 594 { 595 struct 596 { 597 uint32_t _4xMeMvOutputDataSurfIndex; 598 }; 599 uint32_t Value; 600 } DW40; 601 // DW41 602 union 603 { 604 struct 605 { 606 uint32_t _16xOr32xMeMvInputDataSurfIndex; 607 }; 608 uint32_t Value; 609 } DW41; 610 // DW42 611 union 612 { 613 struct 614 { 615 uint32_t _4xMeOutputDistSurfIndex; 616 }; 617 uint32_t Value; 618 } DW42; 619 // DW43 620 union 621 { 622 struct 623 { 624 uint32_t _4xMeOutputBrcDistSurfIndex; 625 }; 626 uint32_t Value; 627 } DW43; 628 // DW44 629 union 630 { 631 struct 632 { 633 uint32_t VMEFwdInterPredictionSurfIndex; 634 }; 635 uint32_t Value; 636 } DW44; 637 // DW45 638 union 639 { 640 struct 641 { 642 uint32_t VMEBwdInterPredictionSurfIndex; 643 }; 644 uint32_t Value; 645 } DW45; 646 // DW46 647 union 648 { 649 struct 650 { 651 uint32_t VDEncStreamInOutputSurfIndex; 652 }; 653 uint32_t Value; 654 } DW46; 655 // DW47 656 union 657 { 658 struct 659 { 660 uint32_t VDEncStreamInInputSurfIndex; 661 }; 662 uint32_t Value; 663 } DW47; 664 // DW48 665 union 666 { 667 struct 668 { 669 uint32_t SumMVandDistortionOutputSurfIndex; 670 }; 671 uint32_t Value; 672 } DW48; 673 } m_data; 674 675 static const uint32_t m_curbeSize = sizeof(CurbeData); 676 static const uint32_t m_initCurbe[49]; 677 }; 678 // clang-format on 679 680 public: 681 //! 682 //! \brief Constructor 683 //! 684 //! \param [in] me4xDistBufferSupported 685 //! flag to support 4x Distortion buffer 686 //! 687 CodechalKernelHmeG11( 688 CodechalEncoderState *encoder, 689 bool me4xDistBufferSupported = true); 690 GetBTCount()691 uint32_t GetBTCount() override { return BindingTableOffset::meSurfaceNum; } 692 693 protected: GetCurbeSize()694 uint32_t GetCurbeSize() override { return Curbe::m_curbeSize; } 695 MOS_STATUS SetCurbe(MHW_KERNEL_STATE *kernelState) override; 696 MOS_STATUS SendSurfaces(PMOS_COMMAND_BUFFER cmd, MHW_KERNEL_STATE *kernelState) override; 697 MHW_KERNEL_STATE * GetActiveKernelState() override; 698 CODECHAL_MEDIA_STATE_TYPE GetMediaStateType() override; 699 }; 700 701 #endif /* __CODECHAL_KERNEL_HME_G11_H__ */ 702