1
2 /* contrib/mips-mmi/linux.c
3 *
4 * Copyright (c) 2024 Cosmin Truta
5 * Written by guxiwei, 2023
6 *
7 * This code is released under the libpng license.
8 * For conditions of distribution and use, see the disclaimer
9 * and license in png.h
10 */
11
12 #include <stdint.h>
13 #include <stdio.h>
14 #include <string.h>
15 #include <sys/auxv.h>
16
17 /*
18 * parse_r var, r - Helper assembler macro for parsing register names.
19 *
20 * This converts the register name in $n form provided in \r to the
21 * corresponding register number, which is assigned to the variable \var. It is
22 * needed to allow explicit encoding of instructions in inline assembly where
23 * registers are chosen by the compiler in $n form, allowing us to avoid using
24 * fixed register numbers.
25 *
26 * It also allows newer instructions (not implemented by the assembler) to be
27 * transparently implemented using assembler macros, instead of needing separate
28 * cases depending on toolchain support.
29 *
30 * Simple usage example:
31 * __asm__ __volatile__("parse_r __rt, %0\n\t"
32 * ".insn\n\t"
33 * "# di %0\n\t"
34 * ".word (0x41606000 | (__rt << 16))"
35 * : "=r" (status);
36 */
37
38 /* Match an individual register number and assign to \var */
39 #define _IFC_REG(n) \
40 ".ifc \\r, $" #n "\n\t" \
41 "\\var = " #n "\n\t" \
42 ".endif\n\t"
43
44 __asm__(".macro parse_r var r\n\t"
45 "\\var = -1\n\t"
46 _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3)
47 _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7)
48 _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11)
49 _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15)
50 _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19)
51 _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23)
52 _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27)
53 _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31)
54 ".iflt \\var\n\t"
55 ".error \"Unable to parse register name \\r\"\n\t"
56 ".endif\n\t"
57 ".endm");
58
59 #define HWCAP_LOONGSON_CPUCFG (1 << 14)
60
cpucfg_available(void)61 static int cpucfg_available(void)
62 {
63 return getauxval(AT_HWCAP) & HWCAP_LOONGSON_CPUCFG;
64 }
65
strstart(const char * str,const char * pfx,const char ** ptr)66 static int strstart(const char *str, const char *pfx, const char **ptr)
67 {
68 while (*pfx && *pfx == *str) {
69 pfx++;
70 str++;
71 }
72 if (!*pfx && ptr)
73 *ptr = str;
74 return !*pfx;
75 }
76
77 /* Most toolchains have no CPUCFG support yet */
read_cpucfg(uint32_t reg)78 static uint32_t read_cpucfg(uint32_t reg)
79 {
80 uint32_t __res;
81
82 __asm__ __volatile__(
83 "parse_r __res,%0\n\t"
84 "parse_r reg,%1\n\t"
85 ".insn \n\t"
86 ".word (0xc8080118 | (reg << 21) | (__res << 11))\n\t"
87 :"=r"(__res)
88 :"r"(reg)
89 :
90 );
91 return __res;
92 }
93
94 #define LOONGSON_CFG1 0x1
95
96 #define LOONGSON_CFG1_MMI (1 << 4)
97
cpu_flags_cpucfg(void)98 static int cpu_flags_cpucfg(void)
99 {
100 int flags = 0;
101 uint32_t cfg1 = read_cpucfg(LOONGSON_CFG1);
102
103 if (cfg1 & LOONGSON_CFG1_MMI)
104 flags = 1;
105
106 return flags;
107 }
108
cpu_flags_cpuinfo(void)109 static int cpu_flags_cpuinfo(void)
110 {
111 FILE *f = fopen("/proc/cpuinfo", "r");
112 char buf[200];
113 int flags = 0;
114
115 if (!f)
116 return flags;
117
118 while (fgets(buf, sizeof(buf), f)) {
119 /* Legacy kernel may not export MMI in ASEs implemented */
120 if (strstart(buf, "cpu model", NULL)) {
121 if (strstr(buf, "Loongson-3 "))
122 flags = 1;
123 break;
124 }
125 if (strstart(buf, "ASEs implemented", NULL)) {
126 if (strstr(buf, " loongson-mmi"))
127 flags = 1;
128 break;
129 }
130 }
131 fclose(f);
132 return flags;
133 }
134
png_have_mmi()135 static int png_have_mmi()
136 {
137 if (cpucfg_available())
138 return cpu_flags_cpucfg();
139 else
140 return cpu_flags_cpuinfo();
141 return 0;
142 }
143