xref: /aosp_15_r20/external/coreboot/Documentation/mainboard/roda/rk9/flash_header.md (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c) 
1Roda RK9 Flash Header
2=====================
3
4There is a 5x2 pin, 1.27mm pitch header *J1* south of the BIOS flash. It
5follows the pinout of the Dediprog adaptor board:
6
7    +------+
8    | 1  2 |    1: HOLD 2   2: CS 2
9    | 3  4 |    3: CS 1     4: VCC
10    | 5  6 |    5: MISO     6: HOLD 1
11    | 7  8 |    7:          8: CLK
12    | 9 10 |    9: GND     10: MOSI
13    +------+
14
15Pins 3 to 10 directly map to the regular SPI flash pinout.
16
17There is also a *JP17* around. Ideally, it should be closed during
18programming (isolates the SPI bus from the southbridge):
19
20    +---+
21    | 1 |   1: SF100-I/O3
22    | 2 |   2: GND
23    +---+
24