1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#define DPTF_CPU_PASSIVE 93 4#define DPTF_CPU_CRITICAL 100 5#define DPTF_CPU_ACTIVE_AC0 90 6#define DPTF_CPU_ACTIVE_AC1 77 7 8#define DPTF_TSR0_SENSOR_ID 0 9#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" 10#define DPTF_TSR0_PASSIVE 70 11#define DPTF_TSR0_CRITICAL 83 12#define DPTF_TSR0_ACTIVE_AC0 95 13#define DPTF_TSR0_ACTIVE_AC1 85 14#define DPTF_TSR0_ACTIVE_AC2 60 15#define DPTF_TSR0_ACTIVE_AC3 52 16#define DPTF_TSR0_ACTIVE_AC4 44 17#define DPTF_TSR0_ACTIVE_AC5 38 18#define DPTF_TSR0_ACTIVE_AC6 35 19 20#define DPTF_TSR1_SENSOR_ID 1 21#define DPTF_TSR1_SENSOR_NAME "TMP432_CPU_bottom" 22#define DPTF_TSR1_PASSIVE 67 23#define DPTF_TSR1_CRITICAL 73 24 25Name (DTRT, Package () { 26 /* CPU Throttle Effect on CPU */ 27 Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, 28 29 /* CPU Effect on Temp Sensor 0 */ 30 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 100, 0, 0, 0, 0 }, 31 32 /* CPU Effect on Temp Sensor 1 */ 33 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 300, 0, 0, 0, 0 }, 34}) 35 36Name (MPPC, Package () 37{ 38 0x2, /* Revision */ 39 Package () { /* Power Limit 1 */ 40 0, /* PowerLimitIndex, 0 for Power Limit 1 */ 41 3000, /* PowerLimitMinimum */ 42 15000, /* PowerLimitMaximum */ 43 1000, /* TimeWindowMinimum */ 44 1000, /* TimeWindowMaximum */ 45 200 /* StepSize */ 46 }, 47 Package () { /* Power Limit 2 */ 48 1, /* PowerLimitIndex, 1 for Power Limit 2 */ 49 44000, /* PowerLimitMinimum */ 50 44000, /* PowerLimitMaximum */ 51 1000, /* TimeWindowMinimum */ 52 1000, /* TimeWindowMaximum */ 53 1000 /* StepSize */ 54 } 55}) 56 57/* Include DPTF */ 58#include <soc/intel/skylake/acpi/dptf/dptf.asl> 59