xref: /aosp_15_r20/external/coreboot/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#define DPTF_CPU_PASSIVE	50
4#define DPTF_CPU_CRITICAL	105
5
6#define DPTF_TSR0_SENSOR_ID	0
7#define DPTF_TSR0_SENSOR_NAME	"Thermal Sensor - Charger"
8#define DPTF_TSR0_PASSIVE	45
9#define DPTF_TSR0_CRITICAL	90
10#define DPTF_TSR0_TABLET_PASSIVE        32
11#define DPTF_TSR0_TABLET_CRITICAL       90
12
13#define DPTF_TSR1_SENSOR_ID	1
14#define DPTF_TSR1_SENSOR_NAME	"Thermal Sensor - 5V"
15#define DPTF_TSR1_PASSIVE	45
16#define DPTF_TSR1_CRITICAL	90
17#define DPTF_TSR1_TABLET_PASSIVE        32
18#define DPTF_TSR1_TABLET_CRITICAL       90
19
20#define DPTF_TSR2_SENSOR_ID	2
21#define DPTF_TSR2_SENSOR_NAME	"Thermal Sensor - IA"
22#define DPTF_TSR2_PASSIVE	45
23#define DPTF_TSR2_CRITICAL	90
24#define DPTF_TSR2_TABLET_PASSIVE        32
25#define DPTF_TSR2_TABLET_CRITICAL       90
26
27#define DPTF_TSR3_SENSOR_ID	3
28#define DPTF_TSR3_SENSOR_NAME	"Thermal Sensor - GT"
29#define DPTF_TSR3_PASSIVE	45
30#define DPTF_TSR3_CRITICAL	90
31#define DPTF_TSR3_TABLET_PASSIVE        32
32#define DPTF_TSR3_TABLET_CRITICAL       90
33
34#define DPTF_ENABLE_CHARGER
35
36/* Charger performance states, board-specific values from charger and EC */
37Name (CHPS, Package () {
38	Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 },	/* 1.7A (MAX) */
39	Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 },	/* 1.5A */
40	Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 },	/* 1.0A */
41	Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 },	/* 0.5A */
42})
43
44Name (DTRT, Package () {
45	/* CPU Throttle Effect on CPU */
46	Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 10, 0, 0, 0, 0 },
47
48	/* CPU Throttle Effect on 5V (TSR1) */
49	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 10, 0, 0, 0, 0 },
50
51	/* Charger Throttle Effect on Charger (TSR0) */
52	Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR0, 100, 94, 0, 0, 0, 0 },
53
54	/* CPU Throttle Effect on IA (TSR2) */
55	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 10, 0, 0, 0, 0 },
56
57	/* CPU Throttle Effect on GT (TSR3) */
58	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR3, 100, 10, 0, 0, 0, 0 },
59})
60
61Name (MPPC, Package ()
62{
63	0x2,		/* Revision */
64	Package () {	/* Power Limit 1 */
65		0,	/* PowerLimitIndex, 0 for Power Limit 1 */
66		7000,	/* PowerLimitMinimum */
67		9000,	/* PowerLimitMaximum */
68		28000,	/* TimeWindowMinimum */
69		28000,	/* TimeWindowMaximum */
70		250	/* StepSize */
71	},
72	Package () {	/* Power Limit 2 */
73		1,	/* PowerLimitIndex, 1 for Power Limit 2 */
74		51000,	/* PowerLimitMinimum */
75		51000,	/* PowerLimitMaximum */
76		28000,	/* TimeWindowMinimum */
77		28000,	/* TimeWindowMaximum */
78		1000	/* StepSize */
79	}
80})
81