1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2 3#define DPTF_CPU_PASSIVE 0 4#define DPTF_CPU_CRITICAL 105 5 6#define DPTF_TSR0_SENSOR_ID 0 7#define DPTF_TSR0_SENSOR_NAME "Battery Charger" 8#define DPTF_TSR0_PASSIVE 59 9#define DPTF_TSR0_CRITICAL 80 10 11#define DPTF_TSR1_SENSOR_ID 1 12#define DPTF_TSR1_SENSOR_NAME "5V Regulator" 13#define DPTF_TSR1_PASSIVE 0 14#define DPTF_TSR1_CRITICAL 70 15#define DPTF_TSR1_ACTIVE_AC0 42 16#define DPTF_TSR1_ACTIVE_AC1 41 17#define DPTF_TSR1_ACTIVE_AC2 39 18 19#define DPTF_TSR2_SENSOR_ID 2 20#define DPTF_TSR2_SENSOR_NAME "Ambient" 21#define DPTF_TSR2_PASSIVE 0 22#define DPTF_TSR2_CRITICAL 65 23 24#define DPTF_TSR3_SENSOR_ID 3 25#define DPTF_TSR3_SENSOR_NAME "CPU" 26#define DPTF_TSR3_PASSIVE 44 27#define DPTF_TSR3_CRITICAL 90 28 29#define DPTF_ENABLE_CHARGER 30#define DPTF_ENABLE_FAN_CONTROL 31 32/* Charger performance states, board-specific values from charger and EC */ 33Name (CHPS, Package () { 34 Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ 35 Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ 36 Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ 37}) 38 39/* DFPS: Fan Performance States */ 40Name (DFPS, Package () { 41 0, // Revision 42 /* 43 * TODO : Need to update this Table after characterization. 44 * These are initial reference values. 45 */ 46 /* Control, Trip Point, Speed, NoiseLevel, Power */ 47 Package () {90, 0xFFFFFFFF, 6700, 220, 2200}, 48 Package () {80, 0xFFFFFFFF, 5800, 180, 1800}, 49 Package () {70, 0xFFFFFFFF, 5000, 145, 1450}, 50 Package () {60, 0xFFFFFFFF, 4900, 115, 1150}, 51 Package () {50, 0xFFFFFFFF, 3838, 90, 900}, 52 Package () {40, 0xFFFFFFFF, 2904, 55, 550}, 53 Package () {30, 0xFFFFFFFF, 2337, 30, 300}, 54 Package () {20, 0xFFFFFFFF, 1608, 15, 150}, 55 Package () {10, 0xFFFFFFFF, 800, 10, 100}, 56 Package () {0, 0xFFFFFFFF, 0, 0, 50} 57}) 58 59Name (DART, Package () { 60 /* Fan effect on CPU */ 61 0, // Revision 62 Package () { 63 /* 64 * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, 65 * AC7, AC8, AC9 66 */ 67 \_SB.DPTF.TFN1, \_SB.PCI0.TCPU, 100, 90, 70, 50, 50, 0, 0, 0, 68 0, 0, 0 69 }, 70 Package () { 71 \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 0, 0, 0, 0, 0, 0, 0, 72 0, 0, 0 73 }, 74 Package () { 75 \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 70, 50, 0, 0, 0, 0, 76 0, 0, 0 77 }, 78 Package () { 79 \_SB.DPTF.TFN1, \_SB.DPTF.TSR2, 100, 0, 0, 0, 0, 0, 0, 0, 80 0, 0, 0 81 }, 82 Package () { 83 \_SB.DPTF.TFN1, \_SB.DPTF.TSR3, 100, 0, 0, 0, 0, 0, 0, 0, 84 0, 0, 0 85 } 86}) 87 88Name (DTRT, Package () { 89 /* CPU Throttle Effect on TSR3 */ 90 Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR3, 100, 60, 0, 0, 0, 0 }, 91 92 /* Charger Throttle Effect on TSR0 */ 93 Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 }, 94}) 95 96Name (MPPC, Package () 97{ 98 0x2, /* Revision */ 99 Package () { /* Power Limit 1 */ 100 0, /* PowerLimitIndex, 0 for Power Limit 1 */ 101 10000, /* PowerLimitMinimum */ 102 15000, /* PowerLimitMaximum */ 103 28000, /* TimeWindowMinimum */ 104 28000, /* TimeWindowMaximum */ 105 200 /* StepSize */ 106 }, 107 Package () { /* Power Limit 2 */ 108 1, /* PowerLimitIndex, 1 for Power Limit 2 */ 109 64000, /* PowerLimitMinimum */ 110 64000, /* PowerLimitMaximum */ 111 28000, /* TimeWindowMinimum */ 112 28000, /* TimeWindowMaximum */ 113 1000 /* StepSize */ 114 } 115}) 116