1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#define DPTF_CPU_PASSIVE 98 4#define DPTF_CPU_CRITICAL 125 5#define DPTF_CPU_ACTIVE_AC0 87 6#define DPTF_CPU_ACTIVE_AC1 85 7#define DPTF_CPU_ACTIVE_AC2 83 8#define DPTF_CPU_ACTIVE_AC3 80 9#define DPTF_CPU_ACTIVE_AC4 75 10 11#define DPTF_TSR0_SENSOR_ID 0 12#define DPTF_TSR0_SENSOR_NAME "Thermal_Sensor_Remote_CPU" 13#define DPTF_TSR0_PASSIVE 75 14#define DPTF_TSR0_CRITICAL 125 15#define DPTF_TSR0_ACTIVE_AC0 50 16#define DPTF_TSR0_ACTIVE_AC1 47 17#define DPTF_TSR0_ACTIVE_AC2 45 18#define DPTF_TSR0_ACTIVE_AC3 42 19#define DPTF_TSR0_ACTIVE_AC4 39 20 21#define DPTF_TSR1_SENSOR_ID 1 22#define DPTF_TSR1_SENSOR_NAME "Thermal_Sensor_Remote_PMIC" 23#define DPTF_TSR1_PASSIVE 75 24#define DPTF_TSR1_CRITICAL 125 25#define DPTF_TSR1_ACTIVE_AC0 50 26#define DPTF_TSR1_ACTIVE_AC1 47 27#define DPTF_TSR1_ACTIVE_AC2 45 28#define DPTF_TSR1_ACTIVE_AC3 42 29#define DPTF_TSR1_ACTIVE_AC4 39 30 31#define DPTF_TSR2_SENSOR_ID 2 32#define DPTF_TSR2_SENSOR_NAME "Thermal_Sensor_Remote_CPU" 33#define DPTF_TSR2_PASSIVE 75 34#define DPTF_TSR2_CRITICAL 125 35#define DPTF_TSR2_ACTIVE_AC0 50 36#define DPTF_TSR2_ACTIVE_AC1 47 37#define DPTF_TSR2_ACTIVE_AC2 45 38#define DPTF_TSR2_ACTIVE_AC3 42 39#define DPTF_TSR2_ACTIVE_AC4 39 40 41#define DPTF_ENABLE_CHARGER 42#define DPTF_ENABLE_FAN_CONTROL 43 44/* Charger performance states, board-specific values from charger and EC */ 45Name (CHPS, Package () { 46 Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ 47 Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ 48 Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ 49 Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */ 50}) 51 52#ifdef DPTF_ENABLE_FAN_CONTROL 53/* DFPS: Fan Performance States */ 54Name (DFPS, Package () { 55 0, // Revision 56 /* 57 * TODO : Need to update this Table after characterization. 58 * These are initial reference values. 59 */ 60 /* Control, Trip Point, Speed, NoiseLevel, Power */ 61 Package () {90, 0xFFFFFFFF, 6700, 220, 2200}, 62 Package () {80, 0xFFFFFFFF, 5800, 180, 1800}, 63 Package () {70, 0xFFFFFFFF, 5000, 145, 1450}, 64 Package () {60, 0xFFFFFFFF, 4900, 115, 1150}, 65 Package () {50, 0xFFFFFFFF, 3838, 90, 900}, 66 Package () {40, 0xFFFFFFFF, 2904, 55, 550}, 67 Package () {30, 0xFFFFFFFF, 2337, 30, 300}, 68 Package () {20, 0xFFFFFFFF, 1608, 15, 150}, 69 Package () {10, 0xFFFFFFFF, 800, 10, 100}, 70 Package () {0, 0xFFFFFFFF, 0, 0, 50} 71}) 72 73Name (DART, Package () { 74 /* Fan effect on CPU */ 75 0, // Revision 76 Package () { 77 /* 78 * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, 79 * AC7, AC8, AC9 80 */ 81 \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 90, 69, 56, 46, 36, 0, 0, 82 0, 0, 0 83 }, 84 Package () { 85 \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 90, 69, 56, 46, 36, 0, 0, 86 0, 0, 0 87 }, 88 Package () { 89 \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 69, 56, 46, 36, 0, 0, 90 0, 0, 0 91 }, 92 Package () { 93 \_SB.DPTF.TFN1, \_SB.DPTF.TSR2, 100, 90, 69, 56, 46, 36, 0, 0, 94 0, 0, 0 95 } 96}) 97#endif 98 99Name (DTRT, Package () { 100 /* CPU Throttle Effect on CPU */ 101 Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 1, 0, 0, 0, 0 }, 102 103 /* CPU Throttle Effect on TSR0 */ 104 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 1, 0, 0, 0, 0 }, 105 106 /* CPU Throttle Effect on TSR1 */ 107 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 1, 0, 0, 0, 0 }, 108 109 /* CPU Throttle Effect on TSR2 */ 110 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 1, 0, 0, 0, 0 }, 111}) 112 113Name (MPPC, Package () 114{ 115 0x2, /* Revision */ 116 Package () { /* Power Limit 1 */ 117 0, /* PowerLimitIndex, 0 for Power Limit 1 */ 118 3000, /* PowerLimitMinimum */ 119 15000, /* PowerLimitMaximum */ 120 28000, /* TimeWindowMinimum */ 121 32000, /* TimeWindowMaximum */ 122 100 /* StepSize */ 123 }, 124 Package () { /* Power Limit 2 */ 125 1, /* PowerLimitIndex, 1 for Power Limit 2 */ 126 15000, /* PowerLimitMinimum */ 127 44000, /* PowerLimitMaximum */ 128 28000, /* TimeWindowMinimum */ 129 32000, /* TimeWindowMaximum */ 130 100 /* StepSize */ 131 } 132}) 133 134/* Include DPTF */ 135#include <soc/intel/skylake/acpi/dptf/dptf.asl> 136