1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* i440bx Northbridge resources that sits on \_SB.PCI0 */ 4Device (NB) 5{ 6 Name(_ADR, 0x00000000) 7 OperationRegion(PCIC, PCI_Config, 0x00, 0x100) 8 Field (PCIC, ByteAcc, NoLock, Preserve) 9 { 10 Offset (0x67), // DRB7 11 DRB7, 8, 12 Offset (0x7A), // PMCR 13 PMCR, 8 14 } 15 Method(TOM1, 0) { 16 /* Multiply by 8MB to get TOM */ 17 Return(DRB7 << 23) 18 } 19} 20 21Method(_CRS, 0) { 22 Name(TMP, ResourceTemplate() { 23 WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, 24 0x0000, // Granularity 25 0x0000, // Range Minimum 26 0x00FF, // Range Maximum 27 0x0000, // Translation Offset 28 0x0100, // Length 29 ,, 30 ) 31 IO(Decode16, 0x0CF8, 0x0CF8, 1, 8) 32 33 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 34 0x0000, /* address granularity */ 35 0x0000, /* range minimum */ 36 0x0CF7, /* range maximum */ 37 0x0000, /* translation */ 38 0x0CF8 /* length */ 39 ) 40 41 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 42 0x0000, /* address granularity */ 43 0x0D00, /* range minimum */ 44 0xFFFF, /* range maximum */ 45 0x0000, /* translation */ 46 0xF300 /* length */ 47 ) 48 49 /* memory space for PCI BARs below 4GB */ 50 Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) 51 }) 52 CreateDWordField(TMP, MMIO._BAS, MM1B) 53 CreateDWordField(TMP, MMIO._LEN, MM1L) 54 /* 55 * Declare memory between TOM1 and 4GB as available 56 * for PCI MMIO. 57 * 58 * Use ShiftLeft to avoid 64bit constant (for XP). 59 * This will work even if the OS does 32bit arithmetic, as 60 * 32bit (0x00000000 - TOM1) will wrap and give the same 61 * result as 64bit (0x100000000 - TOM1). 62 */ 63 MM1B = \_SB.PCI0.NB.TOM1 64 Local0 = 0x10000000 << 4 65 Local0 -= CONFIG_ROM_SIZE 66 MM1L = Local0 - MM1B 67 68 Return(TMP) 69} 70