1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* 4 * Include this file into a mainboard's DSDT _SB device tree and it will 5 * expose the IT8720F SuperIO and some of its functionality. 6 * 7 * It allows the change of IO ports, IRQs and DMA settings on logical 8 * devices, disabling and reenabling logical devices. 9 * 10 * LDN State 11 * 0x0 FDC Not implemented 12 * 0x1 SP1 Implemented, untested 13 * 0x2 SP2 Implemented, untested 14 * 0x3 PP Not implemented 15 * 0x4 EC Implemented, untested 16 * 0x5 KBCK Implemented, untested 17 * 0x6 KBCM Implemented, untested 18 * 0x7 GPIO Implemented, untested 19 * 0xa CIR Implemented, untested 20 * 21 * Controllable through preprocessor defines: 22 * SUPERIO_DEV Device identifier for this SIO (e.g. SIO0) 23 * SUPERIO_PNP_BASE I/O address of the first PnP configuration register 24 * IT8720F_SHOW_SP1 If defined, Serial Port 1 will be exposed. 25 * IT8720F_SHOW_SP2 If defined, Serial Port 2 will be exposed. 26 * IT8720F_SHOW_EC If defined, the Environment Controller will be exposed. 27 * IT8720F_SHOW_KBCK If defined, the Keyboard Controller will be exposed. 28 * IT8720F_SHOW_KBCM If defined, PS/2 mouse support will be exposed. 29 * IT8720F_SHOW_GPIO If defined, GPIO support will be exposed. 30 * IT8720F_SHOW_CIR If defined, Consumer IR support will be exposed. 31 */ 32 33#undef SUPERIO_CHIP_NAME 34#define SUPERIO_CHIP_NAME IT8720F 35#include <superio/acpi/pnp.asl> 36 37#undef PNP_DEFAULT_PSC 38#define PNP_DEFAULT_PSC Return (0) /* no power management */ 39 40#define CONFIGURE_CONTROL CCTL 41 42Device(SUPERIO_DEV) { 43 Name (_HID, EisaId("PNP0A05")) 44 Name (_STR, Unicode("ITE IT8720F Super I/O")) 45 Name (_UID, SUPERIO_UID(SUPERIO_DEV,)) 46 47 /* SuperIO configuration ports */ 48 OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02) 49 Field (CREG, ByteAcc, NoLock, Preserve) 50 { 51 PNP_ADDR_REG, 8, 52 PNP_DATA_REG, 8 53 } 54 IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve) 55 { 56 Offset (0x02), 57 CONFIGURE_CONTROL, 8, /* Global configure control */ 58 59 Offset (0x07), 60 PNP_LOGICAL_DEVICE, 8, /* Logical device selector */ 61 62 Offset (0x30), 63 PNP_DEVICE_ACTIVE, 1, /* Logical device activation */ 64 65 Offset (0x60), 66 PNP_IO0_HIGH_BYTE, 8, /* First I/O port base - high byte */ 67 PNP_IO0_LOW_BYTE, 8, /* First I/O port base - low byte */ 68 Offset (0x62), 69 PNP_IO1_HIGH_BYTE, 8, /* Second I/O port base - high byte */ 70 PNP_IO1_LOW_BYTE, 8, /* Second I/O port base - low byte */ 71 Offset (0x64), 72 PNP_IO2_HIGH_BYTE, 8, /* Third I/O port base - high byte */ 73 PNP_IO2_LOW_BYTE, 8, /* Third I/O port base - low byte */ 74 75 Offset (0x70), 76 PNP_IRQ0, 8, /* First IRQ */ 77 } 78 79 Method (_CRS) 80 { 81 /* Announce the used I/O ports to the OS */ 82 Return (ResourceTemplate () { 83 IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02) 84 }) 85 } 86 87 #undef PNP_ENTER_MAGIC_1ST 88 #undef PNP_ENTER_MAGIC_2ND 89 #undef PNP_ENTER_MAGIC_3RD 90 #undef PNP_ENTER_MAGIC_4TH 91 #undef PNP_EXIT_MAGIC_1ST 92 #undef PNP_EXIT_SPECIAL_REG 93 #undef PNP_EXIT_SPECIAL_VAL 94 #define PNP_ENTER_MAGIC_1ST 0x87 95 #define PNP_ENTER_MAGIC_2ND 0x01 96 #define PNP_ENTER_MAGIC_3RD 0x55 97#if SUPERIO_PNP_BASE == 0x2e 98 #define PNP_ENTER_MAGIC_4TH 0x55 99#else 100 #define PNP_ENTER_MAGIC_4TH 0xaa 101#endif 102 #define PNP_EXIT_SPECIAL_REG CONFIGURE_CONTROL 103 #define PNP_EXIT_SPECIAL_VAL 0x02 104 #include <superio/acpi/pnp_config.asl> 105 106#ifdef IT8720F_SHOW_SP1 107 #undef SUPERIO_UART_LDN 108 #undef SUPERIO_UART_DDN 109 #undef SUPERIO_UART_PM_REG 110 #undef SUPERIO_UART_PM_VAL 111 #undef SUPERIO_UART_PM_LDN 112 #define SUPERIO_UART_LDN 1 113 #include <superio/acpi/pnp_uart.asl> 114#endif 115 116#ifdef IT8720F_SHOW_SP2 117 #undef SUPERIO_UART_LDN 118 #undef SUPERIO_UART_DDN 119 #undef SUPERIO_UART_PM_REG 120 #undef SUPERIO_UART_PM_VAL 121 #undef SUPERIO_UART_PM_LDN 122 #define SUPERIO_UART_LDN 2 123 #include <superio/acpi/pnp_uart.asl> 124#endif 125 126#ifdef IT8720F_SHOW_EC 127 #undef SUPERIO_PNP_HID 128 #undef SUPERIO_PNP_LDN 129 #undef SUPERIO_PNP_DDN 130 #undef SUPERIO_PNP_NO_DIS 131 #undef SUPERIO_PNP_PM_REG 132 #undef SUPERIO_PNP_PM_VAL 133 #undef SUPERIO_PNP_PM_LDN 134 #undef SUPERIO_PNP_IO0 135 #undef SUPERIO_PNP_IO1 136 #undef SUPERIO_PNP_IO2 137 #undef SUPERIO_PNP_IRQ0 138 #undef SUPERIO_PNP_IRQ1 139 #undef SUPERIO_PNP_DMA 140 #define SUPERIO_PNP_LDN 4 141 #define SUPERIO_PNP_IO0 0x08, 0x08 142 #define SUPERIO_PNP_IO1 0x08, 0x04 143 #define SUPERIO_PNP_IRQ0 144 #include <superio/acpi/pnp_generic.asl> 145#endif 146 147#ifdef IT8720F_SHOW_KBC 148 #undef SUPERIO_KBC_LDN 149 #undef SUPERIO_KBC_PS2M 150 #undef SUPERIO_KBC_PS2LDN 151 #define SUPERIO_KBC_LDN 5 152#ifdef IT8720F_SHOW_PS2M 153 #define SUPERIO_KBC_PS2LDN 6 154#endif 155 #include <superio/acpi/pnp_kbc.asl> 156#endif 157 158#ifdef IT8720F_SHOW_GPIO 159 #undef SUPERIO_PNP_HID 160 #undef SUPERIO_PNP_LDN 161 #undef SUPERIO_PNP_DDN 162 #undef SUPERIO_PNP_NO_DIS 163 #undef SUPERIO_PNP_PM_REG 164 #undef SUPERIO_PNP_PM_VAL 165 #undef SUPERIO_PNP_PM_LDN 166 #undef SUPERIO_PNP_IO0 167 #undef SUPERIO_PNP_IO1 168 #undef SUPERIO_PNP_IO2 169 #undef SUPERIO_PNP_IRQ0 170 #undef SUPERIO_PNP_IRQ1 171 #undef SUPERIO_PNP_DMA 172 #define SUPERIO_PNP_NO_DIS 173 #define SUPERIO_PNP_LDN 7 174 #define SUPERIO_PNP_IO0 0x08, 0x08 175 #define SUPERIO_PNP_IO1 0x08, 0x08 176 #define SUPERIO_PNP_IO2 0x08, 0x08 177 #include <superio/acpi/pnp_generic.asl> 178#endif 179 180#ifdef IT8720F_SHOW_CIR 181 #undef SUPERIO_PNP_HID 182 #undef SUPERIO_PNP_LDN 183 #undef SUPERIO_PNP_DDN 184 #undef SUPERIO_PNP_NO_DIS 185 #undef SUPERIO_PNP_PM_REG 186 #undef SUPERIO_PNP_PM_VAL 187 #undef SUPERIO_PNP_PM_LDN 188 #undef SUPERIO_PNP_IO0 189 #undef SUPERIO_PNP_IO1 190 #undef SUPERIO_PNP_IO2 191 #undef SUPERIO_PNP_IRQ0 192 #undef SUPERIO_PNP_IRQ1 193 #undef SUPERIO_PNP_DMA 194 #define SUPERIO_PNP_HID "ITE8704" 195 #define SUPERIO_PNP_LDN 10 196 #define SUPERIO_PNP_IO0 0x08, 0x08 197 #define SUPERIO_PNP_IRQ0 198 #include <superio/acpi/pnp_generic.asl> 199#endif 200} 201