1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* 4 * Include this file into a mainboard's DSDT _SB device tree and it will 5 * expose the IT8786E SuperIO and some of its functionality. 6 * 7 * It allows the change of IO ports, IRQs and DMA settings on logical 8 * devices, disabling and reenabling logical devices. 9 * 10 * LDN State 11 * 0x1 UARTA Implemented, untested 12 * 0x2 UARTB Implemented, untested 13 * 0x3 PP Not implemented 14 * 0x4 EC Not implemented 15 * 0x5 KBC Implemented, untested 16 * 0x6 MOUSE Implemented, untested 17 * 0x7 GPIO Not implemented 18 * 0x8 UARTC Implemented, untested 19 * 0x9 UARTD Implemented, untested 20 * 0xa UARTE Not implemented 21 * 0xb UARTF Not implemented 22 * 0xc CIR Not implemented 23 * 24 * Controllable through preprocessor defines: 25 * SUPERIO_DEV Device identifier for this SIO (e.g. SIO0) 26 * SUPERIO_PNP_BASE I/O address of the first PnP configuration register 27 * IT8786E_SHOW_UARTA If defined, UARTA will be exposed. 28 * IT8786E_SHOW_UARTB If defined, UARTB will be exposed. 29 * IT8786E_SHOW_UARTC If defined, UARTC will be exposed. 30 * IT8786E_SHOW_UARTD If defined, UARTD will be exposed. 31 * IT8786E_SHOW_KBC If defined, the KBC will be exposed. 32 * IT8786E_SHOW_PS2M If defined, PS/2 mouse support will be exposed. 33 */ 34 35#undef SUPERIO_CHIP_NAME 36#define SUPERIO_CHIP_NAME IT8786E 37#include <superio/acpi/pnp.asl> 38 39#undef PNP_DEFAULT_PSC 40#define PNP_DEFAULT_PSC Return (0) /* no power management */ 41 42#define CONFIGURE_CONTROL CCTL 43 44Device (SUPERIO_DEV) { 45 Name (_HID, EisaId("PNP0A05")) 46 Name (_STR, Unicode("ITE IT8786E Super I/O")) 47 Name (_UID, SUPERIO_UID(SUPERIO_DEV,)) 48 49 /* Mutex for accesses to the configuration ports */ 50 Mutex (CRMX, 1) 51 52 /* SuperIO configuration ports */ 53 OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02) 54 Field (CREG, ByteAcc, NoLock, Preserve) 55 { 56 PNP_ADDR_REG, 8, 57 PNP_DATA_REG, 8 58 } 59 IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve) 60 { 61 Offset (0x02), 62 CONFIGURE_CONTROL, 8, /* Global configure control */ 63 64 Offset (0x07), 65 PNP_LOGICAL_DEVICE, 8, /* Logical device selector */ 66 67 Offset (0x30), 68 PNP_DEVICE_ACTIVE, 1, /* Logical device activation */ 69 70 Offset (0x60), 71 PNP_IO0_HIGH_BYTE, 8, /* First I/O port base - high byte */ 72 PNP_IO0_LOW_BYTE, 8, /* First I/O port base - low byte */ 73 Offset (0x62), 74 PNP_IO1_HIGH_BYTE, 8, /* Second I/O port base - high byte */ 75 PNP_IO1_LOW_BYTE, 8, /* Second I/O port base - low byte */ 76 77 Offset (0x70), 78 PNP_IRQ0, 8, /* First IRQ */ 79 } 80 81 Method (_CRS) 82 { 83 /* Announce the used i/o ports to the OS */ 84 Return (ResourceTemplate () { 85 IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02) 86 }) 87 } 88 89 #undef PNP_ENTER_MAGIC_1ST 90 #undef PNP_ENTER_MAGIC_2ND 91 #undef PNP_ENTER_MAGIC_3RD 92 #undef PNP_ENTER_MAGIC_4TH 93 #undef PNP_EXIT_MAGIC_1ST 94 #define PNP_ENTER_MAGIC_1ST 0x87 95 #define PNP_ENTER_MAGIC_2ND 0x01 96 #define PNP_ENTER_MAGIC_3RD 0x55 97#if SUPERIO_PNP_BASE == 0x2e 98 #define PNP_ENTER_MAGIC_4TH 0x55 99#else 100 #define PNP_ENTER_MAGIC_4TH 0xaa 101#endif 102 #define PNP_EXIT_SPECIAL_REG CONFIGURE_CONTROL 103 #define PNP_EXIT_SPECIAL_VAL 0x02 104 #include <superio/acpi/pnp_config.asl> 105 106#ifdef IT8786E_SHOW_UARTA 107 #undef SUPERIO_UART_LDN 108 #undef SUPERIO_UART_DDN 109 #undef SUPERIO_UART_PM_REG 110 #undef SUPERIO_UART_PM_VAL 111 #undef SUPERIO_UART_PM_LDN 112 #define SUPERIO_UART_LDN 1 113 #include <superio/acpi/pnp_uart.asl> 114#endif 115 116#ifdef IT8786E_SHOW_UARTB 117 #undef SUPERIO_UART_LDN 118 #undef SUPERIO_UART_DDN 119 #undef SUPERIO_UART_PM_REG 120 #undef SUPERIO_UART_PM_VAL 121 #undef SUPERIO_UART_PM_LDN 122 #define SUPERIO_UART_LDN 2 123 #include <superio/acpi/pnp_uart.asl> 124#endif 125 126#ifdef IT8786E_SHOW_KBC 127 #undef SUPERIO_KBC_LDN 128 #undef SUPERIO_KBC_PS2M 129 #undef SUPERIO_KBC_PS2LDN 130 #define SUPERIO_KBC_LDN 5 131#ifdef IT8786E_SHOW_PS2M 132 #define SUPERIO_KBC_PS2LDN 6 133#endif 134 #include <superio/acpi/pnp_kbc.asl> 135#endif 136 137#ifdef IT8786E_SHOW_UARTC 138 #undef SUPERIO_UART_LDN 139 #undef SUPERIO_UART_DDN 140 #undef SUPERIO_UART_PM_REG 141 #undef SUPERIO_UART_PM_VAL 142 #undef SUPERIO_UART_PM_LDN 143 #define SUPERIO_UART_LDN 8 144 #include <superio/acpi/pnp_uart.asl> 145#endif 146 147#ifdef IT8786E_SHOW_UARTD 148 #undef SUPERIO_UART_LDN 149 #undef SUPERIO_UART_DDN 150 #undef SUPERIO_UART_PM_REG 151 #undef SUPERIO_UART_PM_VAL 152 #undef SUPERIO_UART_PM_LDN 153 #define SUPERIO_UART_LDN 9 154 #include <superio/acpi/pnp_uart.asl> 155#endif 156} 157