1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* 4 * Include this file into a mainboard's DSDT _SB device tree and it will 5 * expose the NCT6687D SuperIO and some of its functionality. 6 * 7 * It allows the change of IO ports, IRQs and DMA settings on logical 8 * devices, disabling and reenabling logical devices. 9 * 10 * LDN State 11 * 0x1 PP Implemented, untested 12 * 0x2 SP1 Implemented, untested 13 * 0x3 SP1 Implemented, untested 14 * 0x5 KBC Implemented, untested 15 * 0x8 GPIO Implemented, untested 16 * 0xb EC Implemented, untested 17 * 18 * Controllable through preprocessor defines: 19 * SUPERIO_DEV Device identifier for this SIO (e.g. SIO0) 20 * SUPERIO_PNP_BASE I/O address of the first PnP configuration register 21 * NCT6687D_SHOW_PP If defined, the parallel port will be exposed. 22 * NCT6687D_SHOW_SP1 If defined, Serial Port 1 will be exposed. 23 * NCT6687D_SHOW_SP2 If defined, Serial Port 2 will be exposed. 24 * NCT6687D_SHOW_KBC If defined, the Keyboard Controller will be exposed. 25 * NCT6687D_SHOW_GPIO If defined, GPIO support will be exposed. 26 * NCT6687D_SHOW_EC If defined, the Environment Controller will be exposed. 27 */ 28 29#undef SUPERIO_CHIP_NAME 30#define SUPERIO_CHIP_NAME NCT6687D 31#include <superio/acpi/pnp.asl> 32 33#undef PNP_DEFAULT_PSC 34#define PNP_DEFAULT_PSC Return (0) /* no power management */ 35 36Device(SUPERIO_DEV) { 37 Name (_HID, EisaId("PNP0A05")) 38 Name (_STR, Unicode("Nuvoton NCT6687D Super I/O")) 39 Name (_UID, SUPERIO_UID(SUPERIO_DEV,)) 40 41 /* SuperIO configuration ports */ 42 OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02) 43 Field (CREG, ByteAcc, NoLock, Preserve) 44 { 45 PNP_ADDR_REG, 8, 46 PNP_DATA_REG, 8, 47 } 48 IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve) 49 { 50 Offset (0x07), 51 PNP_LOGICAL_DEVICE, 8, /* Logical device selector */ 52 53 Offset (0x30), 54 PNP_DEVICE_ACTIVE, 1, /* Logical device activation */ 55 ACT1, 1, /* Logical device activation */ 56 ACT2, 1, /* Logical device activation */ 57 ACT3, 1, /* Logical device activation */ 58 ACT4, 1, /* Logical device activation */ 59 ACT5, 1, /* Logical device activation */ 60 ACT6, 1, /* Logical device activation */ 61 ACT7, 1, /* Logical device activation */ 62 63 Offset (0x60), 64 PNP_IO0_HIGH_BYTE, 8, /* First I/O port base - high byte */ 65 PNP_IO0_LOW_BYTE, 8, /* First I/O port base - low byte */ 66 Offset (0x62), 67 PNP_IO1_HIGH_BYTE, 8, /* Second I/O port base - high byte */ 68 PNP_IO1_LOW_BYTE, 8, /* Second I/O port base - low byte */ 69 Offset (0x64), 70 PNP_IO2_HIGH_BYTE, 8, /* Third I/O port base - high byte */ 71 PNP_IO2_LOW_BYTE, 8, /* Third I/O port base - low byte */ 72 73 Offset (0x70), 74 PNP_IRQ0, 8, /* First IRQ */ 75 Offset (0x72), 76 PNP_IRQ1, 8, /* Second IRQ */ 77 Offset (0x74), 78 PNP_DMA0, 8, /* DRQ */ 79 } 80 81 Method (_CRS) 82 { 83 /* Announce the used I/O ports to the OS */ 84 Return (ResourceTemplate () { 85 IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02) 86 }) 87 } 88 89 #undef PNP_ENTER_MAGIC_1ST 90 #undef PNP_ENTER_MAGIC_2ND 91 #undef PNP_ENTER_MAGIC_3RD 92 #undef PNP_ENTER_MAGIC_4TH 93 #undef PNP_EXIT_MAGIC_1ST 94 #undef PNP_EXIT_SPECIAL_REG 95 #undef PNP_EXIT_SPECIAL_VAL 96 #define PNP_ENTER_MAGIC_1ST 0x87 97 #define PNP_ENTER_MAGIC_2ND 0x87 98 #define PNP_EXIT_MAGIC_1ST 0xaa 99 #include <superio/acpi/pnp_config.asl> 100 101#ifdef NCT6687D_SHOW_PP 102 #undef SUPERIO_PNP_HID 103 #undef SUPERIO_PNP_LDN 104 #undef SUPERIO_PNP_DDN 105 #undef SUPERIO_PNP_NO_DIS 106 #undef SUPERIO_PNP_PM_REG 107 #undef SUPERIO_PNP_PM_VAL 108 #undef SUPERIO_PNP_PM_LDN 109 #undef SUPERIO_PNP_IO0 110 #undef SUPERIO_PNP_IO1 111 #undef SUPERIO_PNP_IO2 112 #undef SUPERIO_PNP_IRQ0 113 #undef SUPERIO_PNP_IRQ1 114 #undef SUPERIO_PNP_DMA 115 /* 116 * The extra code required to dynamically reflect ECP in the HID 117 * isn't currently justified, so the HID is hardcoded as not 118 * using ECP. "PNP0401" would indicate ECP. 119 */ 120 #define SUPERIO_PNP_HID "PNP0400" 121 #define SUPERIO_PNP_LDN 1 122 #define SUPERIO_PNP_IO0 0x08, 0x08 123 #define SUPERIO_PNP_IRQ0 124 #define SUPERIO_PNP_DMA 125 #include <superio/acpi/pnp_generic.asl> 126#endif 127 128#ifdef NCT6687D_SHOW_SP1 129 #undef SUPERIO_UART_LDN 130 #undef SUPERIO_UART_DDN 131 #undef SUPERIO_UART_PM_REG 132 #undef SUPERIO_UART_PM_VAL 133 #undef SUPERIO_UART_PM_LDN 134 #define SUPERIO_UART_LDN 2 135 #include <superio/acpi/pnp_uart.asl> 136#endif 137 138#ifdef NCT6687D_SHOW_SP2 139 #undef SUPERIO_UART_LDN 140 #undef SUPERIO_UART_DDN 141 #undef SUPERIO_UART_PM_REG 142 #undef SUPERIO_UART_PM_VAL 143 #undef SUPERIO_UART_PM_LDN 144 #define SUPERIO_UART_LDN 3 145 #include <superio/acpi/pnp_uart.asl> 146#endif 147 148#ifdef NCT6687D_SHOW_KBC 149 #undef SUPERIO_KBC_LDN 150 #undef SUPERIO_KBC_PS2M 151 #undef SUPERIO_KBC_PS2LDN 152 #define SUPERIO_KBC_LDN 5 153 #define SUPERIO_KBC_PS2M 154 #include <superio/acpi/pnp_kbc.asl> 155#endif 156 157#ifdef NCT6687D_SHOW_EC 158 #undef SUPERIO_PNP_HID 159 #undef SUPERIO_PNP_LDN 160 #undef SUPERIO_PNP_DDN 161 #undef SUPERIO_PNP_NO_DIS 162 #undef SUPERIO_PNP_PM_REG 163 #undef SUPERIO_PNP_PM_VAL 164 #undef SUPERIO_PNP_PM_LDN 165 #undef SUPERIO_PNP_IO0 166 #undef SUPERIO_PNP_IO1 167 #undef SUPERIO_PNP_IO2 168 #undef SUPERIO_PNP_IRQ0 169 #undef SUPERIO_PNP_IRQ1 170 #undef SUPERIO_PNP_DMA 171 #define SUPERIO_PNP_LDN 11 172 #define SUPERIO_PNP_IO0 0x08, 0x08 173 #define SUPERIO_PNP_IRQ0 174 #include <superio/acpi/pnp_generic.asl> 175#endif 176 177} 178