1 /*
2 * Copyright (c) 2017-2022 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "src/cpu/kernels/CpuActivationKernel.h"
25
26 #include "arm_compute/core/ITensor.h"
27 #include "arm_compute/core/TensorInfo.h"
28 #include "arm_compute/core/Utils.h"
29 #include "src/core/CPP/Validate.h"
30 #include "src/core/helpers/AutoConfiguration.h"
31 #include "src/core/helpers/WindowHelpers.h"
32
33 #include "src/core/common/Registrars.h"
34 #include "src/cpu/kernels/activation/list.h"
35
36 #include <array>
37
38 namespace arm_compute
39 {
40 namespace cpu
41 {
42 namespace kernels
43 {
44 namespace
45 {
46 static const std::vector<CpuActivationKernel::ActivationKernel> available_kernels =
47 {
48 #ifdef ARM_COMPUTE_ENABLE_SVE
49 {
50 "sve_q8_activation_lut",
__anon86be97850202() 51 [](const ActivationDataTypeISASelectorData & data) { return ActivationLayerInfo::is_lut_supported(data.f, data.dt) && data.cpumodel == CPUModel::A510 && data.isa.sve; },
52 REGISTER_QASYMM8_SVE(arm_compute::cpu::sve_q8_activation_lut)
53 },
54 #endif // ARM_COMPUTE_ENABLE_SVE
55 #ifdef __aarch64__
56 {
57 // Neon LUT implementantion takes precedence
58 "neon_q8_activation_lut",
__anon86be97850302() 59 [](const ActivationDataTypeISASelectorData & data) { return ActivationLayerInfo::is_lut_supported(data.f, data.dt); },
60 REGISTER_Q8_NEON(arm_compute::cpu::neon_q8_activation_lut)
61 },
62 #endif // __aarch64__
63 {
64 "sve2_qu8_activation",
__anon86be97850402() 65 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8 && data.isa.sve2 && data.f != ActivationLayerInfo::ActivationFunction::GELU; },
66 REGISTER_QASYMM8_SVE2(arm_compute::cpu::sve2_qasymm8_activation)
67 },
68 {
69 "sve2_qs8_activation",
__anon86be97850502() 70 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8_SIGNED && data.isa.sve2 && data.f != ActivationLayerInfo::ActivationFunction::GELU; },
71 REGISTER_QASYMM8_SIGNED_SVE2(arm_compute::cpu::sve2_qasymm8_signed_activation)
72 },
73 {
74 "sve2_qs16_activation",
__anon86be97850602() 75 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::QSYMM16 && data.isa.sve2 && data.f != ActivationLayerInfo::ActivationFunction::GELU; },
76 REGISTER_QSYMM16_SVE2(arm_compute::cpu::sve2_qsymm16_activation)
77 },
78 {
79 "sve_fp16_activation",
__anon86be97850702() 80 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::F16 && data.isa.sve && data.isa.fp16 && data.f != ActivationLayerInfo::ActivationFunction::GELU; },
81 REGISTER_FP16_SVE(arm_compute::cpu::sve_fp16_activation)
82 },
83 {
84 "sve_fp32_activation",
__anon86be97850802() 85 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::F32 && data.isa.sve && data.f != ActivationLayerInfo::ActivationFunction::GELU; },
86 REGISTER_FP32_SVE(arm_compute::cpu::sve_fp32_activation)
87 },
88 {
89 "neon_fp16_activation",
__anon86be97850902() 90 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::F16 && data.isa.fp16; },
91 REGISTER_FP16_NEON(arm_compute::cpu::neon_fp16_activation)
92 },
93 {
94 "neon_fp32_activation",
__anon86be97850a02() 95 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::F32; },
96 REGISTER_FP32_NEON(arm_compute::cpu::neon_fp32_activation)
97 },
98 {
99 "neon_qu8_activation",
__anon86be97850b02() 100 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8; },
101 REGISTER_QASYMM8_NEON(arm_compute::cpu::neon_qasymm8_activation)
102 },
103 {
104 "neon_qs8_activation",
__anon86be97850c02() 105 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8_SIGNED; },
106 REGISTER_QASYMM8_SIGNED_NEON(arm_compute::cpu::neon_qasymm8_signed_activation)
107 },
108 {
109 "neon_qs16_activation",
__anon86be97850d02() 110 [](const ActivationDataTypeISASelectorData & data) { return data.dt == DataType::QSYMM16; },
111 REGISTER_QSYMM16_NEON(arm_compute::cpu::neon_qsymm16_activation)
112 },
113 };
114
115 /* Supported activation in the 8-bit integer domain */
116 static const std::array<ActivationLayerInfo::ActivationFunction, 8> qasymm8_activations =
117 {
118 ActivationLayerInfo::ActivationFunction::RELU,
119 ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU,
120 ActivationLayerInfo::ActivationFunction::BOUNDED_RELU,
121 ActivationLayerInfo::ActivationFunction::LOGISTIC,
122 ActivationLayerInfo::ActivationFunction::TANH,
123 ActivationLayerInfo::ActivationFunction::HARD_SWISH,
124 ActivationLayerInfo::ActivationFunction::LEAKY_RELU,
125 ActivationLayerInfo::ActivationFunction::GELU,
126 };
127 /* Supported activation in the 16-bit integer domain */
128 static const std::array<ActivationLayerInfo::ActivationFunction, 4> qsymm16_activations =
129 {
130 ActivationLayerInfo::ActivationFunction::LOGISTIC,
131 ActivationLayerInfo::ActivationFunction::TANH,
132 ActivationLayerInfo::ActivationFunction::HARD_SWISH,
133 ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU
134 };
135
validate_arguments(const ITensorInfo * src,const ITensorInfo * dst,const ActivationLayerInfo & activation_info)136 Status validate_arguments(const ITensorInfo *src, const ITensorInfo *dst, const ActivationLayerInfo &activation_info)
137 {
138 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(src);
139 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::QASYMM8_SIGNED, DataType::QASYMM8, DataType::QSYMM16, DataType::F16, DataType::F32);
140
141 const auto *uk = CpuActivationKernel::get_implementation(ActivationDataTypeISASelectorData{ src->data_type(), CPUInfo::get().get_cpu_model(), CPUInfo::get().get_isa(), activation_info.activation() });
142 ARM_COMPUTE_RETURN_ERROR_ON(uk == nullptr || uk->ukernel == nullptr);
143
144 const DataType data_type = src->data_type();
145 const QuantizationInfo &oq_info = (dst != nullptr) ? dst->quantization_info() : src->quantization_info();
146 const ActivationLayerInfo::ActivationFunction f_act = activation_info.activation();
147
148 ARM_COMPUTE_RETURN_ERROR_ON_MSG(is_data_type_quantized_asymmetric(data_type) && (std::find(std::begin(qasymm8_activations), std::end(qasymm8_activations), f_act) == std::end(qasymm8_activations)),
149 "For QASYMM8 only hard swish, leaky relu, tanh, logistic, relu and lower/upper bounded relu are supported");
150
151 ARM_COMPUTE_RETURN_ERROR_ON_MSG(is_data_type_quantized_symmetric(data_type) && (std::find(std::begin(qsymm16_activations), std::end(qsymm16_activations), f_act) == std::end(qsymm16_activations)),
152 "For QSYMM16 only tanh and logistic are supported");
153 ARM_COMPUTE_RETURN_ERROR_ON((data_type == DataType::QASYMM8 || data_type == DataType::QASYMM16) && (f_act == ActivationLayerInfo::ActivationFunction::TANH)
154 && (oq_info != QuantizationInfo(1.f / 128.f, 128)));
155 ARM_COMPUTE_RETURN_ERROR_ON((data_type == DataType::QASYMM8 || data_type == DataType::QASYMM16) && (f_act == ActivationLayerInfo::ActivationFunction::LOGISTIC)
156 && (oq_info != QuantizationInfo(1.f / 256.f, 0)));
157
158 ARM_COMPUTE_RETURN_ERROR_ON(data_type == DataType::QASYMM8_SIGNED && (f_act == ActivationLayerInfo::ActivationFunction::TANH) && (oq_info != QuantizationInfo(1.f / 128.f, 0)));
159 ARM_COMPUTE_RETURN_ERROR_ON(data_type == DataType::QASYMM8_SIGNED && (f_act == ActivationLayerInfo::ActivationFunction::LOGISTIC) && (oq_info != QuantizationInfo(1.f / 256.f, -128)));
160
161 ARM_COMPUTE_RETURN_ERROR_ON(is_data_type_quantized_symmetric(data_type) && (f_act == ActivationLayerInfo::ActivationFunction::TANH) && (oq_info != QuantizationInfo(1.f / 32768.f, 0)));
162 ARM_COMPUTE_RETURN_ERROR_ON(is_data_type_quantized_symmetric(data_type) && (f_act == ActivationLayerInfo::ActivationFunction::LOGISTIC) && (oq_info != QuantizationInfo(1.f / 32768.f, 0)));
163
164 // Checks performed when dst is configured
165 if((dst != nullptr) && (dst->total_size() != 0))
166 {
167 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(src, dst);
168 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, dst);
169 }
170
171 return Status{};
172 }
173
validate_and_configure_window(const ITensorInfo * src,ITensorInfo * dst)174 std::pair<Status, Window> validate_and_configure_window(const ITensorInfo *src, ITensorInfo *dst)
175 {
176 // Configure kernel window
177 Window win = calculate_max_window(*src, Steps());
178
179 if(dst != nullptr)
180 {
181 // dst auto inizialitation if not yet initialized
182 auto_init_if_empty(*dst, *src->clone());
183 }
184
185 return std::make_pair(Status{}, win);
186 }
187 } // namespace
188
configure(const ITensorInfo * src,ITensorInfo * dst,ActivationLayerInfo activation_info)189 void CpuActivationKernel::configure(const ITensorInfo *src, ITensorInfo *dst, ActivationLayerInfo activation_info)
190 {
191 ARM_COMPUTE_UNUSED(dst);
192 ARM_COMPUTE_ERROR_ON_NULLPTR(src);
193 ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(src, dst, activation_info));
194
195 const auto uk = CpuActivationKernel::get_implementation(ActivationDataTypeISASelectorData{ src->data_type(), CPUInfo::get().get_cpu_model(), CPUInfo::get().get_isa(), activation_info.activation() });
196 if(dst != nullptr)
197 {
198 // dst auto inizialitation if not yet initialized
199 auto_init_if_empty(*dst, *src->clone());
200 }
201
202 ARM_COMPUTE_ERROR_ON_NULLPTR(uk);
203
204 _run_method = uk->ukernel;
205 _name = std::string("CpuActivationKernel").append("/").append(uk->name);
206
207 #ifdef __aarch64__
208 if(ActivationLayerInfo::is_lut_supported(activation_info.activation(), src->data_type()))
209 {
210 activation_info.init_lut(src->data_type(), src->quantization_info().uniform(), (dst) ? dst->quantization_info().uniform() : src->quantization_info().uniform());
211 }
212 #endif // __aarch64__
213 _act_info = activation_info;
214
215 Window win;
216
217 // Use squashed window
218 std::tie(win, _split_dimension) = calculate_squashed_or_max_window(*src);
219 ICPPKernel::configure(win);
220 }
221
validate(const ITensorInfo * src,const ITensorInfo * dst,const ActivationLayerInfo & act_info)222 Status CpuActivationKernel::validate(const ITensorInfo *src, const ITensorInfo *dst, const ActivationLayerInfo &act_info)
223 {
224 ARM_COMPUTE_UNUSED(act_info);
225 ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(src, dst, act_info));
226 ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(src->clone().get(), (dst != nullptr) ? dst->clone().get() : nullptr).first);
227
228 return Status{};
229 }
230
get_mws(const CPUInfo & platform,size_t thread_count) const231 size_t CpuActivationKernel::get_mws(const CPUInfo &platform, size_t thread_count) const
232 {
233 ARM_COMPUTE_UNUSED(thread_count);
234 ARM_COMPUTE_UNUSED(platform);
235
236 if(_split_dimension == Window::DimX)
237 {
238 // Don't split the work load too small if the tensor has been reinterpreted as 1D.
239 // This number is loosely chosen as threading overhead in each platform varies wildly.
240 return 1536;
241 }
242 return default_mws;
243 }
244
run_op(ITensorPack & tensors,const Window & window,const ThreadInfo & info)245 void CpuActivationKernel::run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info)
246 {
247 // Early exit on disabled activation
248 if(!_act_info.enabled())
249 {
250 return;
251 }
252
253 ARM_COMPUTE_UNUSED(info);
254 ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
255 ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
256
257 ARM_COMPUTE_ERROR_ON(tensors.empty());
258 ARM_COMPUTE_ERROR_ON(_run_method == nullptr);
259
260 const ITensor *src = tensors.get_const_tensor(TensorType::ACL_SRC);
261 ITensor *dst = tensors.get_tensor(TensorType::ACL_DST);
262
263 _run_method(src, dst, _act_info, window);
264 }
265
name() const266 const char *CpuActivationKernel::name() const
267 {
268 return _name.c_str();
269 }
270
get_available_kernels()271 const std::vector<CpuActivationKernel::ActivationKernel> &CpuActivationKernel::get_available_kernels()
272 {
273 return available_kernels;
274 }
275 } // namespace kernels
276 } // namespace cpu
277 } // namespace arm_compute
278