xref: /aosp_15_r20/external/coreboot/src/include/cpu/power/spr.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef CPU_PPC64_SPR_H
4 #define CPU_PPC64_SPR_H
5 
6 #include <arch/byteorder.h>	// PPC_BIT()
7 
8 #define SPR_TB					0x10C
9 
10 #define SPR_PVR					0x11F
11 #define SPR_PVR_REV_MASK			(PPC_BITMASK(52, 55) | PPC_BITMASK(60, 63))
12 #define SPR_PVR_REV(maj, min)			(PPC_SHIFT((maj), 55) | PPC_SHIFT((min), 63))
13 
14 #define SPR_HSPRG0				0x130
15 #define SPR_HSPRG1				0x131
16 
17 #define SPR_HRMOR				0x139
18 
19 #define SPR_HMER				0x150
20 /* Bits in HMER/HMEER */
21 #define SPR_HMER_MALFUNCTION_ALERT		PPC_BIT(0)
22 #define SPR_HMER_PROC_RECV_DONE			PPC_BIT(2)
23 #define SPR_HMER_PROC_RECV_ERROR_MASKED		PPC_BIT(3)
24 #define SPR_HMER_TFAC_ERROR			PPC_BIT(4)
25 #define SPR_HMER_TFMR_PARITY_ERROR		PPC_BIT(5)
26 #define SPR_HMER_XSCOM_FAIL			PPC_BIT(8)
27 #define SPR_HMER_XSCOM_DONE			PPC_BIT(9)
28 #define SPR_HMER_PROC_RECV_AGAIN		PPC_BIT(11)
29 #define SPR_HMER_WARN_RISE			PPC_BIT(14)
30 #define SPR_HMER_WARN_FALL			PPC_BIT(15)
31 #define SPR_HMER_SCOM_FIR_HMI			PPC_BIT(16)
32 #define SPR_HMER_TRIG_FIR_HMI			PPC_BIT(17)
33 #define SPR_HMER_HYP_RESOURCE_ERR		PPC_BIT(20)
34 #define SPR_HMER_XSCOM_STATUS			PPC_BITMASK(21, 23)
35 #define SPR_HMER_XSCOM_OCCUPIED			PPC_BIT(23)
36 
37 #ifndef __ASSEMBLER__
38 #include <types.h>
39 
read_spr(int spr)40 static inline uint64_t read_spr(int spr)
41 {
42 	uint64_t val;
43 	asm volatile("mfspr %0,%1" : "=r"(val) : "i"(spr) : "memory");
44 	return val;
45 }
46 
write_spr(int spr,uint64_t val)47 static inline void write_spr(int spr, uint64_t val)
48 {
49 	asm volatile("mtspr %0, %1" :: "i"(spr), "r"(val) : "memory");
50 }
51 
read_hmer(void)52 static inline uint64_t read_hmer(void)
53 {
54 	return read_spr(SPR_HMER);
55 }
56 
clear_hmer(void)57 static inline void clear_hmer(void)
58 {
59 	write_spr(SPR_HMER, 0);
60 }
61 
read_msr(void)62 static inline uint64_t read_msr(void)
63 {
64 	uint64_t val;
65 	asm volatile("mfmsr %0" : "=r"(val) :: "memory");
66 	return val;
67 }
68 
pvr_revision(void)69 static inline uint64_t pvr_revision(void)
70 {
71 	return read_spr(SPR_PVR) & SPR_PVR_REV_MASK;
72 }
73 
74 #endif /* __ASSEMBLER__ */
75 #endif /* CPU_PPC64_SPR_H */
76