1 /*
2 * Copyright (c) 2020, 2022-2023 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #ifndef ARM_COMPUTE_WRAPPER_CVT_H
25 #define ARM_COMPUTE_WRAPPER_CVT_H
26
27 #include <arm_neon.h>
28
29 namespace arm_compute
30 {
31 namespace wrapper
32 {
33 #define VCVT_TO_F32_IMPL(ptype, vtype, prefix, postfix1, postfix2) \
34 template <typename T> \
35 inline typename std::enable_if<std::is_same<T, float>::value, float32x4_t>::type \
36 vcvt(const vtype &a) \
37 { \
38 return prefix##_##postfix1##_##postfix2(a); \
39 }
40
VCVT_TO_F32_IMPL(float32x4_t,uint32x4_t,vcvtq,f32,u32)41 VCVT_TO_F32_IMPL(float32x4_t, uint32x4_t, vcvtq, f32, u32)
42 VCVT_TO_F32_IMPL(float32x4_t, int32x4_t, vcvtq, f32, s32)
43 #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
44 VCVT_TO_F32_IMPL(float32x4_t, float16x4_t, vcvt, f32, f16)
45 #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
46 #undef VCVT_TO_F32_IMPL
47
48 #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
49 #define VCVT_TO_F16_IMPL(ptype, vtype, prefix, postfix1, postfix2) \
50 template <typename T> \
51 inline typename std::enable_if<std::is_same<T, float16_t>::value, float16x4_t>::type \
52 vcvt(const vtype &a) \
53 { \
54 return prefix##_##postfix1##_##postfix2(a); \
55 }
56
57 VCVT_TO_F16_IMPL(float16x4_t, float32x4_t, vcvt, f16, f32)
58 #undef VCVT_TO_F16_IMPL
59 #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
60
61 template <typename T>
62 inline typename std::enable_if < std::is_same<T, uint8_t>::value || std::is_same<T, uint32_t>::value, uint32x4_t >::type
63 vcvt(const float32x4_t &a)
64 {
65 return vcvtq_u32_f32(a);
66 }
67
68 template <typename T>
69 inline typename std::enable_if < std::is_same<T, int8_t>::value || std::is_same<T, int32_t>::value, int32x4_t >::type
vcvt(const float32x4_t & a)70 vcvt(const float32x4_t &a)
71 {
72 return vcvtq_s32_f32(a);
73 }
74
75 #ifdef __aarch64__
76 template <typename T>
77 inline typename std::enable_if<std::is_same<T, uint32_t>::value, uint32x4_t>::type
vcvta(const float32x4_t & a)78 vcvta(const float32x4_t &a)
79 {
80 return vcvtaq_u32_f32(a);
81 }
82
83 template <typename T>
84 inline typename std::enable_if<std::is_same<T, int32_t>::value, int32x4_t>::type
vcvta(const float32x4_t & a)85 vcvta(const float32x4_t &a)
86 {
87 return vcvtaq_s32_f32(a);
88 }
89 #endif //__aarch64__
90
91 #if defined(ARM_COMPUTE_ENABLE_BF16)
92 /** Convert 2x128-bit floating point vectors into 1x128-bit bfloat16 vector
93 *
94 * @param[in] inptr Pointer to the input memory to load values from
95 * @param[in,out] outptr Pointer to the output memory to store values to
96 */
vcvt_bf16_f32(const float * inptr,uint16_t * outptr)97 inline void vcvt_bf16_f32(const float *inptr, uint16_t *outptr)
98 {
99 __asm __volatile(
100 "ldp q0, q1, [%[inptr]]\n"
101 ".inst 0xea16800\n" // BFCVTN v0, v0
102 ".inst 0x4ea16820\n" // BFCVTN2 v0, v1
103 "str q0, [%[outptr]]\n"
104 : [inptr] "+r"(inptr)
105 : [outptr] "r"(outptr)
106 : "v0", "v1", "memory");
107 }
108 #endif /* defined(ARM_COMPUTE_ENABLE_BF16) */
109
110 } // namespace wrapper
111 } // namespace arm_compute
112 #endif /* ARM_COMPUTE_WRAPPER_CVT_H */
113