1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
4 *
5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <[email protected]>
6 *
7 * Based on the DaVinci "glue layer" code.
8 * Copyright (C) 2005-2006 by Texas Instruments
9 *
10 * DT support
11 * Copyright (c) 2016 Petr Kulhavy <[email protected]>
12 *
13 * This file is part of the Inventra Controller Driver for Linux.
14 */
15
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/err.h>
19 #include <linux/io.h>
20 #include <linux/of.h>
21 #include <linux/of_platform.h>
22 #include <linux/phy/phy.h>
23 #include <linux/platform_device.h>
24 #include <linux/string_choices.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/usb/usb_phy_generic.h>
27
28 #include "musb_core.h"
29
30 /*
31 * DA8XX specific definitions
32 */
33
34 /* USB 2.0 OTG module registers */
35 #define DA8XX_USB_REVISION_REG 0x00
36 #define DA8XX_USB_CTRL_REG 0x04
37 #define DA8XX_USB_STAT_REG 0x08
38 #define DA8XX_USB_EMULATION_REG 0x0c
39 #define DA8XX_USB_SRP_FIX_TIME_REG 0x18
40 #define DA8XX_USB_INTR_SRC_REG 0x20
41 #define DA8XX_USB_INTR_SRC_SET_REG 0x24
42 #define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
43 #define DA8XX_USB_INTR_MASK_REG 0x2c
44 #define DA8XX_USB_INTR_MASK_SET_REG 0x30
45 #define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
46 #define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
47 #define DA8XX_USB_END_OF_INTR_REG 0x3c
48 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
49
50 /* Control register bits */
51 #define DA8XX_SOFT_RESET_MASK 1
52
53 #define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */
54 #define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */
55
56 /* USB interrupt register bits */
57 #define DA8XX_INTR_USB_SHIFT 16
58 #define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
59 /* interrupts and DRVVBUS interrupt */
60 #define DA8XX_INTR_DRVVBUS 0x100
61 #define DA8XX_INTR_RX_SHIFT 8
62 #define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
63 #define DA8XX_INTR_TX_SHIFT 0
64 #define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
65
66 #define DA8XX_MENTOR_CORE_OFFSET 0x400
67
68 struct da8xx_glue {
69 struct device *dev;
70 struct platform_device *musb;
71 struct platform_device *usb_phy;
72 struct clk *clk;
73 struct phy *phy;
74 };
75
76 /*
77 * Because we don't set CTRL.UINT, it's "important" to:
78 * - not read/write INTRUSB/INTRUSBE (except during
79 * initial setup, as a workaround);
80 * - use INTSET/INTCLR instead.
81 */
82
83 /**
84 * da8xx_musb_enable - enable interrupts
85 */
da8xx_musb_enable(struct musb * musb)86 static void da8xx_musb_enable(struct musb *musb)
87 {
88 void __iomem *reg_base = musb->ctrl_base;
89 u32 mask;
90
91 /* Workaround: setup IRQs through both register sets. */
92 mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
93 ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
94 DA8XX_INTR_USB_MASK;
95 musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
96
97 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
98 musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
99 DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
100 }
101
102 /**
103 * da8xx_musb_disable - disable HDRC and flush interrupts
104 */
da8xx_musb_disable(struct musb * musb)105 static void da8xx_musb_disable(struct musb *musb)
106 {
107 void __iomem *reg_base = musb->ctrl_base;
108
109 musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
110 DA8XX_INTR_USB_MASK |
111 DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
112 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
113 }
114
115 #define portstate(stmt) stmt
116
da8xx_musb_set_vbus(struct musb * musb,int is_on)117 static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
118 {
119 WARN_ON(is_on && is_peripheral_active(musb));
120 }
121
122 #define POLL_SECONDS 2
123
otg_timer(struct timer_list * t)124 static void otg_timer(struct timer_list *t)
125 {
126 struct musb *musb = from_timer(musb, t, dev_timer);
127 void __iomem *mregs = musb->mregs;
128 u8 devctl;
129 unsigned long flags;
130
131 /*
132 * We poll because DaVinci's won't expose several OTG-critical
133 * status change events (from the transceiver) otherwise.
134 */
135 devctl = musb_readb(mregs, MUSB_DEVCTL);
136 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
137 usb_otg_state_string(musb->xceiv->otg->state));
138
139 spin_lock_irqsave(&musb->lock, flags);
140 switch (musb->xceiv->otg->state) {
141 case OTG_STATE_A_WAIT_BCON:
142 devctl &= ~MUSB_DEVCTL_SESSION;
143 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
144
145 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
146 if (devctl & MUSB_DEVCTL_BDEVICE) {
147 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
148 MUSB_DEV_MODE(musb);
149 } else {
150 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
151 MUSB_HST_MODE(musb);
152 }
153 break;
154 case OTG_STATE_A_WAIT_VFALL:
155 /*
156 * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3
157 * RTL seems to mis-handle session "start" otherwise (or in
158 * our case "recover"), in routine "VBUS was valid by the time
159 * VBUSERR got reported during enumeration" cases.
160 */
161 if (devctl & MUSB_DEVCTL_VBUS) {
162 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
163 break;
164 }
165 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
166 musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
167 MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
168 break;
169 case OTG_STATE_B_IDLE:
170 /*
171 * There's no ID-changed IRQ, so we have no good way to tell
172 * when to switch to the A-Default state machine (by setting
173 * the DEVCTL.Session bit).
174 *
175 * Workaround: whenever we're in B_IDLE, try setting the
176 * session flag every few seconds. If it works, ID was
177 * grounded and we're now in the A-Default state machine.
178 *
179 * NOTE: setting the session flag is _supposed_ to trigger
180 * SRP but clearly it doesn't.
181 */
182 musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
183 devctl = musb_readb(mregs, MUSB_DEVCTL);
184 if (devctl & MUSB_DEVCTL_BDEVICE)
185 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
186 else
187 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
188 break;
189 default:
190 break;
191 }
192 spin_unlock_irqrestore(&musb->lock, flags);
193 }
194
da8xx_musb_try_idle(struct musb * musb,unsigned long timeout)195 static void __maybe_unused da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
196 {
197 static unsigned long last_timer;
198
199 if (timeout == 0)
200 timeout = jiffies + msecs_to_jiffies(3);
201
202 /* Never idle if active, or when VBUS timeout is not set as host */
203 if (musb->is_active || (musb->a_wait_bcon == 0 &&
204 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
205 dev_dbg(musb->controller, "%s active, deleting timer\n",
206 usb_otg_state_string(musb->xceiv->otg->state));
207 del_timer(&musb->dev_timer);
208 last_timer = jiffies;
209 return;
210 }
211
212 if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) {
213 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
214 return;
215 }
216 last_timer = timeout;
217
218 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
219 usb_otg_state_string(musb->xceiv->otg->state),
220 jiffies_to_msecs(timeout - jiffies));
221 mod_timer(&musb->dev_timer, timeout);
222 }
223
da8xx_babble_recover(struct musb * musb)224 static int da8xx_babble_recover(struct musb *musb)
225 {
226 dev_dbg(musb->controller, "resetting controller to recover from babble\n");
227 musb_writel(musb->ctrl_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
228 return 0;
229 }
230
da8xx_musb_interrupt(int irq,void * hci)231 static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
232 {
233 struct musb *musb = hci;
234 void __iomem *reg_base = musb->ctrl_base;
235 unsigned long flags;
236 irqreturn_t ret = IRQ_NONE;
237 u32 status;
238
239 spin_lock_irqsave(&musb->lock, flags);
240
241 /*
242 * NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through
243 * the Mentor registers (except for setup), use the TI ones and EOI.
244 */
245
246 /* Acknowledge and handle non-CPPI interrupts */
247 status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
248 if (!status)
249 goto eoi;
250
251 musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
252 dev_dbg(musb->controller, "USB IRQ %08x\n", status);
253
254 musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
255 musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
256 musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
257
258 /*
259 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
260 * DA8xx's missing ID change IRQ. We need an ID change IRQ to
261 * switch appropriately between halves of the OTG state machine.
262 * Managing DEVCTL.Session per Mentor docs requires that we know its
263 * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
264 * Also, DRVVBUS pulses for SRP (but not at 5 V)...
265 */
266 if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
267 int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
268 void __iomem *mregs = musb->mregs;
269 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
270 int err;
271
272 err = musb->int_usb & MUSB_INTR_VBUSERROR;
273 if (err) {
274 /*
275 * The Mentor core doesn't debounce VBUS as needed
276 * to cope with device connect current spikes. This
277 * means it's not uncommon for bus-powered devices
278 * to get VBUS errors during enumeration.
279 *
280 * This is a workaround, but newer RTL from Mentor
281 * seems to allow a better one: "re"-starting sessions
282 * without waiting for VBUS to stop registering in
283 * devctl.
284 */
285 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
286 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
287 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
288 WARNING("VBUS error workaround (delay coming)\n");
289 } else if (drvvbus) {
290 MUSB_HST_MODE(musb);
291 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
292 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
293 del_timer(&musb->dev_timer);
294 } else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
295 /*
296 * When babble condition happens, drvvbus interrupt
297 * is also generated. Ignore this drvvbus interrupt
298 * and let babble interrupt handler recovers the
299 * controller; otherwise, the host-mode flag is lost
300 * due to the MUSB_DEV_MODE() call below and babble
301 * recovery logic will not be called.
302 */
303 musb->is_active = 0;
304 MUSB_DEV_MODE(musb);
305 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
306 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
307 }
308
309 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
310 str_on_off(drvvbus),
311 usb_otg_state_string(musb->xceiv->otg->state),
312 err ? " ERROR" : "",
313 devctl);
314 ret = IRQ_HANDLED;
315 }
316
317 if (musb->int_tx || musb->int_rx || musb->int_usb)
318 ret |= musb_interrupt(musb);
319
320 eoi:
321 /* EOI needs to be written for the IRQ to be re-asserted. */
322 if (ret == IRQ_HANDLED || status)
323 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
324
325 /* Poll for ID change */
326 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
327 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
328
329 spin_unlock_irqrestore(&musb->lock, flags);
330
331 return ret;
332 }
333
da8xx_musb_set_mode(struct musb * musb,u8 musb_mode)334 static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
335 {
336 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
337 enum phy_mode phy_mode;
338
339 switch (musb_mode) {
340 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
341 phy_mode = PHY_MODE_USB_HOST;
342 break;
343 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
344 phy_mode = PHY_MODE_USB_DEVICE;
345 break;
346 case MUSB_OTG: /* Don't override the VBUS/ID comparators */
347 phy_mode = PHY_MODE_USB_OTG;
348 break;
349 default:
350 return -EINVAL;
351 }
352
353 return phy_set_mode(glue->phy, phy_mode);
354 }
355
da8xx_musb_init(struct musb * musb)356 static int da8xx_musb_init(struct musb *musb)
357 {
358 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
359 void __iomem *reg_base = musb->ctrl_base;
360 u32 rev;
361 int ret = -ENODEV;
362
363 musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
364
365 ret = clk_prepare_enable(glue->clk);
366 if (ret) {
367 dev_err(glue->dev, "failed to enable clock\n");
368 return ret;
369 }
370
371 /* Returns zero if e.g. not clocked */
372 rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
373 if (!rev) {
374 ret = -ENODEV;
375 goto fail;
376 }
377
378 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
379 if (IS_ERR_OR_NULL(musb->xceiv)) {
380 ret = -EPROBE_DEFER;
381 goto fail;
382 }
383
384 timer_setup(&musb->dev_timer, otg_timer, 0);
385
386 /* Reset the controller */
387 musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
388
389 /* Start the on-chip PHY and its PLL. */
390 ret = phy_init(glue->phy);
391 if (ret) {
392 dev_err(glue->dev, "Failed to init phy.\n");
393 goto fail;
394 }
395
396 ret = phy_power_on(glue->phy);
397 if (ret) {
398 dev_err(glue->dev, "Failed to power on phy.\n");
399 goto err_phy_power_on;
400 }
401
402 msleep(5);
403
404 /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
405 pr_debug("DA8xx OTG revision %08x, control %02x\n", rev,
406 musb_readb(reg_base, DA8XX_USB_CTRL_REG));
407
408 musb->isr = da8xx_musb_interrupt;
409 return 0;
410
411 err_phy_power_on:
412 phy_exit(glue->phy);
413 fail:
414 clk_disable_unprepare(glue->clk);
415 return ret;
416 }
417
da8xx_musb_exit(struct musb * musb)418 static int da8xx_musb_exit(struct musb *musb)
419 {
420 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
421
422 del_timer_sync(&musb->dev_timer);
423
424 phy_power_off(glue->phy);
425 phy_exit(glue->phy);
426 clk_disable_unprepare(glue->clk);
427
428 usb_put_phy(musb->xceiv);
429
430 return 0;
431 }
432
get_vbus_power(struct device * dev)433 static inline u8 get_vbus_power(struct device *dev)
434 {
435 struct regulator *vbus_supply;
436 int current_uA;
437
438 vbus_supply = regulator_get_optional(dev, "vbus");
439 if (IS_ERR(vbus_supply))
440 return 255;
441 current_uA = regulator_get_current_limit(vbus_supply);
442 regulator_put(vbus_supply);
443 if (current_uA <= 0 || current_uA > 510000)
444 return 255;
445 return current_uA / 1000 / 2;
446 }
447
448 #ifdef CONFIG_USB_TI_CPPI41_DMA
da8xx_dma_controller_callback(struct dma_controller * c)449 static void da8xx_dma_controller_callback(struct dma_controller *c)
450 {
451 struct musb *musb = c->musb;
452 void __iomem *reg_base = musb->ctrl_base;
453
454 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
455 }
456
457 static struct dma_controller *
da8xx_dma_controller_create(struct musb * musb,void __iomem * base)458 da8xx_dma_controller_create(struct musb *musb, void __iomem *base)
459 {
460 struct dma_controller *controller;
461
462 controller = cppi41_dma_controller_create(musb, base);
463 if (IS_ERR_OR_NULL(controller))
464 return controller;
465
466 controller->dma_callback = da8xx_dma_controller_callback;
467
468 return controller;
469 }
470 #endif
471
472 static const struct musb_platform_ops da8xx_ops = {
473 .quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION |
474 MUSB_DMA_CPPI41 | MUSB_DA8XX,
475 .init = da8xx_musb_init,
476 .exit = da8xx_musb_exit,
477
478 .fifo_mode = 2,
479 #ifdef CONFIG_USB_TI_CPPI41_DMA
480 .dma_init = da8xx_dma_controller_create,
481 .dma_exit = cppi41_dma_controller_destroy,
482 #endif
483 .enable = da8xx_musb_enable,
484 .disable = da8xx_musb_disable,
485
486 .set_mode = da8xx_musb_set_mode,
487
488 #ifndef CONFIG_USB_MUSB_HOST
489 .try_idle = da8xx_musb_try_idle,
490 #endif
491 .recover = da8xx_babble_recover,
492
493 .set_vbus = da8xx_musb_set_vbus,
494 };
495
496 static const struct platform_device_info da8xx_dev_info = {
497 .name = "musb-hdrc",
498 .id = PLATFORM_DEVID_AUTO,
499 .dma_mask = DMA_BIT_MASK(32),
500 };
501
502 static const struct musb_hdrc_config da8xx_config = {
503 .ram_bits = 10,
504 .num_eps = 5,
505 .multipoint = 1,
506 };
507
508 static struct of_dev_auxdata da8xx_auxdata_lookup[] = {
509 OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine",
510 NULL),
511 {}
512 };
513
da8xx_probe(struct platform_device * pdev)514 static int da8xx_probe(struct platform_device *pdev)
515 {
516 struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
517 struct da8xx_glue *glue;
518 struct platform_device_info pinfo;
519 struct clk *clk;
520 struct device_node *np = pdev->dev.of_node;
521 int ret;
522
523 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
524 if (!glue)
525 return -ENOMEM;
526
527 clk = devm_clk_get(&pdev->dev, NULL);
528 if (IS_ERR(clk)) {
529 dev_err(&pdev->dev, "failed to get clock\n");
530 return PTR_ERR(clk);
531 }
532
533 glue->phy = devm_phy_get(&pdev->dev, "usb-phy");
534 if (IS_ERR(glue->phy))
535 return dev_err_probe(&pdev->dev, PTR_ERR(glue->phy),
536 "failed to get phy\n");
537
538 glue->dev = &pdev->dev;
539 glue->clk = clk;
540
541 if (IS_ENABLED(CONFIG_OF) && np) {
542 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
543 if (!pdata)
544 return -ENOMEM;
545
546 pdata->config = &da8xx_config;
547 pdata->mode = musb_get_mode(&pdev->dev);
548 pdata->power = get_vbus_power(&pdev->dev);
549 }
550
551 pdata->platform_ops = &da8xx_ops;
552
553 glue->usb_phy = usb_phy_generic_register();
554 ret = PTR_ERR_OR_ZERO(glue->usb_phy);
555 if (ret) {
556 dev_err(&pdev->dev, "failed to register usb_phy\n");
557 return ret;
558 }
559 platform_set_drvdata(pdev, glue);
560
561 ret = of_platform_populate(pdev->dev.of_node, NULL,
562 da8xx_auxdata_lookup, &pdev->dev);
563 if (ret)
564 goto err_unregister_phy;
565
566 pinfo = da8xx_dev_info;
567 pinfo.parent = &pdev->dev;
568 pinfo.res = pdev->resource;
569 pinfo.num_res = pdev->num_resources;
570 pinfo.data = pdata;
571 pinfo.size_data = sizeof(*pdata);
572 pinfo.fwnode = of_fwnode_handle(np);
573 pinfo.of_node_reused = true;
574
575 glue->musb = platform_device_register_full(&pinfo);
576 ret = PTR_ERR_OR_ZERO(glue->musb);
577 if (ret) {
578 dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
579 goto err_unregister_phy;
580 }
581
582 return 0;
583
584 err_unregister_phy:
585 usb_phy_generic_unregister(glue->usb_phy);
586 return ret;
587 }
588
da8xx_remove(struct platform_device * pdev)589 static void da8xx_remove(struct platform_device *pdev)
590 {
591 struct da8xx_glue *glue = platform_get_drvdata(pdev);
592
593 platform_device_unregister(glue->musb);
594 usb_phy_generic_unregister(glue->usb_phy);
595 }
596
597 #ifdef CONFIG_PM_SLEEP
da8xx_suspend(struct device * dev)598 static int da8xx_suspend(struct device *dev)
599 {
600 int ret;
601 struct da8xx_glue *glue = dev_get_drvdata(dev);
602
603 ret = phy_power_off(glue->phy);
604 if (ret)
605 return ret;
606 clk_disable_unprepare(glue->clk);
607
608 return 0;
609 }
610
da8xx_resume(struct device * dev)611 static int da8xx_resume(struct device *dev)
612 {
613 int ret;
614 struct da8xx_glue *glue = dev_get_drvdata(dev);
615
616 ret = clk_prepare_enable(glue->clk);
617 if (ret)
618 return ret;
619 return phy_power_on(glue->phy);
620 }
621 #endif
622
623 static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
624
625 #ifdef CONFIG_OF
626 static const struct of_device_id da8xx_id_table[] = {
627 {
628 .compatible = "ti,da830-musb",
629 },
630 {},
631 };
632 MODULE_DEVICE_TABLE(of, da8xx_id_table);
633 #endif
634
635 static struct platform_driver da8xx_driver = {
636 .probe = da8xx_probe,
637 .remove = da8xx_remove,
638 .driver = {
639 .name = "musb-da8xx",
640 .pm = &da8xx_pm_ops,
641 .of_match_table = of_match_ptr(da8xx_id_table),
642 },
643 };
644
645 MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer");
646 MODULE_AUTHOR("Sergei Shtylyov <[email protected]>");
647 MODULE_LICENSE("GPL v2");
648 module_platform_driver(da8xx_driver);
649