xref: /aosp_15_r20/external/coreboot/src/include/device/pciexp.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef DEVICE_PCIEXP_H
4 #define DEVICE_PCIEXP_H
5 /* (c) 2005 Linux Networx GPL see COPYING for details */
6 
7 enum aspm_type {
8 	PCIE_ASPM_NONE = 0,
9 	PCIE_ASPM_L0S  = 1,
10 	PCIE_ASPM_L1   = 2,
11 	PCIE_ASPM_BOTH = 3,
12 };
13 
14 #define ASPM_LTR_L12_THRESHOLD_VALUE_OFFSET 16
15 #define ASPM_LTR_L12_THRESHOLD_VALUE_MASK (0x3ff << ASPM_LTR_L12_THRESHOLD_VALUE_OFFSET)
16 #define ASPM_LTR_L12_THRESHOLD_SCALE_OFFSET 29
17 #define ASPM_LTR_L12_THRESHOLD_SCALE_MASK (0x7 << ASPM_LTR_L12_THRESHOLD_SCALE_OFFSET)
18 
19 /* Latency tolerance reporting, max non-snoop latency value 3.14ms */
20 #define PCIE_LTR_MAX_NO_SNOOP_LATENCY_3146US 0x1003
21 /* Latency tolerance reporting, max snoop latency value 3.14ms */
22 #define PCIE_LTR_MAX_SNOOP_LATENCY_3146US 0x1003
23 
24 void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
25 			     unsigned int max_devfn);
26 
27 void pciexp_scan_bridge(struct device *dev);
28 
29 extern struct device_operations default_pciexp_ops_bus;
30 
31 void pciexp_hotplug_scan_bridge(struct device *dev);
32 
33 extern struct device_operations default_pciexp_hotplug_ops_bus;
34 
35 unsigned int pciexp_find_extended_cap(const struct device *dev, unsigned int cap,
36 				      unsigned int offset);
37 unsigned int pciexp_find_ext_vendor_cap(const struct device *dev, unsigned int cap,
38 					unsigned int offset);
39 
pciexp_is_downstream_port(int type)40 static inline bool pciexp_is_downstream_port(int type)
41 {
42 	return type == PCI_EXP_TYPE_ROOT_PORT ||
43 	       type == PCI_EXP_TYPE_DOWNSTREAM ||
44 	       type == PCI_EXP_TYPE_PCIE_BRIDGE;
45 }
46 
47 struct device *pcie_find_dsn(const uint64_t serial, const uint16_t vid,
48 	struct device *from);
49 
50 bool pciexp_get_ltr_max_latencies(struct device *dev, u16 *max_snoop, u16 *max_nosnoop);
51 
52 #endif /* DEVICE_PCIEXP_H */
53