1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * BQ27xxx battery driver
4 *
5 * Copyright (C) 2008 Rodolfo Giometti <[email protected]>
6 * Copyright (C) 2008 Eurotech S.p.A. <[email protected]>
7 * Copyright (C) 2010-2011 Lars-Peter Clausen <[email protected]>
8 * Copyright (C) 2011 Pali Rohár <[email protected]>
9 * Copyright (C) 2017 Liam Breck <[email protected]>
10 *
11 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
12 *
13 * Datasheets:
14 * https://www.ti.com/product/bq27000
15 * https://www.ti.com/product/bq27200
16 * https://www.ti.com/product/bq27010
17 * https://www.ti.com/product/bq27210
18 * https://www.ti.com/product/bq27500
19 * https://www.ti.com/product/bq27510-g1
20 * https://www.ti.com/product/bq27510-g2
21 * https://www.ti.com/product/bq27510-g3
22 * https://www.ti.com/product/bq27520-g1
23 * https://www.ti.com/product/bq27520-g2
24 * https://www.ti.com/product/bq27520-g3
25 * https://www.ti.com/product/bq27520-g4
26 * https://www.ti.com/product/bq27530-g1
27 * https://www.ti.com/product/bq27531-g1
28 * https://www.ti.com/product/bq27541-g1
29 * https://www.ti.com/product/bq27542-g1
30 * https://www.ti.com/product/bq27546-g1
31 * https://www.ti.com/product/bq27742-g1
32 * https://www.ti.com/product/bq27545-g1
33 * https://www.ti.com/product/bq27421-g1
34 * https://www.ti.com/product/bq27425-g1
35 * https://www.ti.com/product/bq27426
36 * https://www.ti.com/product/bq27411-g1
37 * https://www.ti.com/product/bq27441-g1
38 * https://www.ti.com/product/bq27621-g1
39 * https://www.ti.com/product/bq27z561
40 * https://www.ti.com/product/bq28z610
41 * https://www.ti.com/product/bq34z100-g1
42 * https://www.ti.com/product/bq78z100
43 */
44
45 #include <linux/device.h>
46 #include <linux/module.h>
47 #include <linux/mutex.h>
48 #include <linux/param.h>
49 #include <linux/jiffies.h>
50 #include <linux/workqueue.h>
51 #include <linux/delay.h>
52 #include <linux/platform_device.h>
53 #include <linux/power_supply.h>
54 #include <linux/slab.h>
55 #include <linux/of.h>
56
57 #include <linux/power/bq27xxx_battery.h>
58
59 #define BQ27XXX_MANUFACTURER "Texas Instruments"
60
61 /* BQ27XXX Flags */
62 #define BQ27XXX_FLAG_DSC BIT(0)
63 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */
64 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */
65 #define BQ27XXX_FLAG_CFGUP BIT(4)
66 #define BQ27XXX_FLAG_FC BIT(9)
67 #define BQ27XXX_FLAG_OTD BIT(14)
68 #define BQ27XXX_FLAG_OTC BIT(15)
69 #define BQ27XXX_FLAG_UT BIT(14)
70 #define BQ27XXX_FLAG_OT BIT(15)
71
72 /* BQ27000 has different layout for Flags register */
73 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */
74 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */
75 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */
76 #define BQ27000_FLAG_FC BIT(5)
77 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */
78
79 /* BQ27Z561 has different layout for Flags register */
80 #define BQ27Z561_FLAG_FDC BIT(4) /* Battery fully discharged */
81 #define BQ27Z561_FLAG_FC BIT(5) /* Battery fully charged */
82 #define BQ27Z561_FLAG_DIS_CH BIT(6) /* Battery is discharging */
83
84 /* control register params */
85 #define BQ27XXX_SEALED 0x20
86 #define BQ27XXX_SET_CFGUPDATE 0x13
87 #define BQ27XXX_SOFT_RESET 0x42
88 #define BQ27XXX_RESET 0x41
89
90 #define BQ27XXX_RS (20) /* Resistor sense mOhm */
91 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */
92 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */
93
94 #define INVALID_REG_ADDR 0xff
95
96 /*
97 * bq27xxx_reg_index - Register names
98 *
99 * These are indexes into a device's register mapping array.
100 */
101
102 enum bq27xxx_reg_index {
103 BQ27XXX_REG_CTRL = 0, /* Control */
104 BQ27XXX_REG_TEMP, /* Temperature */
105 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */
106 BQ27XXX_REG_VOLT, /* Voltage */
107 BQ27XXX_REG_AI, /* Average Current */
108 BQ27XXX_REG_FLAGS, /* Flags */
109 BQ27XXX_REG_TTE, /* Time-to-Empty */
110 BQ27XXX_REG_TTF, /* Time-to-Full */
111 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */
112 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */
113 BQ27XXX_REG_NAC, /* Nominal Available Capacity */
114 BQ27XXX_REG_RC, /* Remaining Capacity */
115 BQ27XXX_REG_FCC, /* Full Charge Capacity */
116 BQ27XXX_REG_CYCT, /* Cycle Count */
117 BQ27XXX_REG_AE, /* Available Energy */
118 BQ27XXX_REG_SOC, /* State-of-Charge */
119 BQ27XXX_REG_DCAP, /* Design Capacity */
120 BQ27XXX_REG_AP, /* Average Power */
121 BQ27XXX_DM_CTRL, /* Block Data Control */
122 BQ27XXX_DM_CLASS, /* Data Class */
123 BQ27XXX_DM_BLOCK, /* Data Block */
124 BQ27XXX_DM_DATA, /* Block Data */
125 BQ27XXX_DM_CKSUM, /* Block Data Checksum */
126 BQ27XXX_REG_SEDVF, /* End-of-discharge Voltage */
127 BQ27XXX_REG_MAX, /* sentinel */
128 };
129
130 #define BQ27XXX_DM_REG_ROWS \
131 [BQ27XXX_DM_CTRL] = 0x61, \
132 [BQ27XXX_DM_CLASS] = 0x3e, \
133 [BQ27XXX_DM_BLOCK] = 0x3f, \
134 [BQ27XXX_DM_DATA] = 0x40, \
135 [BQ27XXX_DM_CKSUM] = 0x60
136
137 /* Register mappings */
138 static u8
139 bq27000_regs[BQ27XXX_REG_MAX] = {
140 [BQ27XXX_REG_CTRL] = 0x00,
141 [BQ27XXX_REG_TEMP] = 0x06,
142 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
143 [BQ27XXX_REG_VOLT] = 0x08,
144 [BQ27XXX_REG_AI] = 0x14,
145 [BQ27XXX_REG_FLAGS] = 0x0a,
146 [BQ27XXX_REG_TTE] = 0x16,
147 [BQ27XXX_REG_TTF] = 0x18,
148 [BQ27XXX_REG_TTES] = 0x1c,
149 [BQ27XXX_REG_TTECP] = 0x26,
150 [BQ27XXX_REG_NAC] = 0x0c,
151 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
152 [BQ27XXX_REG_FCC] = 0x12,
153 [BQ27XXX_REG_CYCT] = 0x2a,
154 [BQ27XXX_REG_AE] = 0x22,
155 [BQ27XXX_REG_SOC] = 0x0b,
156 [BQ27XXX_REG_DCAP] = 0x76,
157 [BQ27XXX_REG_AP] = 0x24,
158 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
159 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
160 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
161 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
162 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
163 [BQ27XXX_REG_SEDVF] = 0x77,
164 },
165 bq27010_regs[BQ27XXX_REG_MAX] = {
166 [BQ27XXX_REG_CTRL] = 0x00,
167 [BQ27XXX_REG_TEMP] = 0x06,
168 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
169 [BQ27XXX_REG_VOLT] = 0x08,
170 [BQ27XXX_REG_AI] = 0x14,
171 [BQ27XXX_REG_FLAGS] = 0x0a,
172 [BQ27XXX_REG_TTE] = 0x16,
173 [BQ27XXX_REG_TTF] = 0x18,
174 [BQ27XXX_REG_TTES] = 0x1c,
175 [BQ27XXX_REG_TTECP] = 0x26,
176 [BQ27XXX_REG_NAC] = 0x0c,
177 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
178 [BQ27XXX_REG_FCC] = 0x12,
179 [BQ27XXX_REG_CYCT] = 0x2a,
180 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
181 [BQ27XXX_REG_SOC] = 0x0b,
182 [BQ27XXX_REG_DCAP] = 0x76,
183 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
184 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
185 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
186 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
187 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
188 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
189 [BQ27XXX_REG_SEDVF] = 0x77,
190 },
191 bq2750x_regs[BQ27XXX_REG_MAX] = {
192 [BQ27XXX_REG_CTRL] = 0x00,
193 [BQ27XXX_REG_TEMP] = 0x06,
194 [BQ27XXX_REG_INT_TEMP] = 0x28,
195 [BQ27XXX_REG_VOLT] = 0x08,
196 [BQ27XXX_REG_AI] = 0x14,
197 [BQ27XXX_REG_FLAGS] = 0x0a,
198 [BQ27XXX_REG_TTE] = 0x16,
199 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
200 [BQ27XXX_REG_TTES] = 0x1a,
201 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
202 [BQ27XXX_REG_NAC] = 0x0c,
203 [BQ27XXX_REG_RC] = 0x10,
204 [BQ27XXX_REG_FCC] = 0x12,
205 [BQ27XXX_REG_CYCT] = 0x2a,
206 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
207 [BQ27XXX_REG_SOC] = 0x2c,
208 [BQ27XXX_REG_DCAP] = 0x3c,
209 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
210 BQ27XXX_DM_REG_ROWS,
211 },
212 #define bq2751x_regs bq27510g3_regs
213 #define bq2752x_regs bq27510g3_regs
214 bq27500_regs[BQ27XXX_REG_MAX] = {
215 [BQ27XXX_REG_CTRL] = 0x00,
216 [BQ27XXX_REG_TEMP] = 0x06,
217 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
218 [BQ27XXX_REG_VOLT] = 0x08,
219 [BQ27XXX_REG_AI] = 0x14,
220 [BQ27XXX_REG_FLAGS] = 0x0a,
221 [BQ27XXX_REG_TTE] = 0x16,
222 [BQ27XXX_REG_TTF] = 0x18,
223 [BQ27XXX_REG_TTES] = 0x1c,
224 [BQ27XXX_REG_TTECP] = 0x26,
225 [BQ27XXX_REG_NAC] = 0x0c,
226 [BQ27XXX_REG_RC] = 0x10,
227 [BQ27XXX_REG_FCC] = 0x12,
228 [BQ27XXX_REG_CYCT] = 0x2a,
229 [BQ27XXX_REG_AE] = 0x22,
230 [BQ27XXX_REG_SOC] = 0x2c,
231 [BQ27XXX_REG_DCAP] = 0x3c,
232 [BQ27XXX_REG_AP] = 0x24,
233 BQ27XXX_DM_REG_ROWS,
234 },
235 #define bq27510g1_regs bq27500_regs
236 #define bq27510g2_regs bq27500_regs
237 bq27510g3_regs[BQ27XXX_REG_MAX] = {
238 [BQ27XXX_REG_CTRL] = 0x00,
239 [BQ27XXX_REG_TEMP] = 0x06,
240 [BQ27XXX_REG_INT_TEMP] = 0x28,
241 [BQ27XXX_REG_VOLT] = 0x08,
242 [BQ27XXX_REG_AI] = 0x14,
243 [BQ27XXX_REG_FLAGS] = 0x0a,
244 [BQ27XXX_REG_TTE] = 0x16,
245 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
246 [BQ27XXX_REG_TTES] = 0x1a,
247 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
248 [BQ27XXX_REG_NAC] = 0x0c,
249 [BQ27XXX_REG_RC] = 0x10,
250 [BQ27XXX_REG_FCC] = 0x12,
251 [BQ27XXX_REG_CYCT] = 0x1e,
252 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
253 [BQ27XXX_REG_SOC] = 0x20,
254 [BQ27XXX_REG_DCAP] = 0x2e,
255 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
256 BQ27XXX_DM_REG_ROWS,
257 },
258 bq27520g1_regs[BQ27XXX_REG_MAX] = {
259 [BQ27XXX_REG_CTRL] = 0x00,
260 [BQ27XXX_REG_TEMP] = 0x06,
261 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
262 [BQ27XXX_REG_VOLT] = 0x08,
263 [BQ27XXX_REG_AI] = 0x14,
264 [BQ27XXX_REG_FLAGS] = 0x0a,
265 [BQ27XXX_REG_TTE] = 0x16,
266 [BQ27XXX_REG_TTF] = 0x18,
267 [BQ27XXX_REG_TTES] = 0x1c,
268 [BQ27XXX_REG_TTECP] = 0x26,
269 [BQ27XXX_REG_NAC] = 0x0c,
270 [BQ27XXX_REG_RC] = 0x10,
271 [BQ27XXX_REG_FCC] = 0x12,
272 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
273 [BQ27XXX_REG_AE] = 0x22,
274 [BQ27XXX_REG_SOC] = 0x2c,
275 [BQ27XXX_REG_DCAP] = 0x3c,
276 [BQ27XXX_REG_AP] = 0x24,
277 BQ27XXX_DM_REG_ROWS,
278 },
279 bq27520g2_regs[BQ27XXX_REG_MAX] = {
280 [BQ27XXX_REG_CTRL] = 0x00,
281 [BQ27XXX_REG_TEMP] = 0x06,
282 [BQ27XXX_REG_INT_TEMP] = 0x36,
283 [BQ27XXX_REG_VOLT] = 0x08,
284 [BQ27XXX_REG_AI] = 0x14,
285 [BQ27XXX_REG_FLAGS] = 0x0a,
286 [BQ27XXX_REG_TTE] = 0x16,
287 [BQ27XXX_REG_TTF] = 0x18,
288 [BQ27XXX_REG_TTES] = 0x1c,
289 [BQ27XXX_REG_TTECP] = 0x26,
290 [BQ27XXX_REG_NAC] = 0x0c,
291 [BQ27XXX_REG_RC] = 0x10,
292 [BQ27XXX_REG_FCC] = 0x12,
293 [BQ27XXX_REG_CYCT] = 0x2a,
294 [BQ27XXX_REG_AE] = 0x22,
295 [BQ27XXX_REG_SOC] = 0x2c,
296 [BQ27XXX_REG_DCAP] = 0x3c,
297 [BQ27XXX_REG_AP] = 0x24,
298 BQ27XXX_DM_REG_ROWS,
299 },
300 bq27520g3_regs[BQ27XXX_REG_MAX] = {
301 [BQ27XXX_REG_CTRL] = 0x00,
302 [BQ27XXX_REG_TEMP] = 0x06,
303 [BQ27XXX_REG_INT_TEMP] = 0x36,
304 [BQ27XXX_REG_VOLT] = 0x08,
305 [BQ27XXX_REG_AI] = 0x14,
306 [BQ27XXX_REG_FLAGS] = 0x0a,
307 [BQ27XXX_REG_TTE] = 0x16,
308 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
309 [BQ27XXX_REG_TTES] = 0x1c,
310 [BQ27XXX_REG_TTECP] = 0x26,
311 [BQ27XXX_REG_NAC] = 0x0c,
312 [BQ27XXX_REG_RC] = 0x10,
313 [BQ27XXX_REG_FCC] = 0x12,
314 [BQ27XXX_REG_CYCT] = 0x2a,
315 [BQ27XXX_REG_AE] = 0x22,
316 [BQ27XXX_REG_SOC] = 0x2c,
317 [BQ27XXX_REG_DCAP] = 0x3c,
318 [BQ27XXX_REG_AP] = 0x24,
319 BQ27XXX_DM_REG_ROWS,
320 },
321 bq27520g4_regs[BQ27XXX_REG_MAX] = {
322 [BQ27XXX_REG_CTRL] = 0x00,
323 [BQ27XXX_REG_TEMP] = 0x06,
324 [BQ27XXX_REG_INT_TEMP] = 0x28,
325 [BQ27XXX_REG_VOLT] = 0x08,
326 [BQ27XXX_REG_AI] = 0x14,
327 [BQ27XXX_REG_FLAGS] = 0x0a,
328 [BQ27XXX_REG_TTE] = 0x16,
329 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
330 [BQ27XXX_REG_TTES] = 0x1c,
331 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
332 [BQ27XXX_REG_NAC] = 0x0c,
333 [BQ27XXX_REG_RC] = 0x10,
334 [BQ27XXX_REG_FCC] = 0x12,
335 [BQ27XXX_REG_CYCT] = 0x1e,
336 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
337 [BQ27XXX_REG_SOC] = 0x20,
338 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
339 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
340 BQ27XXX_DM_REG_ROWS,
341 },
342 bq27521_regs[BQ27XXX_REG_MAX] = {
343 [BQ27XXX_REG_CTRL] = 0x02,
344 [BQ27XXX_REG_TEMP] = 0x0a,
345 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
346 [BQ27XXX_REG_VOLT] = 0x0c,
347 [BQ27XXX_REG_AI] = 0x0e,
348 [BQ27XXX_REG_FLAGS] = 0x08,
349 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
350 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
351 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
352 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
353 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
354 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
355 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
356 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
357 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
358 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
359 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
360 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
361 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
362 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
363 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
364 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
365 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
366 },
367 bq27530_regs[BQ27XXX_REG_MAX] = {
368 [BQ27XXX_REG_CTRL] = 0x00,
369 [BQ27XXX_REG_TEMP] = 0x06,
370 [BQ27XXX_REG_INT_TEMP] = 0x32,
371 [BQ27XXX_REG_VOLT] = 0x08,
372 [BQ27XXX_REG_AI] = 0x14,
373 [BQ27XXX_REG_FLAGS] = 0x0a,
374 [BQ27XXX_REG_TTE] = 0x16,
375 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
376 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
377 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
378 [BQ27XXX_REG_NAC] = 0x0c,
379 [BQ27XXX_REG_RC] = 0x10,
380 [BQ27XXX_REG_FCC] = 0x12,
381 [BQ27XXX_REG_CYCT] = 0x2a,
382 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
383 [BQ27XXX_REG_SOC] = 0x2c,
384 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
385 [BQ27XXX_REG_AP] = 0x24,
386 BQ27XXX_DM_REG_ROWS,
387 },
388 #define bq27531_regs bq27530_regs
389 bq27541_regs[BQ27XXX_REG_MAX] = {
390 [BQ27XXX_REG_CTRL] = 0x00,
391 [BQ27XXX_REG_TEMP] = 0x06,
392 [BQ27XXX_REG_INT_TEMP] = 0x28,
393 [BQ27XXX_REG_VOLT] = 0x08,
394 [BQ27XXX_REG_AI] = 0x14,
395 [BQ27XXX_REG_FLAGS] = 0x0a,
396 [BQ27XXX_REG_TTE] = 0x16,
397 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
398 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
399 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
400 [BQ27XXX_REG_NAC] = 0x0c,
401 [BQ27XXX_REG_RC] = 0x10,
402 [BQ27XXX_REG_FCC] = 0x12,
403 [BQ27XXX_REG_CYCT] = 0x2a,
404 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
405 [BQ27XXX_REG_SOC] = 0x2c,
406 [BQ27XXX_REG_DCAP] = 0x3c,
407 [BQ27XXX_REG_AP] = 0x24,
408 BQ27XXX_DM_REG_ROWS,
409 },
410 #define bq27542_regs bq27541_regs
411 #define bq27546_regs bq27541_regs
412 #define bq27742_regs bq27541_regs
413 bq27545_regs[BQ27XXX_REG_MAX] = {
414 [BQ27XXX_REG_CTRL] = 0x00,
415 [BQ27XXX_REG_TEMP] = 0x06,
416 [BQ27XXX_REG_INT_TEMP] = 0x28,
417 [BQ27XXX_REG_VOLT] = 0x08,
418 [BQ27XXX_REG_AI] = 0x14,
419 [BQ27XXX_REG_FLAGS] = 0x0a,
420 [BQ27XXX_REG_TTE] = 0x16,
421 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
422 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
423 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
424 [BQ27XXX_REG_NAC] = 0x0c,
425 [BQ27XXX_REG_RC] = 0x10,
426 [BQ27XXX_REG_FCC] = 0x12,
427 [BQ27XXX_REG_CYCT] = 0x2a,
428 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
429 [BQ27XXX_REG_SOC] = 0x2c,
430 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
431 [BQ27XXX_REG_AP] = 0x24,
432 BQ27XXX_DM_REG_ROWS,
433 },
434 bq27421_regs[BQ27XXX_REG_MAX] = {
435 [BQ27XXX_REG_CTRL] = 0x00,
436 [BQ27XXX_REG_TEMP] = 0x02,
437 [BQ27XXX_REG_INT_TEMP] = 0x1e,
438 [BQ27XXX_REG_VOLT] = 0x04,
439 [BQ27XXX_REG_AI] = 0x10,
440 [BQ27XXX_REG_FLAGS] = 0x06,
441 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
442 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
443 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
444 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
445 [BQ27XXX_REG_NAC] = 0x08,
446 [BQ27XXX_REG_RC] = 0x0c,
447 [BQ27XXX_REG_FCC] = 0x0e,
448 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
449 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
450 [BQ27XXX_REG_SOC] = 0x1c,
451 [BQ27XXX_REG_DCAP] = 0x3c,
452 [BQ27XXX_REG_AP] = 0x18,
453 BQ27XXX_DM_REG_ROWS,
454 },
455 bq27426_regs[BQ27XXX_REG_MAX] = {
456 [BQ27XXX_REG_CTRL] = 0x00,
457 [BQ27XXX_REG_TEMP] = 0x02,
458 [BQ27XXX_REG_INT_TEMP] = 0x1e,
459 [BQ27XXX_REG_VOLT] = 0x04,
460 [BQ27XXX_REG_AI] = 0x10,
461 [BQ27XXX_REG_FLAGS] = 0x06,
462 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
463 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
464 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
465 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
466 [BQ27XXX_REG_NAC] = 0x08,
467 [BQ27XXX_REG_RC] = 0x0c,
468 [BQ27XXX_REG_FCC] = 0x0e,
469 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
470 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
471 [BQ27XXX_REG_SOC] = 0x1c,
472 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
473 [BQ27XXX_REG_AP] = 0x18,
474 BQ27XXX_DM_REG_ROWS,
475 },
476 #define bq27411_regs bq27421_regs
477 #define bq27425_regs bq27421_regs
478 #define bq27441_regs bq27421_regs
479 #define bq27621_regs bq27421_regs
480 bq27z561_regs[BQ27XXX_REG_MAX] = {
481 [BQ27XXX_REG_CTRL] = 0x00,
482 [BQ27XXX_REG_TEMP] = 0x06,
483 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
484 [BQ27XXX_REG_VOLT] = 0x08,
485 [BQ27XXX_REG_AI] = 0x14,
486 [BQ27XXX_REG_FLAGS] = 0x0a,
487 [BQ27XXX_REG_TTE] = 0x16,
488 [BQ27XXX_REG_TTF] = 0x18,
489 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
490 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
491 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
492 [BQ27XXX_REG_RC] = 0x10,
493 [BQ27XXX_REG_FCC] = 0x12,
494 [BQ27XXX_REG_CYCT] = 0x2a,
495 [BQ27XXX_REG_AE] = 0x22,
496 [BQ27XXX_REG_SOC] = 0x2c,
497 [BQ27XXX_REG_DCAP] = 0x3c,
498 [BQ27XXX_REG_AP] = 0x22,
499 BQ27XXX_DM_REG_ROWS,
500 },
501 bq28z610_regs[BQ27XXX_REG_MAX] = {
502 [BQ27XXX_REG_CTRL] = 0x00,
503 [BQ27XXX_REG_TEMP] = 0x06,
504 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
505 [BQ27XXX_REG_VOLT] = 0x08,
506 [BQ27XXX_REG_AI] = 0x14,
507 [BQ27XXX_REG_FLAGS] = 0x0a,
508 [BQ27XXX_REG_TTE] = 0x16,
509 [BQ27XXX_REG_TTF] = 0x18,
510 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
511 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
512 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
513 [BQ27XXX_REG_RC] = 0x10,
514 [BQ27XXX_REG_FCC] = 0x12,
515 [BQ27XXX_REG_CYCT] = 0x2a,
516 [BQ27XXX_REG_AE] = 0x22,
517 [BQ27XXX_REG_SOC] = 0x2c,
518 [BQ27XXX_REG_DCAP] = 0x3c,
519 [BQ27XXX_REG_AP] = 0x22,
520 BQ27XXX_DM_REG_ROWS,
521 },
522 bq34z100_regs[BQ27XXX_REG_MAX] = {
523 [BQ27XXX_REG_CTRL] = 0x00,
524 [BQ27XXX_REG_TEMP] = 0x0c,
525 [BQ27XXX_REG_INT_TEMP] = 0x2a,
526 [BQ27XXX_REG_VOLT] = 0x08,
527 [BQ27XXX_REG_AI] = 0x0a,
528 [BQ27XXX_REG_FLAGS] = 0x0e,
529 [BQ27XXX_REG_TTE] = 0x18,
530 [BQ27XXX_REG_TTF] = 0x1a,
531 [BQ27XXX_REG_TTES] = 0x1e,
532 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
533 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
534 [BQ27XXX_REG_RC] = 0x04,
535 [BQ27XXX_REG_FCC] = 0x06,
536 [BQ27XXX_REG_CYCT] = 0x2c,
537 [BQ27XXX_REG_AE] = 0x24,
538 [BQ27XXX_REG_SOC] = 0x02,
539 [BQ27XXX_REG_DCAP] = 0x3c,
540 [BQ27XXX_REG_AP] = 0x22,
541 BQ27XXX_DM_REG_ROWS,
542 },
543 bq78z100_regs[BQ27XXX_REG_MAX] = {
544 [BQ27XXX_REG_CTRL] = 0x00,
545 [BQ27XXX_REG_TEMP] = 0x06,
546 [BQ27XXX_REG_INT_TEMP] = 0x28,
547 [BQ27XXX_REG_VOLT] = 0x08,
548 [BQ27XXX_REG_AI] = 0x14,
549 [BQ27XXX_REG_FLAGS] = 0x0a,
550 [BQ27XXX_REG_TTE] = 0x16,
551 [BQ27XXX_REG_TTF] = 0x18,
552 [BQ27XXX_REG_TTES] = 0x1c,
553 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
554 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
555 [BQ27XXX_REG_RC] = 0x10,
556 [BQ27XXX_REG_FCC] = 0x12,
557 [BQ27XXX_REG_CYCT] = 0x2a,
558 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
559 [BQ27XXX_REG_SOC] = 0x2c,
560 [BQ27XXX_REG_DCAP] = 0x3c,
561 [BQ27XXX_REG_AP] = 0x22,
562 BQ27XXX_DM_REG_ROWS,
563 };
564
565 static enum power_supply_property bq27000_props[] = {
566 POWER_SUPPLY_PROP_STATUS,
567 POWER_SUPPLY_PROP_PRESENT,
568 POWER_SUPPLY_PROP_VOLTAGE_NOW,
569 POWER_SUPPLY_PROP_CURRENT_NOW,
570 POWER_SUPPLY_PROP_CAPACITY,
571 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
572 POWER_SUPPLY_PROP_TEMP,
573 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
574 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
575 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
576 POWER_SUPPLY_PROP_TECHNOLOGY,
577 POWER_SUPPLY_PROP_CHARGE_FULL,
578 POWER_SUPPLY_PROP_CHARGE_NOW,
579 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
580 POWER_SUPPLY_PROP_CYCLE_COUNT,
581 POWER_SUPPLY_PROP_ENERGY_NOW,
582 POWER_SUPPLY_PROP_POWER_AVG,
583 POWER_SUPPLY_PROP_HEALTH,
584 POWER_SUPPLY_PROP_MANUFACTURER,
585 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
586 };
587
588 static enum power_supply_property bq27010_props[] = {
589 POWER_SUPPLY_PROP_STATUS,
590 POWER_SUPPLY_PROP_PRESENT,
591 POWER_SUPPLY_PROP_VOLTAGE_NOW,
592 POWER_SUPPLY_PROP_CURRENT_NOW,
593 POWER_SUPPLY_PROP_CAPACITY,
594 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
595 POWER_SUPPLY_PROP_TEMP,
596 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
597 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
598 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
599 POWER_SUPPLY_PROP_TECHNOLOGY,
600 POWER_SUPPLY_PROP_CHARGE_FULL,
601 POWER_SUPPLY_PROP_CHARGE_NOW,
602 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
603 POWER_SUPPLY_PROP_CYCLE_COUNT,
604 POWER_SUPPLY_PROP_HEALTH,
605 POWER_SUPPLY_PROP_MANUFACTURER,
606 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
607 };
608
609 #define bq2750x_props bq27510g3_props
610 #define bq2751x_props bq27510g3_props
611 #define bq2752x_props bq27510g3_props
612
613 static enum power_supply_property bq27500_props[] = {
614 POWER_SUPPLY_PROP_STATUS,
615 POWER_SUPPLY_PROP_PRESENT,
616 POWER_SUPPLY_PROP_VOLTAGE_NOW,
617 POWER_SUPPLY_PROP_CURRENT_NOW,
618 POWER_SUPPLY_PROP_CAPACITY,
619 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
620 POWER_SUPPLY_PROP_TEMP,
621 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
622 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
623 POWER_SUPPLY_PROP_TECHNOLOGY,
624 POWER_SUPPLY_PROP_CHARGE_FULL,
625 POWER_SUPPLY_PROP_CHARGE_NOW,
626 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
627 POWER_SUPPLY_PROP_CYCLE_COUNT,
628 POWER_SUPPLY_PROP_ENERGY_NOW,
629 POWER_SUPPLY_PROP_POWER_AVG,
630 POWER_SUPPLY_PROP_HEALTH,
631 POWER_SUPPLY_PROP_MANUFACTURER,
632 };
633 #define bq27510g1_props bq27500_props
634 #define bq27510g2_props bq27500_props
635
636 static enum power_supply_property bq27510g3_props[] = {
637 POWER_SUPPLY_PROP_STATUS,
638 POWER_SUPPLY_PROP_PRESENT,
639 POWER_SUPPLY_PROP_VOLTAGE_NOW,
640 POWER_SUPPLY_PROP_CURRENT_NOW,
641 POWER_SUPPLY_PROP_CAPACITY,
642 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
643 POWER_SUPPLY_PROP_TEMP,
644 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
645 POWER_SUPPLY_PROP_TECHNOLOGY,
646 POWER_SUPPLY_PROP_CHARGE_FULL,
647 POWER_SUPPLY_PROP_CHARGE_NOW,
648 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
649 POWER_SUPPLY_PROP_CYCLE_COUNT,
650 POWER_SUPPLY_PROP_HEALTH,
651 POWER_SUPPLY_PROP_MANUFACTURER,
652 };
653
654 static enum power_supply_property bq27520g1_props[] = {
655 POWER_SUPPLY_PROP_STATUS,
656 POWER_SUPPLY_PROP_PRESENT,
657 POWER_SUPPLY_PROP_VOLTAGE_NOW,
658 POWER_SUPPLY_PROP_CURRENT_NOW,
659 POWER_SUPPLY_PROP_CAPACITY,
660 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
661 POWER_SUPPLY_PROP_TEMP,
662 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
663 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
664 POWER_SUPPLY_PROP_TECHNOLOGY,
665 POWER_SUPPLY_PROP_CHARGE_FULL,
666 POWER_SUPPLY_PROP_CHARGE_NOW,
667 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
668 POWER_SUPPLY_PROP_ENERGY_NOW,
669 POWER_SUPPLY_PROP_POWER_AVG,
670 POWER_SUPPLY_PROP_HEALTH,
671 POWER_SUPPLY_PROP_MANUFACTURER,
672 };
673
674 #define bq27520g2_props bq27500_props
675
676 static enum power_supply_property bq27520g3_props[] = {
677 POWER_SUPPLY_PROP_STATUS,
678 POWER_SUPPLY_PROP_PRESENT,
679 POWER_SUPPLY_PROP_VOLTAGE_NOW,
680 POWER_SUPPLY_PROP_CURRENT_NOW,
681 POWER_SUPPLY_PROP_CAPACITY,
682 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
683 POWER_SUPPLY_PROP_TEMP,
684 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
685 POWER_SUPPLY_PROP_TECHNOLOGY,
686 POWER_SUPPLY_PROP_CHARGE_FULL,
687 POWER_SUPPLY_PROP_CHARGE_NOW,
688 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
689 POWER_SUPPLY_PROP_CYCLE_COUNT,
690 POWER_SUPPLY_PROP_ENERGY_NOW,
691 POWER_SUPPLY_PROP_POWER_AVG,
692 POWER_SUPPLY_PROP_HEALTH,
693 POWER_SUPPLY_PROP_MANUFACTURER,
694 };
695
696 static enum power_supply_property bq27520g4_props[] = {
697 POWER_SUPPLY_PROP_STATUS,
698 POWER_SUPPLY_PROP_PRESENT,
699 POWER_SUPPLY_PROP_VOLTAGE_NOW,
700 POWER_SUPPLY_PROP_CURRENT_NOW,
701 POWER_SUPPLY_PROP_CAPACITY,
702 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
703 POWER_SUPPLY_PROP_TEMP,
704 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
705 POWER_SUPPLY_PROP_TECHNOLOGY,
706 POWER_SUPPLY_PROP_CHARGE_FULL,
707 POWER_SUPPLY_PROP_CHARGE_NOW,
708 POWER_SUPPLY_PROP_CYCLE_COUNT,
709 POWER_SUPPLY_PROP_HEALTH,
710 POWER_SUPPLY_PROP_MANUFACTURER,
711 };
712
713 static enum power_supply_property bq27521_props[] = {
714 POWER_SUPPLY_PROP_STATUS,
715 POWER_SUPPLY_PROP_PRESENT,
716 POWER_SUPPLY_PROP_VOLTAGE_NOW,
717 POWER_SUPPLY_PROP_CURRENT_NOW,
718 POWER_SUPPLY_PROP_TEMP,
719 POWER_SUPPLY_PROP_TECHNOLOGY,
720 };
721
722 static enum power_supply_property bq27530_props[] = {
723 POWER_SUPPLY_PROP_STATUS,
724 POWER_SUPPLY_PROP_PRESENT,
725 POWER_SUPPLY_PROP_VOLTAGE_NOW,
726 POWER_SUPPLY_PROP_CURRENT_NOW,
727 POWER_SUPPLY_PROP_CAPACITY,
728 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
729 POWER_SUPPLY_PROP_TEMP,
730 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
731 POWER_SUPPLY_PROP_TECHNOLOGY,
732 POWER_SUPPLY_PROP_CHARGE_FULL,
733 POWER_SUPPLY_PROP_CHARGE_NOW,
734 POWER_SUPPLY_PROP_POWER_AVG,
735 POWER_SUPPLY_PROP_HEALTH,
736 POWER_SUPPLY_PROP_CYCLE_COUNT,
737 POWER_SUPPLY_PROP_MANUFACTURER,
738 };
739 #define bq27531_props bq27530_props
740
741 static enum power_supply_property bq27541_props[] = {
742 POWER_SUPPLY_PROP_STATUS,
743 POWER_SUPPLY_PROP_PRESENT,
744 POWER_SUPPLY_PROP_VOLTAGE_NOW,
745 POWER_SUPPLY_PROP_CURRENT_NOW,
746 POWER_SUPPLY_PROP_CAPACITY,
747 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
748 POWER_SUPPLY_PROP_TEMP,
749 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
750 POWER_SUPPLY_PROP_TECHNOLOGY,
751 POWER_SUPPLY_PROP_CHARGE_FULL,
752 POWER_SUPPLY_PROP_CHARGE_NOW,
753 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
754 POWER_SUPPLY_PROP_CYCLE_COUNT,
755 POWER_SUPPLY_PROP_POWER_AVG,
756 POWER_SUPPLY_PROP_HEALTH,
757 POWER_SUPPLY_PROP_MANUFACTURER,
758 };
759 #define bq27542_props bq27541_props
760 #define bq27546_props bq27541_props
761 #define bq27742_props bq27541_props
762
763 static enum power_supply_property bq27545_props[] = {
764 POWER_SUPPLY_PROP_STATUS,
765 POWER_SUPPLY_PROP_PRESENT,
766 POWER_SUPPLY_PROP_VOLTAGE_NOW,
767 POWER_SUPPLY_PROP_CURRENT_NOW,
768 POWER_SUPPLY_PROP_CAPACITY,
769 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
770 POWER_SUPPLY_PROP_TEMP,
771 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
772 POWER_SUPPLY_PROP_TECHNOLOGY,
773 POWER_SUPPLY_PROP_CHARGE_FULL,
774 POWER_SUPPLY_PROP_CHARGE_NOW,
775 POWER_SUPPLY_PROP_HEALTH,
776 POWER_SUPPLY_PROP_CYCLE_COUNT,
777 POWER_SUPPLY_PROP_POWER_AVG,
778 POWER_SUPPLY_PROP_MANUFACTURER,
779 };
780
781 static enum power_supply_property bq27421_props[] = {
782 POWER_SUPPLY_PROP_STATUS,
783 POWER_SUPPLY_PROP_PRESENT,
784 POWER_SUPPLY_PROP_VOLTAGE_NOW,
785 POWER_SUPPLY_PROP_CURRENT_NOW,
786 POWER_SUPPLY_PROP_CAPACITY,
787 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
788 POWER_SUPPLY_PROP_TEMP,
789 POWER_SUPPLY_PROP_TECHNOLOGY,
790 POWER_SUPPLY_PROP_CHARGE_FULL,
791 POWER_SUPPLY_PROP_CHARGE_NOW,
792 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
793 POWER_SUPPLY_PROP_MANUFACTURER,
794 };
795 #define bq27411_props bq27421_props
796 #define bq27425_props bq27421_props
797 #define bq27441_props bq27421_props
798 #define bq27621_props bq27421_props
799
800 static enum power_supply_property bq27426_props[] = {
801 POWER_SUPPLY_PROP_STATUS,
802 POWER_SUPPLY_PROP_PRESENT,
803 POWER_SUPPLY_PROP_VOLTAGE_NOW,
804 POWER_SUPPLY_PROP_CURRENT_NOW,
805 POWER_SUPPLY_PROP_CAPACITY,
806 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
807 POWER_SUPPLY_PROP_TEMP,
808 POWER_SUPPLY_PROP_TECHNOLOGY,
809 POWER_SUPPLY_PROP_CHARGE_FULL,
810 POWER_SUPPLY_PROP_CHARGE_NOW,
811 POWER_SUPPLY_PROP_MANUFACTURER,
812 };
813
814 static enum power_supply_property bq27z561_props[] = {
815 POWER_SUPPLY_PROP_STATUS,
816 POWER_SUPPLY_PROP_PRESENT,
817 POWER_SUPPLY_PROP_VOLTAGE_NOW,
818 POWER_SUPPLY_PROP_CURRENT_NOW,
819 POWER_SUPPLY_PROP_CAPACITY,
820 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
821 POWER_SUPPLY_PROP_TEMP,
822 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
823 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
824 POWER_SUPPLY_PROP_TECHNOLOGY,
825 POWER_SUPPLY_PROP_CHARGE_FULL,
826 POWER_SUPPLY_PROP_CHARGE_NOW,
827 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
828 POWER_SUPPLY_PROP_CYCLE_COUNT,
829 POWER_SUPPLY_PROP_POWER_AVG,
830 POWER_SUPPLY_PROP_HEALTH,
831 POWER_SUPPLY_PROP_MANUFACTURER,
832 };
833
834 static enum power_supply_property bq28z610_props[] = {
835 POWER_SUPPLY_PROP_STATUS,
836 POWER_SUPPLY_PROP_PRESENT,
837 POWER_SUPPLY_PROP_VOLTAGE_NOW,
838 POWER_SUPPLY_PROP_CURRENT_NOW,
839 POWER_SUPPLY_PROP_CAPACITY,
840 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
841 POWER_SUPPLY_PROP_TEMP,
842 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
843 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
844 POWER_SUPPLY_PROP_TECHNOLOGY,
845 POWER_SUPPLY_PROP_CHARGE_FULL,
846 POWER_SUPPLY_PROP_CHARGE_NOW,
847 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
848 POWER_SUPPLY_PROP_CYCLE_COUNT,
849 POWER_SUPPLY_PROP_POWER_AVG,
850 POWER_SUPPLY_PROP_HEALTH,
851 POWER_SUPPLY_PROP_MANUFACTURER,
852 };
853
854 static enum power_supply_property bq34z100_props[] = {
855 POWER_SUPPLY_PROP_STATUS,
856 POWER_SUPPLY_PROP_PRESENT,
857 POWER_SUPPLY_PROP_VOLTAGE_NOW,
858 POWER_SUPPLY_PROP_CURRENT_NOW,
859 POWER_SUPPLY_PROP_CAPACITY,
860 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
861 POWER_SUPPLY_PROP_TEMP,
862 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
863 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
864 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
865 POWER_SUPPLY_PROP_TECHNOLOGY,
866 POWER_SUPPLY_PROP_CHARGE_FULL,
867 POWER_SUPPLY_PROP_CHARGE_NOW,
868 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
869 POWER_SUPPLY_PROP_CYCLE_COUNT,
870 POWER_SUPPLY_PROP_ENERGY_NOW,
871 POWER_SUPPLY_PROP_POWER_AVG,
872 POWER_SUPPLY_PROP_HEALTH,
873 POWER_SUPPLY_PROP_MANUFACTURER,
874 };
875
876 static enum power_supply_property bq78z100_props[] = {
877 POWER_SUPPLY_PROP_STATUS,
878 POWER_SUPPLY_PROP_PRESENT,
879 POWER_SUPPLY_PROP_VOLTAGE_NOW,
880 POWER_SUPPLY_PROP_CURRENT_NOW,
881 POWER_SUPPLY_PROP_CAPACITY,
882 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
883 POWER_SUPPLY_PROP_TEMP,
884 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
885 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
886 POWER_SUPPLY_PROP_TECHNOLOGY,
887 POWER_SUPPLY_PROP_CHARGE_FULL,
888 POWER_SUPPLY_PROP_CHARGE_NOW,
889 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
890 POWER_SUPPLY_PROP_CYCLE_COUNT,
891 POWER_SUPPLY_PROP_POWER_AVG,
892 POWER_SUPPLY_PROP_HEALTH,
893 POWER_SUPPLY_PROP_MANUFACTURER,
894 };
895
896 struct bq27xxx_dm_reg {
897 u8 subclass_id;
898 u8 offset;
899 u8 bytes;
900 u16 min, max;
901 };
902
903 enum bq27xxx_dm_reg_id {
904 BQ27XXX_DM_DESIGN_CAPACITY = 0,
905 BQ27XXX_DM_DESIGN_ENERGY,
906 BQ27XXX_DM_TERMINATE_VOLTAGE,
907 };
908
909 #define bq27000_dm_regs NULL
910 #define bq27010_dm_regs NULL
911 #define bq2750x_dm_regs NULL
912 #define bq2751x_dm_regs NULL
913 #define bq2752x_dm_regs NULL
914
915 #if 0 /* not yet tested */
916 static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
917 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
918 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */
919 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
920 };
921 #else
922 #define bq27500_dm_regs NULL
923 #endif
924
925 /* todo create data memory definitions from datasheets and test on chips */
926 #define bq27510g1_dm_regs NULL
927 #define bq27510g2_dm_regs NULL
928 #define bq27510g3_dm_regs NULL
929 #define bq27520g1_dm_regs NULL
930 #define bq27520g2_dm_regs NULL
931 #define bq27520g3_dm_regs NULL
932 #define bq27520g4_dm_regs NULL
933 #define bq27521_dm_regs NULL
934 #define bq27530_dm_regs NULL
935 #define bq27531_dm_regs NULL
936 #define bq27541_dm_regs NULL
937 #define bq27542_dm_regs NULL
938 #define bq27546_dm_regs NULL
939 #define bq27742_dm_regs NULL
940
941 #if 0 /* not yet tested */
942 static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
943 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
944 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
945 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
946 };
947 #else
948 #define bq27545_dm_regs NULL
949 #endif
950
951 static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
952 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
953 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
954 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
955 };
956
957 static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
958 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
959 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
960 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
961 };
962
963 static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
964 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
965 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
966 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
967 };
968
969 static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
970 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
971 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
972 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
973 };
974
975 #if 0 /* not yet tested */
976 #define bq27441_dm_regs bq27421_dm_regs
977 #else
978 #define bq27441_dm_regs NULL
979 #endif
980
981 #if 0 /* not yet tested */
982 static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
983 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
984 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
985 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
986 };
987 #else
988 #define bq27621_dm_regs NULL
989 #endif
990
991 #define bq27z561_dm_regs NULL
992 #define bq28z610_dm_regs NULL
993 #define bq34z100_dm_regs NULL
994 #define bq78z100_dm_regs NULL
995
996 #define BQ27XXX_O_ZERO BIT(0)
997 #define BQ27XXX_O_OTDC BIT(1) /* has OTC/OTD overtemperature flags */
998 #define BQ27XXX_O_UTOT BIT(2) /* has OT overtemperature flag */
999 #define BQ27XXX_O_CFGUP BIT(3)
1000 #define BQ27XXX_O_RAM BIT(4)
1001 #define BQ27Z561_O_BITS BIT(5)
1002 #define BQ27XXX_O_SOC_SI BIT(6) /* SoC is single register */
1003 #define BQ27XXX_O_HAS_CI BIT(7) /* has Capacity Inaccurate flag */
1004 #define BQ27XXX_O_MUL_CHEM BIT(8) /* multiple chemistries supported */
1005
1006 #define BQ27XXX_DATA(ref, key, opt) { \
1007 .opts = (opt), \
1008 .unseal_key = key, \
1009 .regs = ref##_regs, \
1010 .dm_regs = ref##_dm_regs, \
1011 .props = ref##_props, \
1012 .props_size = ARRAY_SIZE(ref##_props) }
1013
1014 static struct {
1015 u32 opts;
1016 u32 unseal_key;
1017 u8 *regs;
1018 struct bq27xxx_dm_reg *dm_regs;
1019 enum power_supply_property *props;
1020 size_t props_size;
1021 } bq27xxx_chip_data[] = {
1022 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
1023 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
1024 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
1025 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
1026 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
1027 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
1028 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
1029 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
1030 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
1031 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
1032 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
1033 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
1034 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
1035 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
1036 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
1037 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
1038 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
1039 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
1040 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
1041 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
1042 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
1043 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1044 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1045 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
1046 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1047 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1048 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1049 [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS),
1050 [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS),
1051 [BQ34Z100] = BQ27XXX_DATA(bq34z100, 0 , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \
1052 BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM),
1053 [BQ78Z100] = BQ27XXX_DATA(bq78z100, 0 , BQ27Z561_O_BITS),
1054 };
1055
1056 static DEFINE_MUTEX(bq27xxx_list_lock);
1057 static LIST_HEAD(bq27xxx_battery_devices);
1058
1059 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
1060
1061 #define BQ27XXX_DM_SZ 32
1062
1063 /**
1064 * struct bq27xxx_dm_buf - chip data memory buffer
1065 * @class: data memory subclass_id
1066 * @block: data memory block number
1067 * @data: data from/for the block
1068 * @has_data: true if data has been filled by read
1069 * @dirty: true if data has changed since last read/write
1070 *
1071 * Encapsulates info required to manage chip data memory blocks.
1072 */
1073 struct bq27xxx_dm_buf {
1074 u8 class;
1075 u8 block;
1076 u8 data[BQ27XXX_DM_SZ];
1077 bool has_data, dirty;
1078 };
1079
1080 #define BQ27XXX_DM_BUF(di, i) { \
1081 .class = (di)->dm_regs[i].subclass_id, \
1082 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
1083 }
1084
bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf * buf,struct bq27xxx_dm_reg * reg)1085 static inline __be16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
1086 struct bq27xxx_dm_reg *reg)
1087 {
1088 if (buf->class == reg->subclass_id &&
1089 buf->block == reg->offset / BQ27XXX_DM_SZ)
1090 return (__be16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
1091
1092 return NULL;
1093 }
1094
1095 static const char * const bq27xxx_dm_reg_name[] = {
1096 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
1097 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
1098 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
1099 };
1100
1101
1102 static bool bq27xxx_dt_to_nvm = true;
1103 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
1104 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
1105 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
1106 "Users must set this =0 when installing a different type of battery!\n"
1107 "Default is =1."
1108 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1109 "\nSetting this affects future kernel updates, not the current configuration."
1110 #endif
1111 );
1112
poll_interval_param_set(const char * val,const struct kernel_param * kp)1113 static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
1114 {
1115 struct bq27xxx_device_info *di;
1116 unsigned int prev_val = *(unsigned int *) kp->arg;
1117 int ret;
1118
1119 ret = param_set_uint(val, kp);
1120 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
1121 return ret;
1122
1123 mutex_lock(&bq27xxx_list_lock);
1124 list_for_each_entry(di, &bq27xxx_battery_devices, list)
1125 mod_delayed_work(system_wq, &di->work, 0);
1126 mutex_unlock(&bq27xxx_list_lock);
1127
1128 return ret;
1129 }
1130
1131 static const struct kernel_param_ops param_ops_poll_interval = {
1132 .get = param_get_uint,
1133 .set = poll_interval_param_set,
1134 };
1135
1136 static unsigned int poll_interval = 360;
1137 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
1138 MODULE_PARM_DESC(poll_interval,
1139 "battery poll interval in seconds - 0 disables polling");
1140
1141 /*
1142 * Common code for BQ27xxx devices
1143 */
1144
bq27xxx_read(struct bq27xxx_device_info * di,int reg_index,bool single)1145 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
1146 bool single)
1147 {
1148 int ret;
1149
1150 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1151 return -EINVAL;
1152
1153 ret = di->bus.read(di, di->regs[reg_index], single);
1154 if (ret < 0)
1155 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1156 di->regs[reg_index], reg_index);
1157
1158 return ret;
1159 }
1160
bq27xxx_write(struct bq27xxx_device_info * di,int reg_index,u16 value,bool single)1161 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
1162 u16 value, bool single)
1163 {
1164 int ret;
1165
1166 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1167 return -EINVAL;
1168
1169 if (!di->bus.write)
1170 return -EPERM;
1171
1172 ret = di->bus.write(di, di->regs[reg_index], value, single);
1173 if (ret < 0)
1174 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1175 di->regs[reg_index], reg_index);
1176
1177 return ret;
1178 }
1179
bq27xxx_read_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1180 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
1181 u8 *data, int len)
1182 {
1183 int ret;
1184
1185 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1186 return -EINVAL;
1187
1188 if (!di->bus.read_bulk)
1189 return -EPERM;
1190
1191 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1192 if (ret < 0)
1193 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1194 di->regs[reg_index], reg_index);
1195
1196 return ret;
1197 }
1198
bq27xxx_write_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1199 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
1200 u8 *data, int len)
1201 {
1202 int ret;
1203
1204 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1205 return -EINVAL;
1206
1207 if (!di->bus.write_bulk)
1208 return -EPERM;
1209
1210 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1211 if (ret < 0)
1212 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1213 di->regs[reg_index], reg_index);
1214
1215 return ret;
1216 }
1217
bq27xxx_battery_seal(struct bq27xxx_device_info * di)1218 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
1219 {
1220 int ret;
1221
1222 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
1223 if (ret < 0) {
1224 dev_err(di->dev, "bus error on seal: %d\n", ret);
1225 return ret;
1226 }
1227
1228 return 0;
1229 }
1230
bq27xxx_battery_unseal(struct bq27xxx_device_info * di)1231 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
1232 {
1233 int ret;
1234
1235 if (di->unseal_key == 0) {
1236 dev_err(di->dev, "unseal failed due to missing key\n");
1237 return -EINVAL;
1238 }
1239
1240 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1241 if (ret < 0)
1242 goto out;
1243
1244 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1245 if (ret < 0)
1246 goto out;
1247
1248 return 0;
1249
1250 out:
1251 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1252 return ret;
1253 }
1254
bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf * buf)1255 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1256 {
1257 u16 sum = 0;
1258 int i;
1259
1260 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1261 sum += buf->data[i];
1262 sum &= 0xff;
1263
1264 return 0xff - sum;
1265 }
1266
bq27xxx_battery_read_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf)1267 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1268 struct bq27xxx_dm_buf *buf)
1269 {
1270 int ret;
1271
1272 buf->has_data = false;
1273
1274 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1275 if (ret < 0)
1276 goto out;
1277
1278 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1279 if (ret < 0)
1280 goto out;
1281
1282 BQ27XXX_MSLEEP(1);
1283
1284 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1285 if (ret < 0)
1286 goto out;
1287
1288 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1289 if (ret < 0)
1290 goto out;
1291
1292 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1293 ret = -EINVAL;
1294 goto out;
1295 }
1296
1297 buf->has_data = true;
1298 buf->dirty = false;
1299
1300 return 0;
1301
1302 out:
1303 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1304 return ret;
1305 }
1306
bq27xxx_battery_update_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf,enum bq27xxx_dm_reg_id reg_id,unsigned int val)1307 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1308 struct bq27xxx_dm_buf *buf,
1309 enum bq27xxx_dm_reg_id reg_id,
1310 unsigned int val)
1311 {
1312 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1313 const char *str = bq27xxx_dm_reg_name[reg_id];
1314 __be16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1315
1316 if (prev == NULL) {
1317 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1318 return;
1319 }
1320
1321 if (reg->bytes != 2) {
1322 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1323 return;
1324 }
1325
1326 if (!buf->has_data)
1327 return;
1328
1329 if (be16_to_cpup(prev) == val) {
1330 dev_info(di->dev, "%s has %u\n", str, val);
1331 return;
1332 }
1333
1334 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1335 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1336 #else
1337 if (!(di->opts & BQ27XXX_O_RAM)) {
1338 #endif
1339 /* devicetree and NVM differ; defer to NVM */
1340 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1341 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1342 "by dt_monitored_battery_updates_nvm=0"
1343 #else
1344 "for flash/NVM data memory"
1345 #endif
1346 "\n", str, be16_to_cpup(prev), val);
1347 return;
1348 }
1349
1350 dev_info(di->dev, "update %s to %u\n", str, val);
1351
1352 *prev = cpu_to_be16(val);
1353 buf->dirty = true;
1354 }
1355
1356 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1357 {
1358 const int limit = 100;
1359 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1360 int ret, try = limit;
1361
1362 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1363 if (ret < 0)
1364 return ret;
1365
1366 do {
1367 BQ27XXX_MSLEEP(25);
1368 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1369 if (ret < 0)
1370 return ret;
1371 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1372
1373 if (!try && di->chip != BQ27425) { // 425 has a bug
1374 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1375 return -EINVAL;
1376 }
1377
1378 if (limit - try > 3)
1379 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1380
1381 return 0;
1382 }
1383
1384 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1385 {
1386 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1387 if (ret < 0 && ret != -EINVAL)
1388 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1389
1390 return ret;
1391 }
1392
1393 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1394 {
1395 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1396 if (ret < 0 && ret != -EINVAL)
1397 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1398
1399 return ret;
1400 }
1401
1402 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1403 struct bq27xxx_dm_buf *buf)
1404 {
1405 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1406 int ret;
1407
1408 if (!buf->dirty)
1409 return 0;
1410
1411 if (cfgup) {
1412 ret = bq27xxx_battery_set_cfgupdate(di);
1413 if (ret < 0)
1414 return ret;
1415 }
1416
1417 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1418 if (ret < 0)
1419 goto out;
1420
1421 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1422 if (ret < 0)
1423 goto out;
1424
1425 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1426 if (ret < 0)
1427 goto out;
1428
1429 BQ27XXX_MSLEEP(1);
1430
1431 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1432 if (ret < 0)
1433 goto out;
1434
1435 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1436 bq27xxx_battery_checksum_dm_block(buf), true);
1437 if (ret < 0)
1438 goto out;
1439
1440 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1441 * corruption on the '425 chip (and perhaps others), which can damage
1442 * the chip.
1443 */
1444
1445 if (cfgup) {
1446 BQ27XXX_MSLEEP(1);
1447 ret = bq27xxx_battery_soft_reset(di);
1448 if (ret < 0)
1449 return ret;
1450 } else {
1451 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1452 }
1453
1454 buf->dirty = false;
1455
1456 return 0;
1457
1458 out:
1459 if (cfgup)
1460 bq27xxx_battery_soft_reset(di);
1461
1462 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1463 return ret;
1464 }
1465
1466 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1467 struct power_supply_battery_info *info)
1468 {
1469 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1470 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1471 bool updated;
1472
1473 if (bq27xxx_battery_unseal(di) < 0)
1474 return;
1475
1476 if (info->charge_full_design_uah != -EINVAL &&
1477 info->energy_full_design_uwh != -EINVAL) {
1478 bq27xxx_battery_read_dm_block(di, &bd);
1479 /* assume design energy & capacity are in same block */
1480 bq27xxx_battery_update_dm_block(di, &bd,
1481 BQ27XXX_DM_DESIGN_CAPACITY,
1482 info->charge_full_design_uah / 1000);
1483 bq27xxx_battery_update_dm_block(di, &bd,
1484 BQ27XXX_DM_DESIGN_ENERGY,
1485 info->energy_full_design_uwh / 1000);
1486 }
1487
1488 if (info->voltage_min_design_uv != -EINVAL) {
1489 bool same = bd.class == bt.class && bd.block == bt.block;
1490 if (!same)
1491 bq27xxx_battery_read_dm_block(di, &bt);
1492 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1493 BQ27XXX_DM_TERMINATE_VOLTAGE,
1494 info->voltage_min_design_uv / 1000);
1495 }
1496
1497 updated = bd.dirty || bt.dirty;
1498
1499 bq27xxx_battery_write_dm_block(di, &bd);
1500 bq27xxx_battery_write_dm_block(di, &bt);
1501
1502 bq27xxx_battery_seal(di);
1503
1504 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1505 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1506 BQ27XXX_MSLEEP(300); /* reset time is not documented */
1507 }
1508 /* assume bq27xxx_battery_update() is called hereafter */
1509 }
1510
1511 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1512 {
1513 struct power_supply_battery_info *info;
1514 unsigned int min, max;
1515
1516 if (power_supply_get_battery_info(di->bat, &info) < 0)
1517 return;
1518
1519 if (!di->dm_regs) {
1520 dev_warn(di->dev, "data memory update not supported for chip\n");
1521 return;
1522 }
1523
1524 if (info->energy_full_design_uwh != info->charge_full_design_uah) {
1525 if (info->energy_full_design_uwh == -EINVAL)
1526 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1527 else if (info->charge_full_design_uah == -EINVAL)
1528 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1529 }
1530
1531 /* assume min == 0 */
1532 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1533 if (info->energy_full_design_uwh > max * 1000) {
1534 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1535 info->energy_full_design_uwh);
1536 info->energy_full_design_uwh = -EINVAL;
1537 }
1538
1539 /* assume min == 0 */
1540 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1541 if (info->charge_full_design_uah > max * 1000) {
1542 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1543 info->charge_full_design_uah);
1544 info->charge_full_design_uah = -EINVAL;
1545 }
1546
1547 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1548 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1549 if ((info->voltage_min_design_uv < min * 1000 ||
1550 info->voltage_min_design_uv > max * 1000) &&
1551 info->voltage_min_design_uv != -EINVAL) {
1552 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1553 info->voltage_min_design_uv);
1554 info->voltage_min_design_uv = -EINVAL;
1555 }
1556
1557 if ((info->energy_full_design_uwh != -EINVAL &&
1558 info->charge_full_design_uah != -EINVAL) ||
1559 info->voltage_min_design_uv != -EINVAL)
1560 bq27xxx_battery_set_config(di, info);
1561 }
1562
1563 /*
1564 * Return the battery State-of-Charge
1565 * Or < 0 if something fails.
1566 */
1567 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1568 {
1569 int soc;
1570
1571 if (di->opts & BQ27XXX_O_SOC_SI)
1572 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1573 else
1574 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1575
1576 if (soc < 0)
1577 dev_dbg(di->dev, "error reading State-of-Charge\n");
1578
1579 return soc;
1580 }
1581
1582 /*
1583 * Return a battery charge value in µAh
1584 * Or < 0 if something fails.
1585 */
1586 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg,
1587 union power_supply_propval *val)
1588 {
1589 int charge;
1590
1591 charge = bq27xxx_read(di, reg, false);
1592 if (charge < 0) {
1593 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1594 reg, charge);
1595 return charge;
1596 }
1597
1598 if (di->opts & BQ27XXX_O_ZERO)
1599 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1600 else
1601 charge *= 1000;
1602
1603 val->intval = charge;
1604
1605 return 0;
1606 }
1607
1608 /*
1609 * Return the battery Nominal available capacity in µAh
1610 * Or < 0 if something fails.
1611 */
1612 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di,
1613 union power_supply_propval *val)
1614 {
1615 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC, val);
1616 }
1617
1618 /*
1619 * Return the battery Remaining Capacity in µAh
1620 * Or < 0 if something fails.
1621 */
1622 static inline int bq27xxx_battery_read_rc(struct bq27xxx_device_info *di,
1623 union power_supply_propval *val)
1624 {
1625 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_RC, val);
1626 }
1627
1628 /*
1629 * Return the battery Full Charge Capacity in µAh
1630 * Or < 0 if something fails.
1631 */
1632 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di,
1633 union power_supply_propval *val)
1634 {
1635 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC, val);
1636 }
1637
1638 /*
1639 * Return the Design Capacity in µAh
1640 * Or < 0 if something fails.
1641 */
1642 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di,
1643 union power_supply_propval *val)
1644 {
1645 int dcap;
1646
1647 /* We only have to read charge design full once */
1648 if (di->charge_design_full > 0) {
1649 val->intval = di->charge_design_full;
1650 return 0;
1651 }
1652
1653 if (di->opts & BQ27XXX_O_ZERO)
1654 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1655 else
1656 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1657
1658 if (dcap < 0) {
1659 dev_dbg(di->dev, "error reading design capacity\n");
1660 return dcap;
1661 }
1662
1663 if (di->opts & BQ27XXX_O_ZERO)
1664 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1665 else
1666 dcap *= 1000;
1667
1668 /* Save for later reads */
1669 di->charge_design_full = dcap;
1670
1671 val->intval = dcap;
1672
1673 return 0;
1674 }
1675
1676 /*
1677 * Return the battery Available energy in µWh
1678 * Or < 0 if something fails.
1679 */
1680 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di,
1681 union power_supply_propval *val)
1682 {
1683 int ae;
1684
1685 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1686 if (ae < 0) {
1687 dev_dbg(di->dev, "error reading available energy\n");
1688 return ae;
1689 }
1690
1691 if (di->opts & BQ27XXX_O_ZERO)
1692 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1693 else
1694 ae *= 1000;
1695
1696 val->intval = ae;
1697
1698 return 0;
1699 }
1700
1701 /*
1702 * Return the battery temperature in tenths of degree Celsius
1703 * Or < 0 if something fails.
1704 */
1705 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di,
1706 union power_supply_propval *val)
1707 {
1708 int temp;
1709
1710 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1711 if (temp < 0) {
1712 dev_err(di->dev, "error reading temperature\n");
1713 return temp;
1714 }
1715
1716 if (di->opts & BQ27XXX_O_ZERO)
1717 temp = 5 * temp / 2;
1718
1719 /* Convert decidegree Kelvin to Celsius */
1720 temp -= 2731;
1721
1722 val->intval = temp;
1723
1724 return 0;
1725 }
1726
1727 /*
1728 * Return the battery Cycle count total
1729 * Or < 0 if something fails.
1730 */
1731 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di,
1732 union power_supply_propval *val)
1733 {
1734 int cyct;
1735
1736 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1737 if (cyct < 0)
1738 dev_err(di->dev, "error reading cycle count total\n");
1739
1740 val->intval = cyct;
1741
1742 return 0;
1743 }
1744
1745 /*
1746 * Read a time register.
1747 * Return < 0 if something fails.
1748 */
1749 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg,
1750 union power_supply_propval *val)
1751 {
1752 int tval;
1753
1754 tval = bq27xxx_read(di, reg, false);
1755 if (tval < 0) {
1756 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1757 reg, tval);
1758 return tval;
1759 }
1760
1761 if (tval == 65535)
1762 return -ENODATA;
1763
1764 val->intval = tval * 60;
1765
1766 return 0;
1767 }
1768
1769 /*
1770 * Returns true if a battery over temperature condition is detected
1771 */
1772 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1773 {
1774 if (di->opts & BQ27XXX_O_OTDC)
1775 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1776 if (di->opts & BQ27XXX_O_UTOT)
1777 return flags & BQ27XXX_FLAG_OT;
1778
1779 return false;
1780 }
1781
1782 /*
1783 * Returns true if a battery under temperature condition is detected
1784 */
1785 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1786 {
1787 if (di->opts & BQ27XXX_O_UTOT)
1788 return flags & BQ27XXX_FLAG_UT;
1789
1790 return false;
1791 }
1792
1793 /*
1794 * Returns true if a low state of charge condition is detected
1795 */
1796 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1797 {
1798 if (di->opts & BQ27XXX_O_ZERO)
1799 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1800 else if (di->opts & BQ27Z561_O_BITS)
1801 return flags & BQ27Z561_FLAG_FDC;
1802 else
1803 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1804 }
1805
1806 /*
1807 * Returns true if reported battery capacity is inaccurate
1808 */
1809 static bool bq27xxx_battery_capacity_inaccurate(struct bq27xxx_device_info *di,
1810 u16 flags)
1811 {
1812 if (di->opts & BQ27XXX_O_HAS_CI)
1813 return (flags & BQ27000_FLAG_CI);
1814 else
1815 return false;
1816 }
1817
1818 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di,
1819 union power_supply_propval *val)
1820 {
1821 int health;
1822
1823 /* Unlikely but important to return first */
1824 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1825 health = POWER_SUPPLY_HEALTH_OVERHEAT;
1826 else if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1827 health = POWER_SUPPLY_HEALTH_COLD;
1828 else if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1829 health = POWER_SUPPLY_HEALTH_DEAD;
1830 else if (unlikely(bq27xxx_battery_capacity_inaccurate(di, di->cache.flags)))
1831 health = POWER_SUPPLY_HEALTH_CALIBRATION_REQUIRED;
1832 else
1833 health = POWER_SUPPLY_HEALTH_GOOD;
1834
1835 val->intval = health;
1836
1837 return 0;
1838 }
1839
1840 static bool bq27xxx_battery_is_full(struct bq27xxx_device_info *di, int flags)
1841 {
1842 if (di->opts & BQ27XXX_O_ZERO)
1843 return (flags & BQ27000_FLAG_FC);
1844 else if (di->opts & BQ27Z561_O_BITS)
1845 return (flags & BQ27Z561_FLAG_FC);
1846 else
1847 return (flags & BQ27XXX_FLAG_FC);
1848 }
1849
1850 /*
1851 * Return the battery average current in µA and the status
1852 * Note that current can be negative signed as well
1853 * Or 0 if something fails.
1854 */
1855 static int bq27xxx_battery_current_and_status(
1856 struct bq27xxx_device_info *di,
1857 union power_supply_propval *val_curr,
1858 union power_supply_propval *val_status,
1859 struct bq27xxx_reg_cache *cache)
1860 {
1861 bool single_flags = (di->opts & BQ27XXX_O_ZERO);
1862 int curr;
1863 int flags;
1864
1865 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1866 if (curr < 0) {
1867 dev_err(di->dev, "error reading current\n");
1868 return curr;
1869 }
1870
1871 if (cache) {
1872 flags = cache->flags;
1873 } else {
1874 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, single_flags);
1875 if (flags < 0) {
1876 dev_err(di->dev, "error reading flags\n");
1877 return flags;
1878 }
1879 }
1880
1881 if (di->opts & BQ27XXX_O_ZERO) {
1882 if (!(flags & BQ27000_FLAG_CHGS)) {
1883 dev_dbg(di->dev, "negative current!\n");
1884 curr = -curr;
1885 }
1886
1887 curr = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1888 } else {
1889 /* Other gauges return signed value */
1890 curr = (int)((s16)curr) * 1000;
1891 }
1892
1893 if (val_curr)
1894 val_curr->intval = curr;
1895
1896 if (val_status) {
1897 if (bq27xxx_battery_is_full(di, flags))
1898 val_status->intval = POWER_SUPPLY_STATUS_FULL;
1899 else if (curr > 0)
1900 val_status->intval = POWER_SUPPLY_STATUS_CHARGING;
1901 else if (curr < 0)
1902 val_status->intval = POWER_SUPPLY_STATUS_DISCHARGING;
1903 else
1904 val_status->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
1905 }
1906
1907 return 0;
1908 }
1909
1910 static void bq27xxx_battery_update_unlocked(struct bq27xxx_device_info *di)
1911 {
1912 union power_supply_propval status = di->last_status;
1913 struct bq27xxx_reg_cache cache = {0, };
1914 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1915
1916 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1917 if ((cache.flags & 0xff) == 0xff)
1918 cache.flags = -1; /* read error */
1919 if (cache.flags >= 0) {
1920 cache.capacity = bq27xxx_battery_read_soc(di);
1921
1922 /*
1923 * On gauges with signed current reporting the current must be
1924 * checked to detect charging <-> discharging status changes.
1925 */
1926 if (!(di->opts & BQ27XXX_O_ZERO))
1927 bq27xxx_battery_current_and_status(di, NULL, &status, &cache);
1928 }
1929
1930 if ((di->cache.capacity != cache.capacity) ||
1931 (di->cache.flags != cache.flags) ||
1932 (di->last_status.intval != status.intval)) {
1933 di->last_status.intval = status.intval;
1934 power_supply_changed(di->bat);
1935 }
1936
1937 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1938 di->cache = cache;
1939
1940 di->last_update = jiffies;
1941
1942 if (!di->removed && poll_interval > 0)
1943 mod_delayed_work(system_wq, &di->work, poll_interval * HZ);
1944 }
1945
1946 void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1947 {
1948 mutex_lock(&di->lock);
1949 bq27xxx_battery_update_unlocked(di);
1950 mutex_unlock(&di->lock);
1951 }
1952 EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1953
1954 static void bq27xxx_battery_poll(struct work_struct *work)
1955 {
1956 struct bq27xxx_device_info *di =
1957 container_of(work, struct bq27xxx_device_info,
1958 work.work);
1959
1960 bq27xxx_battery_update(di);
1961 }
1962
1963 /*
1964 * Get the average power in µW
1965 * Return < 0 if something fails.
1966 */
1967 static int bq27xxx_battery_pwr_avg(struct bq27xxx_device_info *di,
1968 union power_supply_propval *val)
1969 {
1970 int power;
1971
1972 power = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1973 if (power < 0) {
1974 dev_err(di->dev,
1975 "error reading average power register %02x: %d\n",
1976 BQ27XXX_REG_AP, power);
1977 return power;
1978 }
1979
1980 if (di->opts & BQ27XXX_O_ZERO)
1981 val->intval = (power * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1982 else
1983 /* Other gauges return a signed value in units of 10mW */
1984 val->intval = (int)((s16)power) * 10000;
1985
1986 return 0;
1987 }
1988
1989 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1990 union power_supply_propval *val)
1991 {
1992 int level;
1993
1994 if (di->opts & BQ27XXX_O_ZERO) {
1995 if (di->cache.flags & BQ27000_FLAG_FC)
1996 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1997 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1998 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1999 else if (di->cache.flags & BQ27000_FLAG_EDV1)
2000 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
2001 else
2002 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
2003 } else if (di->opts & BQ27Z561_O_BITS) {
2004 if (di->cache.flags & BQ27Z561_FLAG_FC)
2005 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
2006 else if (di->cache.flags & BQ27Z561_FLAG_FDC)
2007 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
2008 else
2009 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
2010 } else {
2011 if (di->cache.flags & BQ27XXX_FLAG_FC)
2012 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
2013 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
2014 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
2015 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
2016 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
2017 else
2018 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
2019 }
2020
2021 val->intval = level;
2022
2023 return 0;
2024 }
2025
2026 /*
2027 * Return the battery Voltage in millivolts
2028 * Or < 0 if something fails.
2029 */
2030 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
2031 union power_supply_propval *val)
2032 {
2033 int volt;
2034
2035 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
2036 if (volt < 0) {
2037 dev_err(di->dev, "error reading voltage\n");
2038 return volt;
2039 }
2040
2041 val->intval = volt * 1000;
2042
2043 return 0;
2044 }
2045
2046 /*
2047 * Return the design minimum battery Voltage in microvolts
2048 * Or < 0 if something fails.
2049 */
2050 static int bq27xxx_battery_read_dmin_volt(struct bq27xxx_device_info *di,
2051 union power_supply_propval *val)
2052 {
2053 int volt;
2054
2055 /* We only have to read design minimum voltage once */
2056 if (di->voltage_min_design > 0) {
2057 val->intval = di->voltage_min_design;
2058 return 0;
2059 }
2060
2061 volt = bq27xxx_read(di, BQ27XXX_REG_SEDVF, true);
2062 if (volt < 0) {
2063 dev_err(di->dev, "error reading design min voltage\n");
2064 return volt;
2065 }
2066
2067 /* SEDVF = Design EDVF / 8 - 256 */
2068 val->intval = volt * 8000 + 2048000;
2069
2070 /* Save for later reads */
2071 di->voltage_min_design = val->intval;
2072
2073 return 0;
2074 }
2075
2076 static int bq27xxx_simple_value(int value,
2077 union power_supply_propval *val)
2078 {
2079 if (value < 0)
2080 return value;
2081
2082 val->intval = value;
2083
2084 return 0;
2085 }
2086
2087 static int bq27xxx_battery_get_property(struct power_supply *psy,
2088 enum power_supply_property psp,
2089 union power_supply_propval *val)
2090 {
2091 int ret = 0;
2092 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2093
2094 mutex_lock(&di->lock);
2095 if (time_is_before_jiffies(di->last_update + 5 * HZ))
2096 bq27xxx_battery_update_unlocked(di);
2097 mutex_unlock(&di->lock);
2098
2099 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
2100 return -ENODEV;
2101
2102 switch (psp) {
2103 case POWER_SUPPLY_PROP_STATUS:
2104 ret = bq27xxx_battery_current_and_status(di, NULL, val, NULL);
2105 break;
2106 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
2107 ret = bq27xxx_battery_voltage(di, val);
2108 break;
2109 case POWER_SUPPLY_PROP_PRESENT:
2110 val->intval = di->cache.flags < 0 ? 0 : 1;
2111 break;
2112 case POWER_SUPPLY_PROP_CURRENT_NOW:
2113 ret = bq27xxx_battery_current_and_status(di, val, NULL, NULL);
2114 break;
2115 case POWER_SUPPLY_PROP_CAPACITY:
2116 ret = bq27xxx_simple_value(di->cache.capacity, val);
2117 break;
2118 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
2119 ret = bq27xxx_battery_capacity_level(di, val);
2120 break;
2121 case POWER_SUPPLY_PROP_TEMP:
2122 ret = bq27xxx_battery_read_temperature(di, val);
2123 break;
2124 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
2125 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE, val);
2126 break;
2127 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
2128 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP, val);
2129 break;
2130 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
2131 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF, val);
2132 break;
2133 case POWER_SUPPLY_PROP_TECHNOLOGY:
2134 if (di->opts & BQ27XXX_O_MUL_CHEM)
2135 val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
2136 else
2137 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
2138 break;
2139 case POWER_SUPPLY_PROP_CHARGE_NOW:
2140 if (di->regs[BQ27XXX_REG_NAC] != INVALID_REG_ADDR)
2141 ret = bq27xxx_battery_read_nac(di, val);
2142 else
2143 ret = bq27xxx_battery_read_rc(di, val);
2144 break;
2145 case POWER_SUPPLY_PROP_CHARGE_FULL:
2146 ret = bq27xxx_battery_read_fcc(di, val);
2147 break;
2148 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
2149 ret = bq27xxx_battery_read_dcap(di, val);
2150 break;
2151 /*
2152 * TODO: Implement these to make registers set from
2153 * power_supply_battery_info visible in sysfs.
2154 */
2155 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
2156 return -EINVAL;
2157 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
2158 ret = bq27xxx_battery_read_dmin_volt(di, val);
2159 break;
2160 case POWER_SUPPLY_PROP_CYCLE_COUNT:
2161 ret = bq27xxx_battery_read_cyct(di, val);
2162 break;
2163 case POWER_SUPPLY_PROP_ENERGY_NOW:
2164 ret = bq27xxx_battery_read_energy(di, val);
2165 break;
2166 case POWER_SUPPLY_PROP_POWER_AVG:
2167 ret = bq27xxx_battery_pwr_avg(di, val);
2168 break;
2169 case POWER_SUPPLY_PROP_HEALTH:
2170 ret = bq27xxx_battery_read_health(di, val);
2171 break;
2172 case POWER_SUPPLY_PROP_MANUFACTURER:
2173 val->strval = BQ27XXX_MANUFACTURER;
2174 break;
2175 default:
2176 return -EINVAL;
2177 }
2178
2179 return ret;
2180 }
2181
2182 static void bq27xxx_external_power_changed(struct power_supply *psy)
2183 {
2184 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2185
2186 /* After charger plug in/out wait 0.5s for things to stabilize */
2187 mod_delayed_work(system_wq, &di->work, HZ / 2);
2188 }
2189
2190 static void bq27xxx_battery_mutex_destroy(void *data)
2191 {
2192 struct mutex *lock = data;
2193
2194 mutex_destroy(lock);
2195 }
2196
2197 int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
2198 {
2199 struct power_supply_desc *psy_desc;
2200 struct power_supply_config psy_cfg = {
2201 .of_node = di->dev->of_node,
2202 .drv_data = di,
2203 .no_wakeup_source = true,
2204 };
2205 int ret;
2206
2207 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
2208 mutex_init(&di->lock);
2209 ret = devm_add_action_or_reset(di->dev, bq27xxx_battery_mutex_destroy,
2210 &di->lock);
2211 if (ret)
2212 return ret;
2213
2214 di->regs = bq27xxx_chip_data[di->chip].regs;
2215 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
2216 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
2217 di->opts = bq27xxx_chip_data[di->chip].opts;
2218
2219 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
2220 if (!psy_desc)
2221 return -ENOMEM;
2222
2223 psy_desc->name = di->name;
2224 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
2225 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
2226 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
2227 psy_desc->get_property = bq27xxx_battery_get_property;
2228 psy_desc->external_power_changed = bq27xxx_external_power_changed;
2229
2230 di->bat = devm_power_supply_register(di->dev, psy_desc, &psy_cfg);
2231 if (IS_ERR(di->bat))
2232 return dev_err_probe(di->dev, PTR_ERR(di->bat),
2233 "failed to register battery\n");
2234
2235 bq27xxx_battery_settings(di);
2236 bq27xxx_battery_update(di);
2237
2238 mutex_lock(&bq27xxx_list_lock);
2239 list_add(&di->list, &bq27xxx_battery_devices);
2240 mutex_unlock(&bq27xxx_list_lock);
2241
2242 return 0;
2243 }
2244 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
2245
2246 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
2247 {
2248 mutex_lock(&bq27xxx_list_lock);
2249 list_del(&di->list);
2250 mutex_unlock(&bq27xxx_list_lock);
2251
2252 /* Set removed to avoid bq27xxx_battery_update() re-queuing the work */
2253 mutex_lock(&di->lock);
2254 di->removed = true;
2255 mutex_unlock(&di->lock);
2256
2257 cancel_delayed_work_sync(&di->work);
2258 }
2259 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
2260
2261 #ifdef CONFIG_PM_SLEEP
2262 static int bq27xxx_battery_suspend(struct device *dev)
2263 {
2264 struct bq27xxx_device_info *di = dev_get_drvdata(dev);
2265
2266 cancel_delayed_work(&di->work);
2267 return 0;
2268 }
2269
2270 static int bq27xxx_battery_resume(struct device *dev)
2271 {
2272 struct bq27xxx_device_info *di = dev_get_drvdata(dev);
2273
2274 schedule_delayed_work(&di->work, 0);
2275 return 0;
2276 }
2277 #endif /* CONFIG_PM_SLEEP */
2278
2279 SIMPLE_DEV_PM_OPS(bq27xxx_battery_battery_pm_ops,
2280 bq27xxx_battery_suspend, bq27xxx_battery_resume);
2281 EXPORT_SYMBOL_GPL(bq27xxx_battery_battery_pm_ops);
2282
2283 MODULE_AUTHOR("Rodolfo Giometti <[email protected]>");
2284 MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
2285 MODULE_LICENSE("GPL");
2286