1 /*
2 * Copyright 2010 Jerome Glisse <[email protected]>
3 * SPDX-License-Identifier: MIT
4 */
5
6 #include "r600_asm.h"
7 #include "r600_opcodes.h"
8 #include "r600_shader_common.h"
9
10 #include "util/u_memory.h"
11 #include "eg_sq.h"
12 #include <errno.h>
13
eg_bytecode_cf_build(struct r600_bytecode * bc,struct r600_bytecode_cf * cf)14 int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf)
15 {
16 unsigned id = cf->id;
17
18 if (cf->op == CF_NATIVE) {
19 bc->bytecode[id++] = cf->isa[0];
20 bc->bytecode[id++] = cf->isa[1];
21 } else {
22 const struct cf_op_info *cfop = r600_isa_cf(cf->op);
23 unsigned opcode = r600_isa_cf_opcode(bc->isa->hw_class, cf->op);
24 if (cfop->flags & CF_ALU) { /* ALU clauses */
25
26 /* prepend ALU_EXTENDED if we need more than 2 kcache sets */
27 if (cf->eg_alu_extended) {
28 bc->bytecode[id++] =
29 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(cf->kcache[0].index_mode) |
30 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(cf->kcache[1].index_mode) |
31 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(cf->kcache[2].index_mode) |
32 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(cf->kcache[3].index_mode) |
33 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) |
34 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) |
35 S_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2(cf->kcache[2].mode);
36 bc->bytecode[id++] =
37 S_SQ_CF_ALU_WORD1_EXT_CF_INST(
38 r600_isa_cf_opcode(bc->isa->hw_class, CF_OP_ALU_EXT)) |
39 S_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3(cf->kcache[3].mode) |
40 S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2(cf->kcache[2].addr) |
41 S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3(cf->kcache[3].addr) |
42 S_SQ_CF_ALU_WORD1_EXT_BARRIER(1);
43 }
44 bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
45 S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
46 S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
47 S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
48 bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(opcode) |
49 S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
50 S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
51 S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
52 S_SQ_CF_ALU_WORD1_BARRIER(1) |
53 S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
54 } else if (cfop->flags & CF_CLAUSE) {
55 /* CF_TEX/VTX (CF_ALU already handled above) */
56 bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
57 bc->bytecode[id] = S_SQ_CF_WORD1_CF_INST(opcode) |
58 S_SQ_CF_WORD1_BARRIER(1) |
59 S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
60 S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
61 if (bc->gfx_level == EVERGREEN) /* no EOP on cayman */
62 bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
63 id++;
64 } else if (cfop->flags & CF_EXP) {
65 /* EXPORT instructions */
66 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
67 S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
68 S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
69 S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
70 S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
71 bc->bytecode[id] =
72 S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
73 S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) |
74 S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
75 S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
76 S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
77 S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
78 S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) |
79 S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode);
80
81 if (bc->gfx_level == EVERGREEN) /* no EOP on cayman */
82 bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
83 id++;
84 } else if (cfop->flags & CF_RAT) {
85 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_ID(cf->rat.id) |
86 S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INST(cf->rat.inst) |
87 S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INDEX_MODE(cf->rat.index_mode) |
88 S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
89 S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
90 S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
91 S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
92 bc->bytecode[id] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
93 S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
94 S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) |
95 S_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(cf->vpm) |
96 S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
97 S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) |
98 S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size) |
99 S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->output.mark);
100 if (bc->gfx_level == EVERGREEN) /* no EOP on cayman */
101 bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
102 id++;
103
104 } else if (cfop->flags & CF_MEM) {
105 /* MEM_STREAM, MEM_RING instructions */
106 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
107 S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
108 S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
109 S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
110 S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
111 bc->bytecode[id] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
112 S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
113 S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) |
114 S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
115 S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) |
116 S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size);
117 if (bc->gfx_level == EVERGREEN) /* no EOP on cayman */
118 bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
119 id++;
120 } else {
121 /* other instructions */
122 bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
123 bc->bytecode[id] = S_SQ_CF_WORD1_CF_INST(opcode) |
124 S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
125 S_SQ_CF_WORD1_BARRIER(1) |
126 S_SQ_CF_WORD1_COND(cf->cond) |
127 S_SQ_CF_WORD1_POP_COUNT(cf->pop_count) |
128 S_SQ_CF_WORD1_COUNT(cf->count);
129 if (bc->gfx_level == EVERGREEN) /* no EOP on cayman */
130 bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
131 id++;
132 }
133 }
134 return 0;
135 }
136
137 #if 0
138 void eg_bytecode_export_read(struct r600_bytecode *bc,
139 struct r600_bytecode_output *output, uint32_t word0, uint32_t word1)
140 {
141 output->array_base = G_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(word0);
142 output->type = G_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(word0);
143 output->gpr = G_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(word0);
144 output->elem_size = G_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(word0);
145
146 output->swizzle_x = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(word1);
147 output->swizzle_y = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(word1);
148 output->swizzle_z = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(word1);
149 output->swizzle_w = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(word1);
150 output->burst_count = G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(word1);
151 output->end_of_program = G_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(word1);
152 output->op = r600_isa_cf_by_opcode(bc->isa,
153 G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(word1), /* is_cf_alu = */ 0 );
154 output->barrier = G_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(word1);
155 output->array_size = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(word1);
156 output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1);
157 }
158 #endif
159
eg_bytecode_gds_build(struct r600_bytecode * bc,struct r600_bytecode_gds * gds,unsigned id)160 int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id)
161 {
162 unsigned gds_op = (r600_isa_fetch_opcode(bc->isa->hw_class, gds->op) >> 8) & 0x3f;
163 unsigned opcode;
164 if (gds->op == FETCH_OP_TF_WRITE) {
165 opcode = 5;
166 gds_op = 0;
167 } else
168 opcode = 4;
169 bc->bytecode[id++] = S_SQ_MEM_GDS_WORD0_MEM_INST(2) |
170 S_SQ_MEM_GDS_WORD0_MEM_OP(opcode) |
171 S_SQ_MEM_GDS_WORD0_SRC_GPR(gds->src_gpr) |
172 S_SQ_MEM_GDS_WORD0_SRC_REL(gds->src_rel) |
173 S_SQ_MEM_GDS_WORD0_SRC_SEL_X(gds->src_sel_x) |
174 S_SQ_MEM_GDS_WORD0_SRC_SEL_Y(gds->src_sel_y) |
175 S_SQ_MEM_GDS_WORD0_SRC_SEL_Z(gds->src_sel_z);
176
177 bc->bytecode[id++] = S_SQ_MEM_GDS_WORD1_DST_GPR(gds->dst_gpr) |
178 S_SQ_MEM_GDS_WORD1_DST_REL(gds->dst_rel) |
179 S_SQ_MEM_GDS_WORD1_GDS_OP(gds_op) |
180 S_SQ_MEM_GDS_WORD1_SRC_GPR(gds->src_gpr2) |
181 S_SQ_MEM_GDS_WORD1_UAV_INDEX_MODE(gds->uav_index_mode) |
182 S_SQ_MEM_GDS_WORD1_UAV_ID(gds->uav_id) |
183 S_SQ_MEM_GDS_WORD1_ALLOC_CONSUME(gds->alloc_consume) |
184 S_SQ_MEM_GDS_WORD1_BCAST_FIRST_REQ(gds->bcast_first_req);
185
186 bc->bytecode[id++] = S_SQ_MEM_GDS_WORD2_DST_SEL_X(gds->dst_sel_x) |
187 S_SQ_MEM_GDS_WORD2_DST_SEL_Y(gds->dst_sel_y) |
188 S_SQ_MEM_GDS_WORD2_DST_SEL_Z(gds->dst_sel_z) |
189 S_SQ_MEM_GDS_WORD2_DST_SEL_W(gds->dst_sel_w);
190 return 0;
191 }
192
eg_bytecode_alu_build(struct r600_bytecode * bc,struct r600_bytecode_alu * alu,unsigned id)193 int eg_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id)
194 {
195 if (alu->is_lds_idx_op) {
196 assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
197 assert(!alu->src[0].neg && !alu->src[1].neg && !alu->src[2].neg);
198 bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
199 S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
200 S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
201 S_SQ_ALU_WORD0_LDS_IDX_OP_IDX_OFFSET_4(alu->lds_idx >> 4) |
202 S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
203 S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
204 S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
205 S_SQ_ALU_WORD0_LDS_IDX_OP_IDX_OFFSET_5(alu->lds_idx >> 5) |
206 S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) |
207 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) |
208 S_SQ_ALU_WORD0_LAST(alu->last);
209 } else {
210 bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
211 S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
212 S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
213 S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
214 S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
215 S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
216 S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
217 S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
218 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) |
219 S_SQ_ALU_WORD0_LAST(alu->last);
220 }
221
222 /* don't replace gpr by pv or ps for destination register */
223 if (alu->is_lds_idx_op) {
224 unsigned lds_op = r600_isa_alu_opcode(bc->isa->hw_class, alu->op);
225 bc->bytecode[id++] =
226 S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
227 S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
228 S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
229 S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_1(alu->lds_idx >> 1) |
230
231 S_SQ_ALU_WORD1_OP3_ALU_INST(lds_op & 0xff) |
232 S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
233 S_SQ_ALU_WORD1_LDS_IDX_OP_LDS_OP((lds_op >> 8) & 0xff) |
234 S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_0(alu->lds_idx) |
235 S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_2(alu->lds_idx >> 2) |
236 S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
237 S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_3(alu->lds_idx >> 3);
238
239 } else if (alu->is_op3) {
240 assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
241 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
242 S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
243 S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
244 S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
245 S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
246 S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
247 S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
248 S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) |
249 S_SQ_ALU_WORD1_OP3_ALU_INST(r600_isa_alu_opcode(bc->isa->hw_class, alu->op)) |
250 S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle);
251 } else {
252 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
253 S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
254 S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
255 S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
256 S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) |
257 S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) |
258 S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) |
259 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
260 S_SQ_ALU_WORD1_OP2_ALU_INST(r600_isa_alu_opcode(bc->isa->hw_class, alu->op)) |
261 S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
262 S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->execute_mask) |
263 S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->update_pred);
264 }
265 return 0;
266 }
267