1 /* 2 * Copyright (c) 2020, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file encode_huc_brc_init_packet.h 24 //! \brief Defines the implementation of huc update packet 25 //! 26 27 #ifndef __CODECHAL_AV1_BRC_UPDATE_PACKET_H__ 28 #define __CODECHAL_AV1_BRC_UPDATE_PACKET_H__ 29 30 #include "media_cmd_packet.h" 31 #include "encode_huc.h" 32 #include "media_pipeline.h" 33 #include "encode_utils.h" 34 #include "encode_av1_vdenc_pipeline.h" 35 #include "encode_av1_basic_feature.h" 36 #include "mhw_vdbox_avp_itf.h" 37 38 namespace encode 39 { 40 struct VdencAv1HucBrcUpdateDmem 41 { 42 int32_t UPD_TARGET_BUF_FULLNESS; // passed by the driver 43 uint32_t UPD_FRAMENUM; // passed by the driver 44 int32_t UPD_HRD_BUFF_FULLNESS; // passed by the driver 45 int32_t UPD_HRD_BUFF_FULLNESS_UPPER; // passed by the driver 46 int32_t UPD_HRD_BUFF_FULLNESS_LOWER; // passed by the driver 47 uint32_t UPD_UserMaxFrame; // set by driver to support I frame size 48 uint32_t UPD_TR_TargetSize; // transport/look ahead controlled target frame size, passed by the driver//TR_BRC 49 uint32_t UPD_LA_TargetFULNESS; // look ahead controlled target bufferfulness, passed by the driver 50 uint32_t UPD_CDF_BufferSize; // for Huc to locate the cdf buffer in LUT 51 uint32_t UPD_UserMaxFramePB; // Checked with Arch, UserMaxFrame size can be changed frame by frame 52 uint32_t RSVD32[14]; // mbz 53 54 uint16_t UPD_startGAdjFrame[4]; // start global adjust frame (4 items) 55 uint16_t UPD_CurWidth; // current width 56 uint16_t UPD_CurHeight; // current height 57 uint16_t UPD_Asyn; 58 uint16_t UPD_SLBBSize; // second level batch buffer total size in bytes 59 uint16_t UPD_AVPPiCStateCmdNum; // 1-2 kinds of AVP pic state cmd(s) 60 uint16_t UPD_AVPSegmentStateOffset; // Group1 61 uint16_t UPD_AVPInloopFilterStateOffset; // Group1 62 uint16_t UPD_VDEncCmd1Offset; // Group2 63 uint16_t UPD_VDEncCmd2Offset; // Group3 64 uint16_t UPD_AVPPicStateOffset; // Group4, the 1st tile pic cmd start position in bytes from the begining of slbb 65 66 uint16_t UPD_MaxBRCLevel; // based on BGOPSize in Cmodel 67 uint16_t UPD_AdditionalHrdSizeByteCount; // For repeated frame. App can have some header bytes not generated by HW, like skipped frame. 68 uint16_t UPD_VDEncTileSliceStateOffset; // Group5, the 1st tile cmd start position in bytes from the begining of slbb 69 uint16_t UPD_TileNum; 70 uint16_t RSVD16[10]; // mbz 71 72 // BA start 73 uint16_t UPD_LoopFilterParamsBitOffset; 74 uint16_t UPD_QIndexBitOffset; 75 uint16_t UPD_SegmentationBitOffset; // SegOn flag bit 76 uint16_t UPD_CDEFParamsBitOffset; 77 uint16_t UPD_CDEFParamsSizeInBits; 78 uint16_t UPD_FrameHdrOBUSizeInBits; // details in DDI Doc 79 uint16_t UPD_FrameHdrOBUSizeByteOffset; // huc will update this field if seg on, fixed 4 bytes 80 uint16_t UPD_FrameHdrOBUSizeInBytes; // PAK Insert object (frame header) size in bytes 81 uint16_t RSVD16_1[8]; 82 83 uint8_t UPD_FrameType; // see macro AV1_KEY_FRAME in cmodel 84 uint8_t UPD_ErrorResilientMode; 85 uint8_t UPD_IntraOnly; 86 uint8_t UPD_PrimaryRefFrame; 87 uint8_t UPD_SegOn; // flag to turn on segmentation back annotation 88 uint8_t UPD_SegMapUpdate; 89 uint8_t UPD_SegTemporalUpdate; 90 uint8_t UPD_SegUpdateData; 91 uint8_t UPD_IsFrameOBU; 92 uint8_t UPD_EnableCDEFUpdate; //flag to turn on CDEF back annotation 93 uint8_t UPD_EnableLFUpdate; //flag to turn on LoopFilter back annotation 94 uint8_t UPD_PaletteOn; 95 uint8_t RSVD8_1[20]; 96 // BA end 97 98 uint8_t UPD_OverflowFlag; // passed by the driver 99 uint8_t UPD_MaxNumPAKs; // maximum number of PAKs (default set to 2) 100 int8_t UPD_CurrFrameType; // current frame type (0:P, 1:B, 2:I) 101 uint8_t UPD_QPThreshold[4]; // QP threshold (4 entries) 102 uint8_t UPD_gRateRatioThreshold[6]; // global rate ratio threshold (6 items) 103 int8_t UPD_startGAdjMult[5]; // start global adjust mult (5 items) 104 int8_t UPD_startGAdjDiv[5]; // start global adjust div (5 items) 105 int8_t UPD_gRateRatioThresholdQP[7]; // global rate ratio threshold QP (7 items) 106 uint8_t UPD_DistThreshldI[9]; // (N_DISTORION_THRESHLDS + 1) distortion thresholds for I frames 107 uint8_t UPD_DistThreshldP[9]; // (N_DISTORION_THRESHLDS + 1) distortion thresholds for P frames 108 uint8_t UPD_DistThreshldB[9]; // (N_DISTORION_THRESHLDS + 1) distortion thresholds for B frames; no needed for Vp8 - to clean up 109 int8_t UPD_MaxFrameThreshI[5]; // num qp threshld + 1 of multiplyers 110 int8_t UPD_MaxFrameThreshP[5]; // num qp threshld + 1 of multiplyers 111 int8_t UPD_MaxFrameThreshB[5]; // num qp threshld + 1 of multiplyers; no needed for Vp8 - to clean up 112 uint8_t UPD_PAKPassNum; // current pak pass number 113 int8_t UPD_DeltaQPForSadZone0; 114 int8_t UPD_DeltaQPForSadZone1; 115 int8_t UPD_DeltaQPForSadZone2; 116 int8_t UPD_DeltaQPForSadZone3; 117 int8_t UPD_DeltaQPForMvZero; 118 int8_t UPD_DeltaQPForMvZone0; 119 int8_t UPD_DeltaQPForMvZone1; 120 int8_t UPD_DeltaQPForMvZone2; 121 int8_t UPD_DeltaQPForAvgLuminZone0; 122 int8_t UPD_DeltaQPForAvgLuminZone1; 123 int8_t UPD_DeltaQPForAvgLuminZone2; 124 int8_t UPD_DeltaQPForAvgLuminZone3; 125 int8_t UPD_DeltaQPForAvgLuminZone4; 126 int8_t UPD_DeltaQPForAvgLuminZone5; 127 int8_t UPD_DeltaQPForAvgLuminZone6; 128 int8_t UPD_DeltaQPForAvgLuminZone7; 129 int8_t UPD_DeltaQPForAvgLuminZone8; 130 int8_t UPD_DeltaQPForAvgLuminZone9; 131 uint8_t UPD_Temporal_Level; 132 uint8_t UPD_SegMapGenerating; // Default 0: The app provides segment map, and HuC does not update segmentation state; 1: HuC generates seg map, updating all 8 segmentation states in second level batch buffer 133 uint8_t UPD_Lowdelay; 134 uint8_t UPD_Delta; 135 uint8_t UPD_LALength; 136 uint8_t UPD_DisableCdfUpdate; 137 uint8_t UPD_EnableDMAForCdf; 138 uint8_t UPD_EnableAdaptiveRounding; 139 uint8_t UPD_TCBRC_SCENARIO; // 2: HQ, 1: VC, 0: CG 140 uint8_t UPD_TCBRC_REPEAT; 141 uint8_t UPD_ROM_CURRENT; // ROM average of current frame 142 uint8_t UPD_ROM_ZERO; // ROM zero percentage (255 is 100%) 143 uint8_t UPD_CQMEnabled; 144 uint8_t UPD_TempCurrentlayer; 145 uint8_t UPD_TempScalable; 146 147 uint8_t RSVD8[62]; 148 }; 149 150 typedef struct _HUC_MODE_COST 151 { 152 uint8_t RSVD[24]; 153 } HUC_MODE_COST; 154 155 struct VdencAv1HucBrcConstantData 156 { 157 HUC_MODE_COST CONST_ModeCosts[52]; 158 159 int8_t CONST_QPAdjTabI[45]; //(N_INST_RATE_THRESHLDS+1)x(N_DEV_THRESHLDS+1) matrix data 160 int8_t CONST_QPAdjTabP[45]; //(N_INST_RATE_THRESHLDS+1)x(N_DEV_THRESHLDS+1) matrix data 161 int8_t CONST_QPAdjTabB[45]; //(N_INST_RATE_THRESHLDS+1)x(N_DEV_THRESHLDS+1) matrix data 162 163 int8_t CONST_DistQPAdjTabI[81]; //(N_DEV_THRESHLDS+1)x(N_DISTORION_THRESHLDS+1) QP deltas for I frames 164 int8_t CONST_DistQPAdjTabP[81]; //(N_DEV_THRESHLDS+1)x(N_DISTORION_THRESHLDS+1) QP deltas for P frames 165 int8_t CONST_DistQPAdjTabB[81]; //(N_DEV_THRESHLDS+1)x(N_DISTORION_THRESHLDS+1) QP deltas for B frames; no needed for Vp8 - to clean up 166 167 uint8_t CONST_LoopFilterLevelTabLuma[256]; 168 uint8_t CONST_LoopFilterLevelTabChroma[256]; 169 uint8_t RSVD[38]; // mbz 170 }; 171 172 class Av1BrcUpdatePkt : public EncodeHucPkt 173 { 174 public: Av1BrcUpdatePkt(MediaPipeline * pipeline,MediaTask * task,CodechalHwInterfaceNext * hwInterface)175 Av1BrcUpdatePkt(MediaPipeline* pipeline, MediaTask* task, CodechalHwInterfaceNext* hwInterface) : 176 EncodeHucPkt(pipeline, task, hwInterface) 177 { 178 m_featureManager = m_pipeline->GetPacketLevelFeatureManager(Av1Pipeline::Av1VdencPacket); 179 } 180 ~Av1BrcUpdatePkt()181 virtual ~Av1BrcUpdatePkt() {} 182 183 virtual MOS_STATUS Init() override; 184 185 MOS_STATUS Submit(MOS_COMMAND_BUFFER *commandBuffer, uint8_t packetPhase = otherPacket) override; 186 187 //! 188 //! \brief Calculate Command Size 189 //! 190 //! \param [in, out] commandBufferSize 191 //! requested size 192 //! \param [in, out] requestedPatchListSize 193 //! requested size 194 //! \return MOS_STATUS 195 //! status 196 //! 197 MOS_STATUS CalculateCommandSize( 198 uint32_t &commandBufferSize, 199 uint32_t &requestedPatchListSize) override; 200 201 //! 202 //! \brief Get Packet Name 203 //! \return std::string 204 //! GetPacketName()205 virtual std::string GetPacketName() override 206 { 207 return "BRCUPDATE_PASS" + std::to_string((uint32_t)EncodeHucPkt::m_pipeline->GetCurrentPass()); 208 } 209 210 protected: 211 virtual MOS_STATUS AllocateResources() override; 212 213 virtual MOS_STATUS ConstructBatchBufferHuCBRC(PMOS_RESOURCE batchBuffer); 214 MOS_STATUS ConstructPakInsertHucBRC(PMOS_RESOURCE batchBuffer); 215 virtual MOS_STATUS AddAvpPicStateBaseOnTile(MOS_COMMAND_BUFFER& cmdBuffer, SlbData &slbbData); 216 MOS_STATUS AddVdencTileSliceBaseOnTile(MOS_COMMAND_BUFFER& cmdBuffer, SlbData& slbbData); 217 Av1BasicFeature *m_basicFeature = nullptr; //!< Av1 Basic Feature used in each frame 218 219 virtual MOS_STATUS SetConstDataHuCBrcUpdate(); 220 221 MHW_SETPAR_DECL_HDR(HUC_IMEM_STATE); 222 MHW_SETPAR_DECL_HDR(HUC_DMEM_STATE); 223 MHW_SETPAR_DECL_HDR(HUC_VIRTUAL_ADDR_STATE); 224 MHW_SETPAR_DECL_HDR(AVP_PIC_STATE); 225 MHW_SETPAR_DECL_HDR(VD_PIPELINE_FLUSH); 226 227 MOS_STATUS AddAllCmds_AVP_SEGMENT_STATE(PMOS_COMMAND_BUFFER cmdBuffer) const; 228 229 MOS_STATUS AddAllCmds_AVP_PAK_INSERT_OBJECT(PMOS_COMMAND_BUFFER cmdBuffer) const; 230 #if USE_CODECHAL_DEBUG_TOOL 231 virtual MOS_STATUS DumpInput() override; 232 virtual MOS_STATUS DumpOutput() override; 233 #endif 234 235 static constexpr uint32_t m_vdboxHucAv1BrcUpdateKernelDescriptor = 19;//!< Huc AV1 Brc init kernel descriptor 236 237 // Batch Buffer for VDEnc 238 MOS_RESOURCE m_vdencReadBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][VDENC_BRC_NUM_OF_PASSES] = {}; //!< VDEnc read batch buffer 239 MOS_RESOURCE m_vdencPakInsertBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc read batch buffer 240 MOS_RESOURCE m_vdencBrcConstDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc brc constant data buffer 241 242 MOS_RESOURCE m_dataFromPicsBuffer = {}; //!< Data Buffer of Current and Reference Pictures for Weighted Prediction 243 uint32_t m_vdenc2ndLevelBatchBufferSize[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = { 0 }; 244 MOS_RESOURCE m_vdencBrcUpdateDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][VDENC_BRC_NUM_OF_PASSES] = { 0 }; //!< VDEnc BrcUpdate DMEM buffer 245 246 uint32_t m_miBatchBufferEndCmdSize = 0; //!< Size of MI_BATCH_BUFFER_END cmd 247 uint32_t m_cmd2StartInBytes = 0; 248 uint32_t m_vdencBrcUpdateDmemBufferSize = sizeof(VdencAv1HucBrcUpdateDmem); //!< Offset of BRC update DMEM buffer 249 uint32_t m_vdencBrcConstDataBufferSize = sizeof(VdencAv1HucBrcConstantData); //!< Offset of BRC const data buffer 250 251 std::shared_ptr<MediaFeatureManager::ManagerLite> m_featureManager = nullptr; 252 253 MOS_RESOURCE m_vdencBrcInitDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc BrcInit DMEM buffer 254 255 MEDIA_CLASS_DEFINE_END(encode__Av1BrcUpdatePkt) 256 }; 257 258 } // namespace encode 259 #endif 260