1 /*
2  * Copyright (c) 2013, Google Inc. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining
5  * a copy of this software and associated documentation files
6  * (the "Software"), to deal in the Software without restriction,
7  * including without limitation the rights to use, copy, modify, merge,
8  * publish, distribute, sublicense, and/or sell copies of the Software,
9  * and to permit persons to whom the Software is furnished to do so,
10  * subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be
13  * included in all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22  */
23 #ifndef __DEV_INTERRUPT_ARM_GIC_H
24 #define __DEV_INTERRUPT_ARM_GIC_H
25 
26 #include <sys/types.h>
27 
28 /**
29  * arm_gic_init() - Legacy GIC initialization routine.
30  *
31  * This initializes the GIC using the %GICBASE and %GICx_OFFSET
32  * macros as the virtual addresses of the GIC banks, and assumes
33  * that the platform code has already mapped them into the
34  * address space.
35  */
36 void arm_gic_init(void);
37 
38 /**
39  * struct arm_gic_init_info - Initialization information for the GIC.
40  * @gicc_paddr: Physical address of GIC CPU interface registers.
41  * @gicc_size: Total size of GIC CPU interface registers.
42  * @gicd_paddr: Physical address of GIC Distributor registers.
43  * @gicd_size: Total size of GIC Distributor registers.
44  * @gicr_paddr: Physical address of GIC Redistributor registers.
45  * @gicr_size: Total size of GIC Redistributor registers.
46  */
47 struct arm_gic_init_info {
48     paddr_t gicc_paddr;
49     size_t gicc_size;
50     paddr_t gicd_paddr;
51     size_t gicd_size;
52     paddr_t gicr_paddr;
53     size_t gicr_size;
54 };
55 
56 /**
57  * arm_gic_init_map() - Map the GIC into the virtual address space and
58  *                      initialize it.
59  * @init_info: Pointer to a &struct arm_gic_init_info structure with the extra
60  *             initialization information, e.g., the physical addresses and
61  *             sizes of the GIC registers.
62  *
63  * This function maps the registers of the GICs then initializes the GIC.
64  * If ASLR is enabled then the virtual addresses are randomized.
65  *
66  */
67 void arm_gic_init_map(struct arm_gic_init_info* init_info);
68 
69 enum {
70     /* Ignore cpu_mask and forward interrupt to all CPUs other than the current cpu */
71     ARM_GIC_SGI_FLAG_TARGET_FILTER_NOT_SENDER = 0x1,
72     /* Ignore cpu_mask and forward interrupt to current CPU only */
73     ARM_GIC_SGI_FLAG_TARGET_FILTER_SENDER = 0x2,
74     ARM_GIC_SGI_FLAG_TARGET_FILTER_MASK = 0x3,
75 
76     /* Only forward the interrupt to CPUs that has the interrupt configured as group 1 (non-secure) */
77     ARM_GIC_SGI_FLAG_NS = 0x4,
78 };
79 status_t arm_gic_sgi(u_int irq, u_int flags, u_int cpu_mask);
80 
81 struct arm_gic_affinities {
82     uint8_t aff0;
83     uint8_t aff1;
84     uint8_t aff2;
85     uint8_t aff3;
86 };
87 
88 struct arm_gic_affinities arch_cpu_num_to_gic_affinities(size_t cpu_num);
89 
90 #endif
91 
92