1 /*********************************************************************************************************************** 2 * Copyright [2015-2017] Renesas Electronics Corporation and/or its licensors. All Rights Reserved. 3 * 4 * This file is part of Renesas SynergyTM Software Package (SSP) 5 * 6 * The contents of this file (the "contents") are proprietary and confidential to Renesas Electronics Corporation 7 * and/or its licensors ("Renesas") and subject to statutory and contractual protections. 8 * 9 * This file is subject to a Renesas SSP license agreement. Unless otherwise agreed in an SSP license agreement with 10 * Renesas: 1) you may not use, copy, modify, distribute, display, or perform the contents; 2) you may not use any name 11 * or mark of Renesas for advertising or publicity purposes or in connection with your use of the contents; 3) RENESAS 12 * MAKES NO WARRANTY OR REPRESENTATIONS ABOUT THE SUITABILITY OF THE CONTENTS FOR ANY PURPOSE; THE CONTENTS ARE PROVIDED 13 * "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 14 * PARTICULAR PURPOSE, AND NON-INFRINGEMENT; AND 4) RENESAS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, OR 15 * CONSEQUENTIAL DAMAGES, INCLUDING DAMAGES RESULTING FROM LOSS OF USE, DATA, OR PROJECTS, WHETHER IN AN ACTION OF 16 * CONTRACT OR TORT, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE CONTENTS. Third-party contents 17 * included in this file may be subject to different terms. 18 **********************************************************************************************************************/ 19 20 /********************************************************************************************************************** 21 * File Name : hw_dataflash.h 22 * Description : Data Flash Control processing for Low Power Flash 23 **********************************************************************************************************************/ 24 25 #ifndef R_DATAFLASH_H 26 #define R_DATAFLASH_H 27 28 /* Common macro for SSP header files. There is also a corresponding SSP_FOOTER macro at the end of this file. */ 29 SSP_HEADER 30 31 /****************************************************************************** 32 * Macro definitions 33 ******************************************************************************/ 34 35 /* flash mode definition (FENTRYR Register setting)*/ 36 #define FENTRYR_DATAFLASH_PE_MODE (0xAA80U) 37 #define FENTRYR_READ_MODE (0xAA00U) 38 39 /* flash mode definition (FPMCR Register setting)*/ 40 #define DATAFLASH_PE_MODE (0x10U) 41 #define READ_MODE (0x08U) 42 #define LVPE_MODE (0x40U) 43 44 /* operation definition (FCR Register setting)*/ 45 #define FCR_WRITE (0x81U) 46 #define FCR_ERASE (0x84U) 47 #define FCR_BLANKCHECK (0x83U) 48 #define FCR_CLEAR (0x00U) 49 50 #define OPCCR_HIGH_SPEED_MODE (0x00U) 51 52 /****************************************************************************** 53 * Typedef definitions 54 ******************************************************************************/ 55 56 /** 57 * @struct r_dataflash_data_t 58 * DATAFLASH information values 59 */ 60 typedef struct R_DATAFLASH_DATA_T 61 { 62 uint32_t start_addr; /* start address (Erase) or Ram Source for Write, Dest for read */ 63 uint32_t end_addr; /* end address (Erase), or Flash Start address which will be read/written */ 64 uint32_t write_cnt; /* bytes remaining to do */ 65 } r_dataflash_data_t; 66 67 typedef struct R_DATAFLASH_ERASE_T 68 { 69 uint32_t start_addr; /* start address (Erase) or Ram Source for Write, Dest for read */ 70 uint32_t end_addr; /* end address (Erase), or Flash Start address which will be read/written */ 71 uint32_t write_cnt; /* bytes remaining to do */ 72 } r_dataflash_erase_t; 73 74 /****************************************************************************** 75 * Exported global variables 76 ******************************************************************************/ 77 void HW_FLASH_LP_dataflash_enable (flash_lp_instance_ctrl_t * const p_ctrl); 78 79 void HW_FLASH_LP_dataflash_enter_pe_mode (flash_lp_instance_ctrl_t * const p_ctrl); 80 81 ssp_err_t HW_FLASH_LP_dataflash_enter_read_mode (flash_lp_instance_ctrl_t * const p_ctrl); 82 83 void HW_FLASH_LP_dataflash_write (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t const src_start_address, 84 uint32_t dest_start_address, 85 uint32_t num_bytes, 86 uint32_t min_program_size); 87 88 void HW_FLASH_LP_dataflash_write_operation (flash_lp_instance_ctrl_t * const p_ctrl, const uint32_t psrc_addr, uint32_t dest_addr); 89 90 ssp_err_t HW_FLASH_LP_dataflash_write_monitor (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t min_program_size); 91 92 void HW_FLASH_LP_dataflash_erase (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t start_addr, uint32_t num_blocks, uint32_t block_size); 93 94 void HW_FLASH_LP_dataflash_erase_operation (flash_lp_instance_ctrl_t * const p_ctrl, const uint32_t block_start_addr, uint32_t block_size); 95 96 ssp_err_t HW_FLASH_LP_dataflash_erase_monitor (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t block_size); 97 98 void HW_FLASH_LP_dataflash_blank_check (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t start_addr, uint32_t end_addr); 99 100 ssp_err_t HW_FLASH_LP_dataflash_blank_check_monitor (flash_lp_instance_ctrl_t * const p_ctrl); 101 102 void HW_FLASH_LP_data_flash_set_flash_settings(current_parameters_t * const p_current_parameters); 103 104 /* Common macro for SSP header files. There is also a corresponding SSP_HEADER macro at the top of this file. */ 105 SSP_FOOTER 106 107 #endif /* R_DATAFLASH_H */ 108