xref: /aosp_15_r20/external/coreboot/src/drivers/genesyslogic/gl9755/gl9755.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /* Driver for Genesys Logic GL9755 */
4 
5 #include <console/console.h>
6 #include <device/device.h>
7 #include <device/pci.h>
8 #include <device/pci_ops.h>
9 #include <device/pci_ids.h>
10 #include "gl9755.h"
11 
gl9755_enable(struct device * dev)12 static void gl9755_enable(struct device *dev)
13 {
14 	uint32_t reg;
15 
16 	printk(BIOS_INFO, "GL9755: configure ASPM and LTR\n");
17 
18 	/* Set Vendor Config to be configurable */
19 	pci_or_config32(dev, CFG, CFG_EN);
20 
21 	/* Set LTR value */
22 	pci_write_config32(dev, LTR, NO_SNOOP_SCALE|NO_SNOOP_VALUE|SNOOP_SCALE|SNOOP_VALUE);
23 
24 	/* Adjust L1 exit latency to enable ASPM */
25 	reg = pci_read_config32(dev, CFG2);
26 	reg &= ~CFG2_LAT_L1_MASK;
27 	reg |= CFG2_LAT_L1_64US;
28 	pci_write_config32(dev, CFG2, reg);
29 
30 	/* Disable ASPM L0s support */
31 	pci_and_config32(dev, CFG2, ~CFG2_L0S_SUPPORT);
32 
33 	/* Turn off debug mode to enable SCP/OCP */
34 	pci_and_config32(dev, CFG3, ~SCP_DEBUG);
35 
36 	/* Set Vendor Config to be non-configurable */
37 	pci_and_config32(dev, CFG, ~CFG_EN);
38 }
39 
40 static struct device_operations gl9755_ops = {
41 	.read_resources		= pci_dev_read_resources,
42 	.set_resources		= pci_dev_set_resources,
43 	.enable_resources	= pci_dev_enable_resources,
44 	.ops_pci		= &pci_dev_ops_pci,
45 	.enable			= gl9755_enable
46 };
47 
48 static const unsigned short pci_device_ids[] = {
49 	PCI_DID_GLI_9755,
50 	0
51 };
52 
53 static const struct pci_driver genesyslogic_gl9755 __pci_driver = {
54 	.ops		= &gl9755_ops,
55 	.vendor		= PCI_VID_GLI,
56 	.devices	= pci_device_ids,
57 };
58 
59 struct chip_operations drivers_generic_genesyslogic_gl9755_ops = {
60 	.name = "Genesys Logic GL9755",
61 };
62