1 /***********************************************************************************************************************
2  * Copyright [2015-2017] Renesas Electronics Corporation and/or its licensors. All Rights Reserved.
3  *
4  * This file is part of Renesas SynergyTM Software Package (SSP)
5  *
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18  **********************************************************************************************************************/
19 
20 /**********************************************************************************************************************
21  * File Name    : hw_flash_lp_private.h
22  * Description  : FLASH LLD header file for Low power Flash.
23  **********************************************************************************************************************/
24 #include "r_flash_lp.h"
25 
26 #ifndef HW_FLASH_LP_PRIVATE_H
27 #define HW_FLASH_LP_PRIVATE_H
28 
29 /* Common macro for SSP header files. There is also a corresponding SSP_FOOTER macro at the end of this file. */
30 SSP_HEADER
31 
32 /**********************************************************************************************************************
33  * Includes
34  **********************************************************************************************************************/
35 
36 /**********************************************************************************************************************
37  * Macro definitions
38  **********************************************************************************************************************/
39 
40 /** The maximum timeout for commands is 100usec when FCLK is 16 MHz i.e. 1600 FCLK cycles.
41  * Assuming worst case of ICLK at 240 MHz and FCLK at 4 MHz, and optimization set to max such that
42  * each count decrement loop takes only 5 cycles, then ((240/4)*1600)/5 = 19200 */
43 #define FLASH_FRDY_CMD_TIMEOUT (19200)
44 
45 /** Time that it would take for the Data Buffer to be empty (DBFULL Flag) is 90 FCLK cycles.
46  * Assuming worst case of ICLK at 240 MHz and FCLK at 4 MHz, and optimization set to max such that
47  * each count decrement loop takes only 5 cycles, then ((240/4)*90)/5 = 1080 */
48 #define FLASH_DBFULL_TIMEOUT (1080)
49 
50 /***********************************************************************************************************************
51  * Typedef definitions
52  **********************************************************************************************************************/
53 /** Flash software lock states */
54 typedef enum e_flash_states_t
55 {
56     FLASH_STATE_UNINITIALIZED = 0,
57     FLASH_STATE_INITIALIZATION,
58     FLASH_STATE_READY,
59     FLASH_STATE_WRITING,
60     FLASH_STATE_ERASING,
61     FLASH_STATE_BLANK_CHECK,
62     FLASH_STATE_ACCESS_WINDOW,
63     FLASH_STATE_STARTUP_AREA,
64     FLASH_STATE_ID_CODE,
65     FLASH_UPDATE_FCLK
66 } flash_states_t;
67 
68 /** Flash types */
69 typedef enum e_flash_type
70 {
71     FLASH_TYPE_CODE_FLASH = 0,      ///< Operation is referencing Code Flash
72     FLASH_TYPE_DATA_FLASH           ///< Operation is referencing Data Flash
73 } flash_type_t;
74 
75 /** Possible Flash operation states */
76 typedef enum e_flash_operation
77 {
78     FLASH_OPERATION_INVALID,
79     FLASH_OPERATION_IDLE,
80     FLASH_OPERATION_CF_ERASE,
81     FLASH_OPERATION_CF_WRITE,
82     FLASH_OPERATION_DF_ERASE,
83     FLASH_OPERATION_DF_WRITE,
84     FLASH_OPERATION_DF_BLANKCHECK,
85     FLASH_OPERATION_CF_BLANKCHECK,
86     FLASH_OPERATION_DF_BGO_WRITE,
87     FLASH_OPERATION_DF_BGO_ERASE,
88     FLASH_OPERATION_DF_BGO_BLANKCHECK,
89     FLASH_OPERATION_FCU_INIT,
90     FLASH_OPERATION_FCU_RESET
91 } flash_operation_t;
92 
93 /** Parameters reflecting current in progress Flash operation */
94 typedef struct st_current_parameters
95 {
96     uint32_t           src_addr;                      ///< Source address for operation in progress
97     uint32_t           dest_addr;                     ///< Destination address for operation in progress
98     uint32_t           total_count;                   ///< total number of bytes to write/erase
99     uint32_t           current_count;                 ///< bytes of total completed
100     flash_operation_t  current_operation;             ///< Operation in progress, ie. FLASH_OPERATION_CF_ERASE
101     bool               bgo_enabled_df;                ///< Data Flash BGO operation enable/disable
102     uint32_t           min_pgm_size;                  ///< Minimum # of bytes that can be programmed, as defined for the
103                                                       ///< part, usually differs for CF and DF
104     uint32_t           block_size;                    ///< Minimum # of bytes that can be read or erased
105     uint32_t           cf_memory_st_addr;             ///< Starting memory address for Code Flash
106     uint32_t           df_memory_st_addr;             ///< Starting memory address for Data Flash
107     uint8_t            flash_cf_macros;               ///< The number of implemented HW Code Flash macros.
108     uint32_t           cf_macro_size;                 ///< The size of the implemented Code Flash macro
109     uint32_t           wait_cnt;                      ///< Worst case wait time for operation completion
110     uint32_t           wait_max_erase_df_block;       ///< Worst case erase time for DF block
111     uint32_t           wait_max_erase_cf_block;       ///< Worst case erase time for large CF block
112     uint32_t           wait_max_blank_check;          ///< Worst case blankcheck time for minimum blank check size
113     uint32_t           wait_max_write_df;             ///< Worst case write time for DF minimum write size
114     uint32_t           wait_max_write_cf;             ///< Worst case write time for CF minimum write size
115     uint32_t           flash_clock_freq;              ///< Flash clock frequency in Hz
116     uint32_t           system_clock_freq;             ///< System clock frequency in Hz
117     flash_result_t     bc_result;                     ///< Overall result of possible multi operation blankcheck.
118 } current_parameters_t;
119 
120 /** Flash block details */
121 typedef struct st_flash_block_info
122 {
123     uint32_t  block_section_st_addr;       ///< starting address for this block section (blocks of this size)
124     uint32_t  block_section_end_addr;      ///< ending address for this block section (blocks of this size)
125     uint32_t  memory_end_addr;             ///< ending address for the memory itself (code or data)
126     uint32_t  block_size;                  ///< Size of this block
127     uint32_t  min_program_size;            ///< minimum program size (bytes)
128     uint32_t  num_blocks;                  ///< number of blocks at this size
129     uint32_t  total_blocks;                ///< total number of blocks of this type
130     uint32_t  this_block_st_addr;          ///< starting address for this block (for queried address)
131     uint32_t  this_block_end_addr;         ///< ending address for this block (blocks of this size)
132     uint32_t  this_block_number;           ///< zero based block number for this address
133     bool      is_code_flash_addr;          ///< true if queried address is a Code Flash address
134     flash_type_t flash_type;               ///< target operation is for FLASH_TYPE_CODE_FLASH or FLASH_TYPE_DATA_FLASH
135 } flash_block_info_t;
136 
137 /** Flash macro information */
138 typedef struct st_flash_lp_macro_info
139 {
140     uint32_t  macro_st_addr;       ///< starting address for this macro
141     uint32_t  macro_end_addr;      ///< ending address for this macro
142     uint32_t  macro_size;          ///< number of bytes in this macro
143     uint32_t  total_macros;        ///< total number of macros for this device and flash type (Code or Data)
144     uint32_t  allowed_bytes;       ///< number of the requested bytes that may be provided to blancheck for this macro
145 } flash_lp_macro_info_t;
146 
147 /**********************************************************************************************************************
148  * Public Functions
149  **********************************************************************************************************************/
150 
151 /** NOTE: The keyword 'PLACE_FLASH_HERE' is defined in r_flash.h and in conjunction with the
152  * FLASH_CFG_PARAM_CODE_FLASH_PROGRAMMING_ENABLE config setting, determines if sections of the Flash API will be copied
153  * to
154  * and executed from RAM. This is required for Data Flash BGO (Background) operation.
155  */
156 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
157 ssp_err_t HW_FLASH_LP_irq_cfg (bool state, flash_cfg_t const * const p_cfg, IRQn_Type irq) PLACE_IN_RAM_SECTION;
158 
159 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
160 void      HW_FLASH_LP_init (flash_lp_instance_ctrl_t * const p_ctrl, current_parameters_t * p_current_parameters) PLACE_IN_RAM_SECTION;
161 
162 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
163 ssp_err_t HW_FLASH_LP_pe_mode_enter (flash_lp_instance_ctrl_t * const p_ctrl, flash_type_t flash_type) PLACE_IN_RAM_SECTION;
164 
165 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
166 ssp_err_t HW_FLASH_LP_pe_mode_exit (flash_lp_instance_ctrl_t * const p_ctrl) PLACE_IN_RAM_SECTION;
167 
168 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
169 ssp_err_t HW_FLASH_LP_erase (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t block_address, uint32_t num_blocks, uint32_t block_size) PLACE_IN_RAM_SECTION;
170 
171 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
172 ssp_err_t HW_FLASH_LP_write (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t const src_start_address,
173                              uint32_t dest_start_address,
174                              uint32_t num_bytes,
175                              uint32_t min_program_size) PLACE_IN_RAM_SECTION;
176 
177 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
178 ssp_err_t HW_FLASH_LP_blankcheck (flash_lp_instance_ctrl_t * const p_ctrl, uint32_t start_address, uint32_t num_bytes,
179                                   flash_result_t * result) PLACE_IN_RAM_SECTION;
180 
181 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
182 void      HW_FLASH_LP_reset (flash_lp_instance_ctrl_t * const p_ctrl) PLACE_IN_RAM_SECTION;
183 
184 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
185 ssp_err_t HW_FLASH_HP_stop (void) PLACE_IN_RAM_SECTION;
186 
187 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
188 void      flash_ReleaseState (void) PLACE_IN_RAM_SECTION;
189 
190 /*LDRA_INSPECTED 219 s - This is an allowed exception to LDRA standard 219 S "User name starts with underscore."*/
191 bool      flash_get_block_info (uint32_t addr, flash_block_info_t * p_block_info) PLACE_IN_RAM_SECTION;
192 
193 /** FRDY ISR is only used for DataFlash operations. For Code flash operations are blocking. Therefore ISR does
194  * not need to be located in RAM.
195  */
196 void fcu_frdyi_isr (void);
197 
198 /* Common macro for SSP header files. There is also a corresponding SSP_HEADER macro at the top of this file. */
199 SSP_FOOTER
200 #endif /* HW_FLASH_LP_PRIVATE_H */
201