xref: /aosp_15_r20/external/coreboot/src/ec/clevo/it5570e/i2ec.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/pnp_ops.h>
4 
5 #include "i2ec.h"
6 
7 #define SIO_DEV		PNP_DEV(0x2e, 0)
8 
9 /* SIO depth 2 index/data pair */
10 #define D2ADR		0x2e
11 #define D2DAT		0x2f
12 
13 /* SIO depth 2 address space */
14 #define I2EC_ADDR_L	0x10
15 #define I2EC_ADDR_H	0x11
16 #define I2EC_DATA	0x12
17 
18 /*
19  * Read/write SIO "depth 2" registers
20  */
21 
sio_d2_read(uint8_t addr)22 static uint8_t sio_d2_read(uint8_t addr)
23 {
24 	pnp_write_config(SIO_DEV, D2ADR, addr);
25 	return pnp_read_config(SIO_DEV, D2DAT);
26 }
27 
sio_d2_write(uint8_t addr,uint8_t val)28 static void sio_d2_write(uint8_t addr, uint8_t val)
29 {
30 	pnp_write_config(SIO_DEV, D2ADR, addr);
31 	pnp_write_config(SIO_DEV, D2DAT, val);
32 }
33 
34 /*
35  * Read/write I2EC registers through SIO "depth 2" address space
36  */
37 
ec_d2i2ec_read(uint16_t addr)38 uint8_t ec_d2i2ec_read(uint16_t addr)
39 {
40 	sio_d2_write(I2EC_ADDR_H, addr >> 8 & 0xff);
41 	sio_d2_write(I2EC_ADDR_L, addr      & 0xff);
42 	return sio_d2_read(I2EC_DATA);
43 }
44 
ec_d2i2ec_write(uint16_t addr,uint8_t val)45 void ec_d2i2ec_write(uint16_t addr, uint8_t val)
46 {
47 	sio_d2_write(I2EC_ADDR_H, addr >> 8 & 0xff);
48 	sio_d2_write(I2EC_ADDR_L, addr      & 0xff);
49 	sio_d2_write(I2EC_DATA, val);
50 }
51