1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  */
6 
7 #ifndef __IA_CSS_BNLM_PARAM_H
8 #define __IA_CSS_BNLM_PARAM_H
9 
10 #include "type_support.h"
11 #include "vmem.h" /* needed for VMEM_ARRAY */
12 
13 struct bnlm_lut {
14 	VMEM_ARRAY(thr, ISP_VEC_NELEMS); /* thresholds */
15 	VMEM_ARRAY(val, ISP_VEC_NELEMS); /* values */
16 };
17 
18 struct bnlm_vmem_params {
19 	VMEM_ARRAY(nl_th, ISP_VEC_NELEMS);
20 	VMEM_ARRAY(match_quality_max_idx, ISP_VEC_NELEMS);
21 	struct bnlm_lut mu_root_lut;
22 	struct bnlm_lut sad_norm_lut;
23 	struct bnlm_lut sig_detail_lut;
24 	struct bnlm_lut sig_rad_lut;
25 	struct bnlm_lut rad_pow_lut;
26 	struct bnlm_lut nl_0_lut;
27 	struct bnlm_lut nl_1_lut;
28 	struct bnlm_lut nl_2_lut;
29 	struct bnlm_lut nl_3_lut;
30 
31 	/* LUTs used for division approximiation */
32 	struct bnlm_lut div_lut;
33 
34 	VMEM_ARRAY(div_lut_intercepts, ISP_VEC_NELEMS);
35 
36 	/* 240x does not have an ISP instruction to left shift each element of a
37 	 * vector by different shift value. Hence it will be simulated by multiplying
38 	 * the elements by required 2^shift. */
39 	VMEM_ARRAY(power_of_2, ISP_VEC_NELEMS);
40 };
41 
42 /* BNLM ISP parameters */
43 struct bnlm_dmem_params {
44 	bool rad_enable;
45 	s32 rad_x_origin;
46 	s32 rad_y_origin;
47 	s32 avg_min_th;
48 	s32 max_min_th;
49 
50 	s32 exp_coeff_a;
51 	u32 exp_coeff_b;
52 	s32 exp_coeff_c;
53 	u32 exp_exponent;
54 };
55 
56 #endif /* __IA_CSS_BNLM_PARAM_H */
57