1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  */
6 
7 #ifndef _ibuf_cntrl_defs_h_
8 #define _ibuf_cntrl_defs_h_
9 
10 #include <stream2mmio_defs.h>
11 #include <dma_v2_defs.h>
12 
13 #define _IBUF_CNTRL_REG_ALIGN 4
14 /* alignment of register banks, first bank are shared configuration and status registers: */
15 #define _IBUF_CNTRL_PROC_REG_ALIGN        32
16 
17 /* the actual amount of configuration registers per proc: */
18 #define _IBUF_CNTRL_CONFIG_REGS_PER_PROC 18
19 /* the actual amount of shared configuration registers: */
20 #define _IBUF_CNTRL_CONFIG_REGS_NO_PROC  0
21 
22 /* the actual amount of status registers per proc */
23 #define _IBUF_CNTRL_STATUS_REGS_PER_PROC (_IBUF_CNTRL_CONFIG_REGS_PER_PROC + 10)
24 /* the actual amount shared status registers */
25 #define _IBUF_CNTRL_STATUS_REGS_NO_PROC  (_IBUF_CNTRL_CONFIG_REGS_NO_PROC + 2)
26 
27 /* time out bits, maximum time out value is 2^_IBUF_CNTRL_TIME_OUT_BITS - 1 */
28 #define _IBUF_CNTRL_TIME_OUT_BITS         5
29 
30 /* command token definition */
31 #define _IBUF_CNTRL_CMD_TOKEN_LSB          0
32 #define _IBUF_CNTRL_CMD_TOKEN_MSB          1
33 
34 /* Str2MMIO defines */
35 #define _IBUF_CNTRL_STREAM2MMIO_CMD_TOKEN_MSB        _STREAM2MMIO_CMD_TOKEN_CMD_MSB
36 #define _IBUF_CNTRL_STREAM2MMIO_CMD_TOKEN_LSB        _STREAM2MMIO_CMD_TOKEN_CMD_LSB
37 #define _IBUF_CNTRL_STREAM2MMIO_NUM_ITEMS_BITS       _STREAM2MMIO_PACK_NUM_ITEMS_BITS
38 #define _IBUF_CNTRL_STREAM2MMIO_ACK_EOF_BIT          _STREAM2MMIO_PACK_ACK_EOF_BIT
39 #define _IBUF_CNTRL_STREAM2MMIO_ACK_TOKEN_VALID_BIT  _STREAM2MMIO_ACK_TOKEN_VALID_BIT
40 
41 /* acknowledge token definition */
42 #define _IBUF_CNTRL_ACK_TOKEN_STORES_IDX    0
43 #define _IBUF_CNTRL_ACK_TOKEN_STORES_BITS   15
44 #define _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX     (_IBUF_CNTRL_ACK_TOKEN_STORES_BITS + _IBUF_CNTRL_ACK_TOKEN_STORES_IDX)
45 #define _IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS    _STREAM2MMIO_PACK_NUM_ITEMS_BITS
46 #define _IBUF_CNTRL_ACK_TOKEN_LSB          _IBUF_CNTRL_ACK_TOKEN_STORES_IDX
47 #define _IBUF_CNTRL_ACK_TOKEN_MSB          (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX - 1)
48 /* bit 31 indicates a valid ack: */
49 #define _IBUF_CNTRL_ACK_TOKEN_VALID_BIT    (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX)
50 
51 /*shared registers:*/
52 #define _IBUF_CNTRL_RECALC_WORDS_STATUS     0
53 #define _IBUF_CNTRL_ARBITERS_STATUS         1
54 
55 #define _IBUF_CNTRL_SET_CRUN                2 /* NO PHYSICAL REGISTER!! Only used in HSS model */
56 
57 /*register addresses for each proc: */
58 #define _IBUF_CNTRL_CMD                   0
59 #define _IBUF_CNTRL_ACK                   1
60 
61 /* number of items (packets or words) per frame: */
62 #define _IBUF_CNTRL_NUM_ITEMS_PER_STORE   2
63 
64 /* number of stores (packets or words) per store/buffer: */
65 #define _IBUF_CNTRL_NUM_STORES_PER_FRAME  3
66 
67 /* the channel and command in the DMA */
68 #define _IBUF_CNTRL_DMA_CHANNEL           4
69 #define _IBUF_CNTRL_DMA_CMD               5
70 
71 /* the start address and stride of the buffers */
72 #define _IBUF_CNTRL_BUFFER_START_ADDRESS  6
73 #define _IBUF_CNTRL_BUFFER_STRIDE         7
74 #define _IBUF_CNTRL_BUFFER_END_ADDRESS    8
75 
76 /* destination start address, stride and end address; should be the same as in the DMA */
77 #define _IBUF_CNTRL_DEST_START_ADDRESS    9
78 #define _IBUF_CNTRL_DEST_STRIDE           10
79 #define _IBUF_CNTRL_DEST_END_ADDRESS      11
80 
81 /* send a frame sync or not, default 1 */
82 #define _IBUF_CNTRL_SYNC_FRAME            12
83 
84 /* str2mmio cmds */
85 #define _IBUF_CNTRL_STR2MMIO_SYNC_CMD     13
86 #define _IBUF_CNTRL_STR2MMIO_STORE_CMD    14
87 
88 /* num elems p word*/
89 #define _IBUF_CNTRL_SHIFT_ITEMS           15
90 #define _IBUF_CNTRL_ELEMS_P_WORD_IBUF     16
91 #define _IBUF_CNTRL_ELEMS_P_WORD_DEST     17
92 
93 /* STATUS */
94 /* current frame and stores in buffer */
95 #define _IBUF_CNTRL_CUR_STORES            18
96 #define _IBUF_CNTRL_CUR_ACKS              19
97 
98 /* current buffer and destination address for DMA cmd's */
99 #define _IBUF_CNTRL_CUR_S2M_IBUF_ADDR     20
100 #define _IBUF_CNTRL_CUR_DMA_IBUF_ADDR     21
101 #define _IBUF_CNTRL_CUR_DMA_DEST_ADDR     22
102 #define _IBUF_CNTRL_CUR_ISP_DEST_ADDR     23
103 
104 #define _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND  24
105 
106 #define _IBUF_CNTRL_MAIN_CNTRL_STATE      25
107 #define _IBUF_CNTRL_DMA_SYNC_STATE        26
108 #define _IBUF_CNTRL_ISP_SYNC_STATE        27
109 
110 /*Commands: */
111 #define _IBUF_CNTRL_CMD_STORE_FRAME_IDX     0
112 #define _IBUF_CNTRL_CMD_ONLINE_IDX          1
113 
114 /* initialize, copy st_addr to cur_addr etc */
115 #define _IBUF_CNTRL_CMD_INITIALIZE          0
116 
117 /* store an online frame (sync with ISP, use end cfg start, stride and end address: */
118 #define _IBUF_CNTRL_CMD_STORE_ONLINE_FRAME  ((1 << _IBUF_CNTRL_CMD_STORE_FRAME_IDX) | (1 << _IBUF_CNTRL_CMD_ONLINE_IDX))
119 
120 /* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */
121 #define _IBUF_CNTRL_CMD_STORE_OFFLINE_FRAME  BIT(_IBUF_CNTRL_CMD_STORE_FRAME_IDX)
122 
123 /* false command token, should be different then commands. Use online bit, not store frame: */
124 #define _IBUF_CNTRL_FALSE_ACK               2
125 
126 #endif
127