xref: /aosp_15_r20/external/mesa3d/src/intel/compiler/intel_nir.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright (c) 2015-2023 Intel Corporation
3  * SPDX-License-Identifier: MIT
4  */
5 
6 #ifndef INTEL_NIR_H
7 #define INTEL_NIR_H
8 
9 #include "nir.h"
10 
11 #ifdef __cplusplus
12 extern "C" {
13 #endif
14 
15 struct intel_device_info;
16 
17 void intel_nir_apply_tcs_quads_workaround(nir_shader *nir);
18 bool intel_nir_blockify_uniform_loads(nir_shader *shader,
19                                       const struct intel_device_info *devinfo);
20 bool intel_nir_clamp_image_1d_2d_array_sizes(nir_shader *shader);
21 bool intel_nir_clamp_per_vertex_loads(nir_shader *shader);
22 bool intel_nir_cleanup_resource_intel(nir_shader *shader);
23 
24 bool intel_nir_lower_conversions(nir_shader *nir);
25 bool intel_nir_lower_non_uniform_barycentric_at_sample(nir_shader *nir);
26 bool intel_nir_lower_non_uniform_resource_intel(nir_shader *shader);
27 bool intel_nir_lower_patch_vertices_in(nir_shader *shader, unsigned input_vertices);
28 bool intel_nir_lower_shading_rate_output(nir_shader *nir);
29 bool intel_nir_lower_sparse_intrinsics(nir_shader *nir);
30 
31 struct intel_nir_lower_texture_opts {
32    bool combined_lod_and_array_index;
33    bool combined_lod_or_bias_and_offset;
34 };
35 bool intel_nir_lower_texture(nir_shader *nir,
36                              const struct intel_nir_lower_texture_opts *opts);
37 
38 bool intel_nir_opt_peephole_ffma(nir_shader *shader);
39 bool intel_nir_opt_peephole_imul32x16(nir_shader *shader);
40 
41 bool intel_nir_pulls_at_sample(nir_shader *shader);
42 
43 bool intel_nir_lower_printf(nir_shader *nir);
44 
45 #ifdef __cplusplus
46 }
47 #endif
48 
49 #endif /* INTEL_NIR_H */
50