xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/block/include/intelblocks/irq.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef SOC_INTEL_COMMON_IRQ_H
4 #define SOC_INTEL_COMMON_IRQ_H
5 
6 #include <southbridge/intel/common/acpi_pirq_gen.h>
7 #include <types.h>
8 
9 #define MAX_FNS		8
10 #define INVALID_IRQ	-1
11 
12 #define ANY_PIRQ(x)			[PCI_FUNC(x)] = { .fixed_int_pin = PCI_INT_NONE,\
13 							  .fixed_pirq = PIRQ_INVALID,	\
14 							  .irq_route = IRQ_PIRQ, }
15 #define DIRECT_IRQ(x)			[PCI_FUNC(x)] = { .fixed_int_pin = PCI_INT_NONE,\
16 							  .fixed_pirq = PIRQ_INVALID,	\
17 							  .irq_route = IRQ_DIRECT,}
18 #define FIXED_INT_ANY_PIRQ(x, pin)	[PCI_FUNC(x)] = { .fixed_int_pin = pin,		\
19 							  .fixed_pirq = PIRQ_INVALID,	\
20 							  .irq_route = IRQ_PIRQ,}
21 #define FIXED_INT_PIRQ(x, pin, pirq)	[PCI_FUNC(x)] = { .fixed_int_pin = pin,		\
22 							  .fixed_pirq = pirq,		\
23 							  .irq_route = IRQ_PIRQ,}
24 
25 struct slot_irq_constraints {
26 	unsigned int slot;
27 	struct {
28 		enum pci_pin fixed_int_pin;
29 		enum pirq fixed_pirq;
30 		enum {
31 			IRQ_NONE = 0,	/* Empty function */
32 			IRQ_PIRQ = 1,	/* PIRQ routing, i.e. IRQs 16 - 23 */
33 			IRQ_DIRECT = 2,	/* No PIRQ routing, i.e., IRQs > 23 */
34 		} irq_route;
35 	} fns[MAX_FNS];
36 };
37 
38 struct pci_irq_entry {
39 	unsigned int devfn;
40 	enum pci_pin pin;
41 	unsigned int irq;
42 	struct pci_irq_entry *next;
43 };
44 
45 /*
46  * This functions applies rules from FSP, BWG and SoC to come up with a set of
47  * PCI slot/function --> IRQ pin/IRQ number entries.
48  *
49  * The results of this calculation are cached within this module for usage
50  * by the other API functions.
51  */
52 bool assign_pci_irqs(const struct slot_irq_constraints *constraints, size_t num_slots);
53 
54 /* Generate an ACPI PCI IRQ routing table (_PRT) in the \_SB.PCI0 scope, using
55    the cached results. */
56 bool generate_pin_irq_map(void);
57 
58 /* Typically the FSP can accept a list of the mappings provided above, and
59    program them, but for PCH devices only. This function provides the same
60    function for non-PCH devices. */
61 bool irq_program_non_pch(void);
62 
63 const struct pci_irq_entry *get_cached_pci_irqs(void);
64 
65 /* Search the cached PCI IRQ assignment results for the matching devfn and
66    return the corresponding IRQ, or INVALID_IRQ if not found. */
67 int get_pci_devfn_irq(unsigned int devfn);
68 
69 /* Check if a given slot is a PCH slot.
70  * Note: For PCH less SoC platforms, like MeteorLake and onwards, this function
71  * can be utilized to check if a slot belongs to the SoC or IOE die.
72  */
73 bool is_pch_slot(unsigned int devfn);
74 
75 #endif /* SOC_INTEL_COMMON_IRQ_H */
76