xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/block/include/intelblocks/spi.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef SOC_INTEL_COMMON_BLOCK_SPI_H
4 #define SOC_INTEL_COMMON_BLOCK_SPI_H
5 
6 #include <types.h>
7 
8 /*
9  * Check if write protection for CSE RO is enabled or not.
10  * Returns true if write protection for CSE RO is enabled, false otherwise.
11  */
12 bool is_spi_wp_cse_ro_en(void);
13 
14 /* Gets CSE RO's write protected area's base address and limit */
15 void spi_get_wp_cse_ro_range(uint32_t *base, uint32_t *limit);
16 
17 /*
18  * SoC overrides
19  *
20  * All new SoC must implement below functionality.
21  */
22 
23 /* Function to convert input device function to bus number
24  * Input: Device Function number
25  * Output: -1 translate to Error, >=0 is bus number
26  */
27 int spi_soc_devfn_to_bus(unsigned int devfn);
28 
29 #endif	/* SOC_INTEL_COMMON_BLOCK_SPI_H */
30