1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _TCSS_H_ 4 #define _TCSS_H_ 5 6 #include <intelblocks/gpio.h> 7 #if !defined(__ACPI__) 8 #include <device/usbc_mux.h> 9 10 /* PMC IPC related offsets and commands */ 11 #define PMC_IPC_USBC_CMD_ID 0xA7 12 #define PMC_IPC_USBC_SUBCMD_ID 0x0 13 #define PMC_IPC_CMD 0x0 14 #define PMC_IPC_TCSS_CONN_REQ_RES 0x0 15 #define PMC_IPC_TCSS_DISC_REQ_RES 0x1 16 #define PMC_IPC_TCSS_SAFE_MODE_REQ_RES 0x2 17 #define PMC_IPC_TCSS_ALTMODE_REQ_RES 0x3 18 #define PMC_IPC_TCSS_HPD_REQ_RES 0x4 19 #define PMC_IPC_CONN_REQ_SIZE 2 20 #define PMC_IPC_DISC_REQ_SIZE 2 21 #define PMC_IPC_ALT_REQ_SIZE 8 22 #define PMC_IPC_SAFE_REQ_SIZE 1 23 #define PMC_IPC_HPD_REQ_SIZE 2 24 #define PMC_IPC_DP_MODE 1 25 26 #define TCSS_CD_USAGE_SHIFT 0 27 #define TCSS_CD_USAGE_MASK 0x0f 28 #define TCSS_CD_USB3_SHIFT 4 29 #define TCSS_CD_USB3_MASK 0x0f 30 #define TCSS_CD_USB2_SHIFT 8 31 #define TCSS_CD_USB2_MASK 0x0f 32 #define TCSS_CD_UFP_SHIFT 12 33 #define TCSS_CD_UFP_MASK 0x01 34 #define TCSS_CD_HSL_SHIFT 13 35 #define TCSS_CD_HSL_MASK 0x01 36 #define TCSS_CD_SBU_SHIFT 14 37 #define TCSS_CD_SBU_MASK 0x01 38 #define TCSS_CD_ACC_SHIFT 15 39 #define TCSS_CD_ACC_MASK 0x01 40 #define TCSS_CD_FAILED_SHIFT 16 41 #define TCSS_CD_FAILED_MASK 0x01 42 #define TCSS_CD_FATAL_SHIFT 17 43 #define TCSS_CD_FATAL_MASK 0x01 44 45 #define TCSS_ALT_USAGE_SHIFT 0 46 #define TCSS_ALT_USAGE_MASK 0x0f 47 #define TCSS_ALT_USB3_SHIFT 4 48 #define TCSS_ALT_USB3_MASK 0x0f 49 #define TCSS_ALT_MODE_SHIFT 12 50 #define TCSS_ALT_MODE_MASK 0x0f 51 #define TCSS_ALT_POLARITY_SHIFT 1 52 #define TCSS_ALT_POLARITY_MASK 0x01 53 #define TCSS_ALT_CABLE_SHIFT 2 54 #define TCSS_ALT_CABLE_MASK 0x01 55 #define TCSS_ALT_UFP_SHIFT 3 56 #define TCSS_ALT_UFP_MASK 0x01 57 #define TCSS_ALT_DP_MODE_SHIFT 8 58 #define TCSS_ALT_DP_MODE_MASK 0x0f 59 #define TCSS_ALT_FAILED_SHIFT 8 60 #define TCSS_ALT_FAILED_MASK 0x01 61 #define TCSS_ALT_FATAL_SHIFT 9 62 #define TCSS_ALT_FATAL_MASK 0x01 63 64 #define TCSS_HPD_USAGE_SHIFT 0 65 #define TCSS_HPD_USAGE_MASK 0x0f 66 #define TCSS_HPD_USB3_SHIFT 4 67 #define TCSS_HPD_USB3_MASK 0x0f 68 #define TCSS_HPD_LVL_SHIFT 12 69 #define TCSS_HPD_LVL_MASK 0x01 70 #define TCSS_HPD_IRQ_SHIFT 13 71 #define TCSS_HPD_IRQ_MASK 0x01 72 73 enum typec_port_index { 74 TYPE_C_PORT_0, 75 TYPE_C_PORT_1, 76 TYPE_C_PORT_2, 77 TYPE_C_PORT_3, 78 MAX_TYPE_C_PORTS, 79 }; 80 81 #define TCSS_CD_FIELD(name, val) \ 82 (((val) & TCSS_CD_##name##_MASK) << TCSS_CD_##name##_SHIFT) 83 84 #define GET_TCSS_CD_FIELD(name, val) \ 85 (((val) >> TCSS_CD_##name##_SHIFT) & TCSS_CD_##name##_MASK) 86 87 88 #define TCSS_ALT_FIELD(name, val) \ 89 (((val) & TCSS_ALT_##name##_MASK) << TCSS_ALT_##name##_SHIFT) 90 91 #define TCSS_HPD_FIELD(name, val) \ 92 (((val) & TCSS_HPD_##name##_MASK) << TCSS_HPD_##name##_SHIFT) 93 94 #define GET_TCSS_ALT_FIELD(name, val) \ 95 (((val) >> TCSS_ALT_##name##_SHIFT) & TCSS_ALT_##name##_MASK) 96 97 #define TCSS_CONN_STATUS_HAS_FAILED(s) GET_TCSS_CD_FIELD(FAILED, s) 98 #define TCSS_STATUS_HAS_FAILED(s) GET_TCSS_ALT_FIELD(FAILED, s) 99 /* !fatal means retry */ 100 #define TCSS_CONN_STATUS_IS_FATAL(s) GET_TCSS_CD_FIELD(FATAL, s) 101 #define TCSS_STATUS_IS_FATAL(s) GET_TCSS_ALT_FIELD(FATAL, s) 102 103 #define USB_2_PORT_MASK 0x0f 104 #define USB_3_PORT_MASK 0xf0 105 106 /* TCSS connection modes for PMC */ 107 enum pmc_ipc_conn_mode { 108 PMC_IPC_TCSS_DISCONNECT_MODE, 109 PMC_IPC_TCSS_USB_MODE, 110 PMC_IPC_TCSS_ALTERNATE_MODE, 111 PMC_IPC_TCSS_SAFE_MODE, 112 PMC_IPC_TCSS_HPD_MODE, 113 PMC_IPC_TCSS_TOTAL_MODES, 114 }; 115 116 enum pmc_ipc_command_type { 117 CONNECT_REQ, 118 SAFE_REQ, 119 DP_REQ, 120 HPD_REQ, 121 }; 122 123 /* DP Mode pin definitions */ 124 #define MODE_DP_PIN_A BIT(0) 125 #define MODE_DP_PIN_B BIT(1) 126 #define MODE_DP_PIN_C BIT(2) 127 #define MODE_DP_PIN_D BIT(3) 128 #define MODE_DP_PIN_E BIT(4) 129 #define MODE_DP_PIN_F BIT(5) 130 131 struct tcss_port_map { 132 uint8_t usb2_port; /* USB2 Port Number */ 133 uint8_t usb3_port; /* USB3 Port Number */ 134 }; 135 136 struct typec_aux_bias_pads { 137 gpio_t pad_auxn_dc; 138 gpio_t pad_auxp_dc; 139 }; 140 141 struct soc_tcss_ops { 142 void (*configure_aux_bias_pads)(const struct typec_aux_bias_pads *pads); 143 bool (*valid_tbt_auth)(void); 144 }; 145 146 extern const struct soc_tcss_ops tcss_ops; 147 148 /* Method to configure pads */ 149 void tcss_configure_aux_bias_pads_regbar(const struct typec_aux_bias_pads *pads); 150 void ioe_tcss_configure_aux_bias_pads_sbi(const struct typec_aux_bias_pads *pads); 151 152 /* 153 * 1) Initialize TCSS muxes to disconnected state 154 * 2) Configure GPIO pads to provide DC Bias on AUX signals 155 * 3) Detect DP-over-Type-C alternate mode 156 */ 157 void tcss_configure(const struct typec_aux_bias_pads aux_bias_pads[MAX_TYPE_C_PORTS]); 158 159 /* 160 * Method to get only the port information to initialize the muxes to 161 * disconnect mode during boot. 162 * Returns tcss_port_map of all ports on system 163 */ 164 const struct tcss_port_map *tcss_get_port_info(size_t *num_ports); 165 166 /* Method to validate the Thunderbolt authentication */ 167 bool tcss_valid_tbt_auth(void); 168 bool ioe_tcss_valid_tbt_auth(void); 169 #endif /* !defined(__ACPI__) */ 170 171 /* 172 * The PCI-SIG engineering change requirement provides the ACPI additions for firmware latency 173 * optimization. Both of FW_RESET_TIME and FW_D3HOT_TO_D0_TIME are applicable to the upstream 174 * port of the USB4/TBT topology. 175 */ 176 /* Number of microseconds to wait after a conventional reset */ 177 #define FW_RESET_TIME 50000 178 179 /* Number of microseconds to wait after data link layer active report */ 180 #define FW_DL_UP_TIME 1 181 182 /* Number of microseconds to wait after a function level reset */ 183 #define FW_FLR_RESET_TIME 1 184 185 /* Number of microseconds to wait from D3 hot to D0 transition */ 186 #define FW_D3HOT_TO_D0_TIME 50000 187 188 /* Number of microseconds to wait after setting the VF enable bit */ 189 #define FW_VF_ENABLE_TIME 1 190 191 #endif /* _TCSS_H_ */ 192