xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/pch/include/intelpch/lockdown.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef SOC_INTEL_COMMON_PCH_LOCKDOWN_H
4 #define SOC_INTEL_COMMON_PCH_LOCKDOWN_H
5 
6 /*
7  * This function will get lockdown config specific to soc.
8  *
9  * Return values:
10  *  0 = CHIPSET_LOCKDOWN_COREBOOT = Use coreboot to lockdown IPs
11  *  1 = CHIPSET_LOCKDOWN_FSP = use FSP's lockdown functionality to lockdown IPs
12  */
13 int get_lockdown_config(void);
14 
15 /*
16  * Common PCH lockdown will perform lock down operation for DMI, FAST_SPI.
17  * And SoC should implement any other PCH lockdown if applicable as
18  * per silicon security guideline (i.e. LPC, PMC etc.)
19  *
20  * Input:
21  * chipset_lockdown = Return value from get_lockdown_config() function
22  */
23 void soc_lockdown_config(int chipset_lockdown);
24 
25 #endif /* SOC_INTEL_COMMON_PCH_LOCKDOWN_H */
26