1 /****************************************************************************** 2 * 3 * Copyright (C) 2022 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 21 /** 22 ****************************************************************************** 23 * @file 24 * isvce_core_coding.h 25 * 26 * @brief 27 * This file contains extern declarations of core coding routines 28 * 29 * @author 30 * ittiam 31 * 32 * @remarks 33 * none 34 ****************************************************************************** 35 */ 36 37 #ifndef _ISVCE_CORE_CODING_H_ 38 #define _ISVCE_CORE_CODING_H_ 39 40 #include "isvce_structs.h" 41 42 /*****************************************************************************/ 43 /* Constant Macros */ 44 /*****************************************************************************/ 45 46 /** 47 ****************************************************************************** 48 * @brief Enable/Disable Hadamard transform of DC Coeff's 49 ****************************************************************************** 50 */ 51 #define DISABLE_DC_TRANSFORM 0 52 #define ENABLE_DC_TRANSFORM 1 53 54 /** 55 ******************************************************************************* 56 * @brief bit masks for DC and AC control flags 57 ******************************************************************************* 58 */ 59 60 #define DC_COEFF_CNT_LUMA_MB 16 61 #define NUM_4X4_BLKS_LUMA_MB_ROW 4 62 #define NUM_LUMA4x4_BLOCKS_IN_MB 16 63 #define NUM_CHROMA4x4_BLOCKS_IN_MB 8 64 65 #define SIZE_4X4_BLK_HRZ TRANS_SIZE_4 66 #define SIZE_4X4_BLK_VERT TRANS_SIZE_4 67 68 #define CNTRL_FLAG_DC_MASK_LUMA 0x0000FFFF 69 #define CNTRL_FLAG_AC_MASK_LUMA 0xFFFF0000 70 71 #define CNTRL_FLAG_AC_MASK_CHROMA_U 0xF0000000 72 #define CNTRL_FLAG_DC_MASK_CHROMA_U 0x0000F000 73 74 #define CNTRL_FLAG_AC_MASK_CHROMA_V 0x0F000000 75 #define CNTRL_FLAG_DC_MASK_CHROMA_V 0x00000F00 76 77 #define CNTRL_FLAG_AC_MASK_CHROMA (CNTRL_FLAG_AC_MASK_CHROMA_U | CNTRL_FLAG_AC_MASK_CHROMA_V) 78 #define CNTRL_FLAG_DC_MASK_CHROMA (CNTRL_FLAG_DC_MASK_CHROMA_U | CNTRL_FLAG_DC_MASK_CHROMA_V) 79 80 #define CNTRL_FLAG_DCBLK_MASK_CHROMA 0x0000C000 81 82 /** 83 ******************************************************************************* 84 * @brief macros for transforms 85 ******************************************************************************* 86 */ 87 #define DEQUEUE_BLKID_FROM_CONTROL(u4_cntrl, blk_lin_id) \ 88 { \ 89 blk_lin_id = CLZ(u4_cntrl); \ 90 u4_cntrl &= (0x7FFFFFFF >> blk_lin_id); \ 91 }; 92 93 #define IND2SUB_LUMA_MB(u4_blk_id, i4_offset_x, i4_offset_y) \ 94 { \ 95 i4_offset_x = (u4_blk_id % 4) << 2; \ 96 i4_offset_y = (u4_blk_id / 4) << 2; \ 97 } 98 99 #define IS_V_BLK(u4_blk_id) ((u4_blk_id) > 3) 100 101 #define IND2SUB_CHROMA_MB(u4_blk_id, i4_offset_x, i4_offset_y) \ 102 { \ 103 i4_offset_x = ((u4_blk_id & 0x1) << 3) + IS_V_BLK(u4_blk_id); \ 104 i4_offset_y = (u4_blk_id & 0x2) << 1; \ 105 } 106 107 /* Typedefs */ 108 109 /*****************************************************************************/ 110 /* Function Declarations */ 111 /*****************************************************************************/ 112 113 extern FT_CORE_CODING isvce_code_luma_intra_macroblock_16x16; 114 115 extern FT_CORE_CODING isvce_code_luma_intra_macroblock_4x4; 116 117 extern FT_CORE_CODING isvce_code_luma_intra_macroblock_4x4_rdopt_on; 118 119 extern FT_CORE_CODING isvce_code_chroma_intra_macroblock_8x8; 120 121 extern FT_CORE_CODING isvce_code_luma_inter_macroblock_16x16; 122 123 extern FT_CORE_CODING isvce_code_chroma_inter_macroblock_8x8; 124 125 #endif 126