1 /*
2  * Copyright (c) 2019-2022 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  */
24 #pragma once
25 
26 #ifdef ARM_COMPUTE_ENABLE_SVE
27 #include "../std_transforms_sve.hpp"
28 #include "../bfloat.hpp"
29 #include "../performance_parameters.hpp"
30 
31 #define ARGLIST  \
32     const bfloat16 *, const bfloat16 *, \
33     float *, int, int, int
34 
35 namespace arm_gemm
36 {
37 // Actual kernel implementations
38 void sve_interleaved_bf16fp32_mmla_8x3VL( ARGLIST );
39 
40 class cls_sve_interleaved_bf16fp32_mmla_8x3VL
41 {
42 public:
43     typedef bfloat16 operand_type;
44     typedef float result_type;
45 
46     typedef void (*kern_type)( ARGLIST );
47 
48     /* Kernel blocking parameters */
out_height()49     static constexpr unsigned int out_height()
50     {
51         return 8;
52     }
53 
out_width()54     static unsigned int out_width()
55     {
56         return get_vector_length<float>() * 3;
57     }
58 
stripe_width()59     static unsigned int stripe_width()
60     {
61         return get_vector_length<float>();
62     }
63 
k_unroll()64     static constexpr unsigned int k_unroll()
65     {
66         return 4;
67     }
68 
69 
70     StdTransformsSVE<operand_type, result_type, 8, 6, 4, 2> transforms = {};
71     StdTransformsSVE<operand_type, result_type, 8, 6, 4, 2, true> transforms_quantized = {};
72     template<typename T>
get_performance_parameters(const CPUInfo * ci)73     static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci)
74     {
75 
76         if (std::is_same<T, bfloat16>::value) {
77             switch (ci->get_cpu_model()) {
78                 default:
79                     return { 31.41, 4.30, 7.14 };
80                 case CPUModel::A510:
81                     return { 7.78, 4.01, 2.43 };
82                 case CPUModel::V1:
83                     return { 62.50, 5.09, 11.32 };
84             }
85         }
86 
87 
88         if (std::is_same<T, float>::value) {
89             switch (ci->get_cpu_model()) {
90                 default:
91                     return { 30.86, 2.36, 5.28 };
92                 case CPUModel::A510:
93                     return { 7.75, 2.47, 2.39 };
94                 case CPUModel::V1:
95                     return { 47.63, 5.11, 6.80 };
96             }
97         }
98 
99         return { 1.0 };
100     }
101 
102     // Default to the generic kernel
103     kern_type kernel=sve_interleaved_bf16fp32_mmla_8x3VL;
cls_sve_interleaved_bf16fp32_mmla_8x3VL(const CPUInfo *)104     cls_sve_interleaved_bf16fp32_mmla_8x3VL(const CPUInfo *)
105     {
106     }
107 };
108 
109 } // namespace arm_gemm
110 
111 #undef ARGLIST
112 
113 #endif // ARM_COMPUTE_ENABLE_SVE
114