xref: /aosp_15_r20/external/coreboot/src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-l2c.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 #ifndef __CB_BDK_L2C_H__
2 #define __CB_BDK_L2C_H__
3 /***********************license start***********************************
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41 
42 /* FIXME(dhendricks): added */
43 #include <libbdk-arch/bdk-numa.h>
44 
45 /**
46  * @file
47  *
48  * Interface to the Level 2 Cache (L2C) control, measurement, and debugging
49  * facilities.
50  *
51  * <hr>$Revision: 50663 $<hr>
52  *
53  * @addtogroup hal
54  * @{
55  */
56 
57 /**
58  * Perform one time initialization of L2 for improved
59  * performance. This can be called after L2 is in use.
60  *
61  * @return Zero on success, negative on failure.
62  */
63 int bdk_l2c_initialize(bdk_node_t node);
64 
65 /**
66  * Return the L2 Cache way partitioning for a given core.
67  *
68  * @param node  Node to use in a Numa setup. Can be an exact ID or a special
69  *              value.
70  * @param core  The core processor of interest.
71  *
72  * @return    The mask specifying the partitioning. 0 bits in mask indicates
73  *              the cache 'ways' that a core can evict from.
74  *            -1 on error
75  */
76 int bdk_l2c_get_core_way_partition(bdk_node_t node, int core);
77 
78 /**
79  * Partitions the L2 cache for a core
80  *
81  * @param node   Node to use in a Numa setup. Can be an exact ID or a special
82  *               value.
83  * @param core   The core that the partitioning applies to.
84  * @param mask The partitioning of the ways expressed as a binary mask. A 0 bit allows the core
85  *             to evict cache lines from a way, while a 1 bit blocks the core from evicting any lines
86  *             from that way. There must be at least one allowed way (0 bit) in the mask.
87  *
88  * @note  If any ways are blocked for all cores and the HW blocks, then those ways will never have
89  *        any cache lines evicted from them.  All cores and the hardware blocks are free to read from
90  *        all ways regardless of the partitioning.
91  */
92 int bdk_l2c_set_core_way_partition(bdk_node_t node, int core, uint32_t mask);
93 
94 /**
95  * Return the L2 Cache way partitioning for the hw blocks.
96  *
97  * @param node    Node to use in a Numa setup. Can be an exact ID or a special value.
98  * @return    The mask specifying the reserved way. 0 bits in mask indicates
99  *              the cache 'ways' that a core can evict from.
100  *            -1 on error
101  */
102 int bdk_l2c_get_hw_way_partition(bdk_node_t node);
103 
104 /**
105  * Partitions the L2 cache for the hardware blocks.
106  *
107  * @param node Node to use in a Numa setup. Can be an exact ID or a special
108  *             value.
109  * @param mask The partitioning of the ways expressed as a binary mask. A 0 bit allows the core
110  *             to evict cache lines from a way, while a 1 bit blocks the core from evicting any lines
111  *             from that way. There must be at least one allowed way (0 bit) in the mask.
112  *
113  * @note  If any ways are blocked for all cores and the HW blocks, then those ways will never have
114  *        any cache lines evicted from them.  All cores and the hardware blocks are free to read from
115  *        all ways regardless of the partitioning.
116  */
117 int bdk_l2c_set_hw_way_partition(bdk_node_t node, uint32_t mask);
118 
119 /**
120  * Locks a specified memory region in the L2 cache.
121  *
122  * Note that if not all lines can be locked, that means that all
123  * but one of the ways (associations) available to the locking
124  * core are locked.  Having only 1 association available for
125  * normal caching may have a significant adverse affect on performance.
126  * Care should be taken to ensure that enough of the L2 cache is left
127  * unlocked to allow for normal caching of DRAM.
128  *
129  * @param node   Node to use in a Numa setup. Can be an exact ID or a special
130  *               value.
131  * @param start  Physical address of the start of the region to lock
132  * @param len    Length (in bytes) of region to lock
133  *
134  * @return Number of requested lines that where not locked.
135  *         0 on success (all locked)
136  */
137 int bdk_l2c_lock_mem_region(bdk_node_t node, uint64_t start, uint64_t len);
138 
139 /**
140  * Unlocks a region of memory that is locked in the L2 cache
141  *
142  * @param node   Node to use in a Numa setup. Can be an exact ID or a special
143  *               value.
144  * @param start  start physical address
145  * @param len    length (in bytes) to unlock
146  *
147  * @return Number of locked lines that the call unlocked
148  */
149 int bdk_l2c_unlock_mem_region(bdk_node_t node, uint64_t start, uint64_t len);
150 
151 /**
152  * Flushes (and unlocks) the entire L2 cache.
153  */
154 void bdk_l2c_flush(bdk_node_t node);
155 
156 /**
157  *
158  * @return Returns the size of the L2 cache in bytes,
159  * -1 on error (unrecognized model)
160  */
161 int bdk_l2c_get_cache_size_bytes(bdk_node_t node);
162 
163 /**
164  * Return the number of sets in the L2 Cache
165  *
166  * @return
167  */
168 int bdk_l2c_get_num_sets(bdk_node_t node);
169 
170 /**
171  * Return the number of associations in the L2 Cache
172  *
173  * @return
174  */
175 int bdk_l2c_get_num_assoc(bdk_node_t node);
176 
177 /**
178  * Return true if the BDK has locked itself in L2
179  *
180  * @return
181  */
182 int bdk_l2c_is_locked(bdk_node_t node);
183 
184 /** @} */
185 #endif	/* !__CB_BDK_L2C_H__ */
186